IRS2110(-1,-2,S)PbF IRS2113(-1,-2,S)PbF HIGH AND LOW SIDE DRIVER. Features. Product Summary. Packages
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- Gillian Lawson
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1 Features Floating channel designed for bootstrap operation Fully operational to +5 V or +6 V Tolerant to negative transient voltage, dv/dt immune Gate drive supply range from 1 V to 2 V Undervoltage lockout for both channels 3.3 V logic compatible Separate logic supply range from 3.3 V to 2 V Logic and power ground ± 5V offset CMOS Schmitt-triggered inputs with pull-down Cycle by cycle edge-triggered shutdown logic Matched propagation delay for both channels Outputs in phase with inputs RoHS compliant Description The IRS211/IRS2113 are high voltage, high speed power MOSFET and IGBT drivers with independent high-side and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 5 V or 6 V. HIGH AND LOW SIDE DRIVER Product Summary VOFFSET (IRS211) (IRS2113) IO+/- VOUT ton/off (typ.) Delay Matching (IRS211) (IRS2113) Packages 14-Lead PDIP IRS211 and IRS Lead PDIP (w/o lead 4) IRS211-1 and IRS Data Sheet No. PD6249 IRS211(-1,-2,S)PbF IRS2113(-1,-2,S)PbF 5 V max. 6 V max. 2 A/2 A 1 V - 2 V 13 ns & 12 ns 1 ns max. 2 ns max. 16-Lead PDIP (w/o leads 4 & 5) IRS211-2 and IRS Lead SOIC IRS211S and IRS2113S Typical Connection up to 5 V or 6 V HO V DD V DD V B HIN SD HIN SD V S TO LOAD LIN LIN V CC V SS V SS COM V CC LO (Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. 1
2 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35. Symbol Definition Min. Units V B High-side floating supply voltage (IRS211) (Note 1) (IRS2113) (Note 1) V S High-side floating supply offset voltage V B - 2 V B +.3 V HO High-side floating output voltage V S -.3 V B +.3 V CC Low-side fixed supply voltage (Note 1) V LO Low-side output voltage -.3 V CC +.3 V DD Logic supply voltage -.3 V SS +2 (Note 1) V SS Logic supply offset voltage V CC - 2 V CC +.3 V IN Logic input voltage (HIN, LIN, & SD) V SS -.3 V DD +.3 dv s /dt Allowable offset supply voltage transient (Fig. 2) 5 V/ns PD Package power TA +25 C RTHJA Thermal resistance, junction to ambient (14 lead DIP) 1.6 (16 lead SOIC) 1.25 (14 lead DIP) 75 (16 lead SOIC) 1 T J Junction temperature 15 T S Storage temperature T L Lead temperature (soldering, 1 seconds) 3 Note 1: All supplies are fully tested at 25 V, and an internal 2 V clamp exists for each supply. Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation, the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at a 15 V differential. Typical ratings at other bias conditions are shown in Figs. 36 and 37. Symbol Definition Min. Units V B High-side floating supply absolute voltage V S + 1 V S + 2 VS High-side floating supply offset voltage (IRS211) Note 2 5 (IRS2113) Note 2 6 V W C/W C V HO High-side floating output voltage V S V B V CC Low-side fixed supply voltage 1 2 V LO Low-side output voltage VCC V DD Logic supply voltage V SS + 3 V SS + 2 V SS Logic supply offset voltage -5 (Note 3) 5 V V IN Logic input voltage (HIN, LIN & SD) V SS V DD T A Ambient temperature -4 C Note 2: Logic operational for V S of -4 V to +5 V. Logic state held for V S of -4 V to -V BS. (Refer to the Design Tip DT97-3) Note 3: When V DD < 5 V, the minimum V SS offset is limited to -V DD. 2
3 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Dynamic Electrical Characteristics V BIAS (V CC, V BS, V DD ) = 15 V, C L = 1 pf, T A = 25 C and V SS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Fig. 3. Symbol Definition Min. Units Test Conditions t on Turn-on propagation delay V S = V t off Turn-off propagation delay t sd Shutdown propagation delay t r Turn-on rise time t f Turn-off fall time MT Delay matching, HS & LS (IRS211) 1 turn-on/off (IRS2113) 2 ns V S = 5 V/6 V Static Electrical Characteristics V BIAS (V CC, V BS, V DD ) = 15 V, T A = 25 C and V SS = COM unless otherwise specified. The V IN, V TH, and I IN parameters are referenced to V SS and are applicable to all three logic input leads: HIN, LIN, and SD. The V O and I O parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Min. Units Test Conditions V IH Logic 1 input voltage 9.5 V IL Logic input voltage 6. V OH High level output voltage, V BIAS - V O 1.4 V I O = A V OL Low level output voltage, V O.15 I O = 2 ma I LK Offset supply leakage current 5 V B =V S = 5 V/6 V I QBS Quiescent V BS supply current 23 I QCC Quiescent V CC supply current I QDD Quiescent V DD supply current 15 3 I IN+ Logic 1 input bias current 2 4 V IN = V DD I IN- Logic input bias current 5. V IN = V V BSUV+ V BSUV- V CCUV+ V CCUV- V BS supply undervoltage positive going threshold V BS supply undervoltage negative going threshold V CC supply undervoltage positive going threshold V CC supply undervoltage negative going threshold I O+ Output high short circuit pulsed current I O- Output low short circuit pulsed current V O = V, V IN = V DD PW 1 µs V O = 15 V, V IN = V PW 1 µs 3 µa V A V IN = V or V DD
4 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Functional Block Diagram V B V DD HIN R S Q V DD /V CC LEVEL SHIFT PULSE GEN HV LEVEL SHIFT UV DETECT PULSE FILTER R R S Q HO V S SD V CC LIN R S Q V DD /V CC LEVEL SHIFT UV DETECT DELAY LO V SS COM Lead Definitions Symbol Description V DD HIN SD LIN V SS V B HO V S V CC LO COM Logic supply Logic input for high-side gate driver output (HO), in phase Logic input for shutdown Logic input for low-side gate driver output (LO), in phase Logic ground High-side floating supply High-side gate drive output High-side floating supply return Low-side supply Low-side gate drive output Low-side return 4
5 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Lead Assignments 14 Lead PDIP IRS211/IRS Lead SOIC (Wide Body) IRS211S/IRS2113S 14 Lead PDIP w/o lead 4 IRS211-1/IRS Lead PDIP w/o leads 4 & 5 IRS211-2/IRS Part Number 5
6 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF V =15V cc HV = 1 to 5V/6V 1 µf.1 µf 1KF µf HO OUTPUT MONITOR 1KF IRF82 2 µh 1KF6 + 1µF dv S >5 V/ns dt Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit V =15V cc HIN SD LIN 1 µf.1 µf C L C L.1 µf HO LO V B V µf - V S ( to 5V/6V) 1 µf Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition Figure 5. Shutdown Waveform Definitions Figure 6. Delay Matching Waveform Definitions 6
7 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Turn-On Turn-on Delay Time (ns) (ns Turn-On Turn-on Delay Delay Time Time (ns) (ns) Temperature( o C) V BIAS Supply Voltage (V) Figure 7A. Turn-On Time Figure 7B. Turn-On Time vs. Supply Voltage Turn-On Delay Time (ns) V DD Supply Voltage (V) Figure 7C. Turn-On Time vs. V DD Supply Voltage Turn-Off Turn-Off Time Time (ns) (ns) Temperature( o C) Figure 8A. Turn-Off Time Turn-Off Time (ns) Turn-Off Turn-Off Delay Delay Time Time (ns) (ns) V BIAS Supply Voltage (V) Figure 8B. Turn-Off Time vs. Supply Voltage V DD Supply Voltage (V) Figure 8C. Turn-Off Time vs. VDD Supply Voltage 7
8 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF SD SD Propagation Propagation Delay Delay (ns) (ns Figure 9A. Shutdown Time SD SD Propagation Delay delay (ns) (ns V BIAS Supply Voltage (V) Figure 9B. Shutdown Time vs. Supply Voltage Shutdown Delay Time (ns) V DD Supply Voltage (V) Figure 9C. Shutdown Time vs. VDD Supply Voltage Turn-On Rise Time (ns) Figure 1A. Turn-On Rise Time Turn-On Rise Time (ns) Turn-On Rise Time (ns) Turn-Off Fall Time (ns) Turn-Off Fall Time (ns) V BIAS Supply Voltage (V) Figure 1B. Turn-On Rise Time vs. Voltage Figure 11A. Turn-Off Fall Time 8
9 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Logic "" Input Threshold (V) Turn-Off Logic " 1" Input Threshold (V) Turn-Off Fall Fall Time (ns) (ns) Logic 1 Input Threshold (V) V BIAS Supply Voltage (V) Figure 11B. Turn-Off Fall Time vs. Voltage Figure 12A. Logic 1 Input Threshold V DD Logic Supply Voltage (V) Figure 12B. Logic 1 Input Threshold vs. Voltage Logic Input Threshold (V) Min V DD Logic Supply Voltage (V) Figure 13B. Logic Input Threshold vs. Voltage Figure 14A. High Level Output Voltage (Io = ma) 9 Logic 1 Input Threshold (V) Logic "1" Input Threshold (V) High Level Output Voltage (V) Logic Logic "" Input Threshold (V) (V) Min. Max Min Figure 13A. Logic Input Threshold
10 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF High Level Output Voltage (V) Low Level Outout Voltage (V) Max Supply Voltage (V) V BIAS Figure 14B. High Level Output Voltage vs. Supply Voltage (Io = ma) V CC Supply Voltage (V) Figure 15B. Low Level Output vs. Supply Voltage Low Level Outout Voltage (V) Offset Supply Leakage Current (µa) Figure 15A. Low Level Output Figure 16A. Offset Supply Current Offset Supply Leakage Current (µa) V B Boost Voltage (V) Figure 16B. Offset Supply Current vs. Voltage Figure 17A. VBS Supply Current 1 VBS Supply Current (µa) VBS Supply Current (µa)
11 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Current (µa) VCC Supply Current (µa) VBS Supply Current (µa) VDD Supply Current (µa) VCC Supply Current (µa) Figure 17B. VBS Supply Current vs. Voltage Figure 18B. VCC Supply Current vs. Voltage Figure 19B. VDD Supply Current vs. VDD Voltage V BS Floating Supply Voltage (V) Figure 18A. VCC Supply Current Figure 2A. Logic 1 Input Current 11 VCC Supply Current (µa) VDD Supply Current (µa) V CC Fixed Supply Voltage (V) Logic 1 Input Bias Current (µa) Figure 19A. VDD Supply Current V DD Logic Supply Voltage (V)
12 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Logic 1 Input Bias Current (µa) Logic 1 Input Bias Current (µa) Logic "" Input Bias Current (µa) VBS Undervoltage Lockout - (V) Figure 2B. Logic 1 Input Current vs. VDD Voltage Max Min. V DD Logic Supply Voltage (V) Supply Voltage (V) Figure 21B. Logic "" Input Bias Current vs. Voltage Figure 23. VBS Undervoltage (-) VBS Undervoltage Lockout + (V) Min. Figure 22. VBS Undervoltage (+) VCC Undervoltage Lockout + (V) Min Logic "" Input Bia s Current (µa) Max Temperature ( C) Figure 21A. Logic "" Input Bias Current Figure 24. VCC Undervoltage (+)
13 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF VCC Undervoltage Lockout - (V) Min Output Source Current (A) ( C) ( C) Output Source Current (A) Min Figure 25. VCC Undervoltage (-) Figure 26A. Output Source Current Output Source Current (A) Output Source Current (A) Min V BIAS Supply Voltage (V) Figure 26B. Output Source Current vs. Voltage 5. Output Sink Current (A) Output Sink Current (A) Min Figure 27A. Output Sink Current 32 V Output Sink Current (A) Output Sink Current (A) Min. Junction V 1 V V BIAS Supply Voltage (V) Figure 27B. Output Sink Current vs. Voltage 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (khz) Figure 28. IRS211/IRS2113 TJ vs. Frequency (IRFBC2) RGATE = 33 W, VCC = 15 V 13
14 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF V V 14 V Junction p ( ) V 1 V Junction V 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (khz) Figure 29. IRS211/IRS2113 TJ vs. Frequency (IRFBC3) RGATE = 22 Ω, VCC = 15 V 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (khz) Figure 3. IRS211/IRS2113 TJ vs. Frequency (IRFBC4) RGATE = 15 Ω, VCC = 15 V V 14 V V 14 V Junction V Junction V 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (khz) Figure 31. IRS211/IRS2113 TJ vs. Frequency (IRFPE5) RGATE = 1 Ω, VCC = 15 V 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (khz) Figure 32. IRS211S/IRS2113S TJ vs. Frequency (IRFBC2) RGATE = 33 Ω, VCC = 15 V V 14 V V 14 V Junction V Junction V 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (khz) Figure 33. IRS211S/IRS2113S TJ vs. Frequency (IRFBC3) RGATE = 22 Ω, VCC = 15 V 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (khz) Figure 34. IRS211S/IRS2113S TJ vs. Frequency (IRFBC4) RGATE = 15 Ω, VCC = 15 V 14
15 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF V 14 V 1 V. Junction p ( ) E+2 1E+3 1E+4 1E+5 1E+6 Frequency (khz) Figure 35. IRS211S/IRS2113S TJ vs. Frequency (IRFPE5) RGATE = 1 Ω, VCC = 15 V VS Offset Supply Voltage (V) V BS Floating Supply Voltage (V) Figure 36. Maximum VS Negative Offset vs. VBS Supply Voltage VSS Logic Supply Offset Voltage (V) V CC Fixed Supply Voltage (V) Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage 15
16 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Case Outlines 14-Lead PDIP (MS-1AC) 14-Lead PDIP w/o Lead (MS-1AC) 16
17 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF 16 Lead PDIP w/o Leads 4 & Lead SOIC (wide body) (MS-13AA) 17
18 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF Tape & Reel 16-Lead SOIC LOAD ED TA PE FEED DIRECTION B A H D F C N OTE : CONTROLLING D IMENSION IN MM E G CARRIER TAPE DIMENSION FOR 16SOICW Metric Imperial Code Min Max Min Max A B C D E F G 1.5 n/a.59 n/a H F D E C B A G H REEL DIMENSIONS FOR 16SOICW Metric Imperial Code Min Max Min Max A B C D E F n/a 22.4 n/a.881 G H
19 IRS211(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF LEADFREE PART MARKING INFORMATION Part number Date code IRxxxxxx S YWW? IR logo Pin 1 Identifier? MARKING CODE P Lead Free Released Non-Lead Free Released?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 2-2 ORDER INFORMATION 14-Lead PDIP IRS211PbF 14-Lead PDIP IRS211-1PbF 14-Lead PDIP IRS2113PbF 14-Lead PDIP IRS2113-1PbF 16-Lead PDIP IRS211-2PbF 16-Lead PDIP IRS2113-2PbF 16-Lead SOIC IRS211SPbF 16-Lead SOIC IRS2113SPbF 16-Lead SOIC Tape & Reel IRS211STRPbF 16-Lead SOIC Tape & Reel IRS2113STRPbF The SOIC-14 is MSL3 qualified. The SOIC-16 is MSL3 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245 Tel: (31) Data and specifications subject to change without notice. 1/22/
200V HO V DD V B HIN SD HIN SD V S TO LOAD LIN V CC V SS LIN COM LO
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