IRS21844MPBF HALF-BRIDGE DRIVER

Transcription

1 November 19, 2010 HALF-BRIDGE DRIVER Features Floating channel designed for bootstrap operation Fully operational to V Tolerant to negative transient voltage, dv/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout for both channels 3.3 V and 5 V input logic compatible Matched propagation delay for both channels Logic and power ground +/- 5 V offset Lower di/dt gate driver for better noise immunity Output source/sink current capability 1.4 A/1.8 A Lead free, RoHS compliant Product Summary Topology V OFFSET V OUT I o+ & I o- (typical) t on & t off (typical) Deadtime (typical) Package Options Half-Bridge 600 V 10 V 20 V 1.9 A & 2.3 A 680 ns & 270 ns 400 ns (R DT = 0 Ω) 5 µs (R DT = 200 kω) MLPQ4x4 16- Leads (Without 2 leads) Typical Connection * Qualification standards can be found at

2 Description The is a high voltage, high speed power MOSFET and IGBT drivers with dependent high and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Feature Comparison: IRS2181(4)/IRS2183(4)/IRS2184(4) Cross- Part Input Conduction Dead-Time Logic Prevention logic Ground Pins 2181 COM HIN/LIN no none V SS /COM 2183 Internal 500ns COM HIN/LIN yes Programmable us V SS /COM 2184 Internal 500ns COM IN/SD yes Programmable us V SS /COM Ton/Toff 180/220 ns 180/220 ns 680/270 ns Qualification Information Industrial Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model IC Latch-Up Test RoHS Compliant (per JEDEC JESD 47) Comments: This IC has passed JEDEC s Industrial qualification. IR s Consumer qualification level is granted by extension of the higher Industrial level. MSL2 MLPQ4x4 14L (per IPC/JEDEC J-STD-020) Class A (+/-100V) (per JEDEC standard JESD22-A115) Class 1C (+/-1500V) (per EIA/JEDEC standard EIA/JESD22-A114) Class III (+/-1000V) (per JEDEC standard JESD22-C101) Class II, Level A (per JESD78A) Yes Qualification standards can be found at International Rectifier s web site Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. 2

3 Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min Max Units V B High-side floating absolute voltage V S High-side floating supply offset voltage V B - 25 V B V HO High-side floating output voltage V S V B V CC Low-side and logic fixed supply voltage V LO Low-side output voltage -0.3 V CC V DT Programmable deadtime pin voltage V SS -0.3 V CC V IN Logic input voltage (IN & SD ) V SS -0.3 V CC V SS Logic ground V CC - 20 V CC dv S /dt Allowable offset supply voltage transient 50 V/ns P D Package power TA 25 C 2.08 W Rth JA Thermal resistance, junction to ambient 36 C/W T J Junction temperature 150 T S Storage temperature T L Lead temperature (soldering, 10 seconds) 300 All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply. C Recommended Operating Conditions The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The V S and V SS offset rating are tested with all supplies biased at a 15 V differential. Symbol Definition Min Max Units V B High-side floating supply absolute voltage V S + 10 V S + 20 V S High-side floating supply offset voltage ( ) 600 V HO High-side floating output voltage V S V B V CC Low-side and logic fixed supply voltage V LO Low-side output voltage 0 V CC V IN Logic input voltage (IN & SD ) ( ) V SS V CC V DT Programmable deadtime pin voltage V SS V CC V SS Logic ground -5 5 T A Ambient temperature C Logic operational for V S of -5 V to +600 V. Logic state held for V S of -5 V to V BS. (Please refer to Design Tip DT97-3 for more details). HIN and LIN are internally clamped with a 5.2 V zener diode. 3

4 Dynamic Electrical Characteristics V BIAS (V CC, V BS ) = 15 V, V SS = COM, C L = 1000 pf, T A = 25 C, DT = V SS unless otherwise specified. Symbol Definition Min Typ Max Units Test Conditions t on Turn-on propagation delay V S = 0 V t off Turn-off propagation delay V S = 0 V or 600 V t sd Shut-down propagation delay MT on Delay matching, HS & LS turn-on 0 90 MT off Delay matching, HS & LS turn-off 0 40 ns t r Turn-on rise time t f Turn-off fall time DT MDT V S = 0 V Deadtime: LO turn-off to HO turn-on (DT LO-HO ) & R DT = 0 Ω HO turn-off to LO turn-on (DT HO-LO ) µs R DT = 200 kω Deadtime matching DT LO-HO - DT HO-LO Static Electrical Characteristics 0 50 R DT = 0 Ω ns R DT = 200 kω V BIAS (V CC, V BS ) = 15 V, V SS = COM, DT = V SS and T A = 25 C unless otherwise specified. The V IL, V IH and I IN parameters are referenced to V SS /COM and are applicable to the respective input leads: IN and SD. The V O, I O and R on parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol Definition Min Typ Max Units Test Conditions V IH Logic 1 input voltage for HO & logic 0 for LO 2.5 V IL Logic 0 input voltage for HO & logic 1 for LO 0.8 V SD,TH+ SD input positive going threshold 2.5 V SD,TH- SD input negative going threshold 0.8 V CC = 10 V to 20 V V OH High level output voltage, V BIAS - V O 1.4 I O = 0 A V OL Low level output voltage, V O 0.2 V I O = 20 ma I LK Offset supply leakage current 50 V B = V S = 600 V µa I QBS Quiescent V BS supply current V IN = 0 V or 5 V I QCC Quiescent V CC supply current ma I IN+ Logic 1 input bias current IN = 5 V, SD = 0 V µa I IN- Logic 0 input bias current 5.0 IN = 0 V, SD = 5 V V CC and V BS supply undervoltage positive going threshold V CC and V BS supply undervoltage negative going threshold V V CCUV+ V BSUV+ V CCUV- V BSUV- V CCUVH V BSUVH Hysteresis I O+ Output high short circuit pulsed current I O- Output low short circuit pulsed current A V O = 0 V, PW 10 µs V O = 15 V, PW 10 µs 4

5 Functional Block Diagram: IRS

6 Input/Output Pin Equivalent Circuit Diagrams: IRS

7 Lead Definitions PIN Symbol Description 1 SD Logic input for shutdown (referenced to V SS ) 2 V SS Logic ground 3 DT Programmable deadtime lead, referenced to V SS 4 COM Low-side return 5 LO Low-side gate drive output 6 NC No Connection 7 V CC Low-side and logic fixed supply 8 NC No Connection 9 NC No Connection 10 NC No Connection (removed lead) 11 V S High-side floating supply return 12 HO High-side gate drive output 13 V B High-side floating supply 14 NC No Connection 15 NC No Connection (removed lead) 16 IN Logic input for high-side gate driver output (HO), in phase Lead Assignments: IRS SD 1 12 HO Vss 2 11 VS DT COM L- MLPQ 4x 4 with 2 leads removed 10 9 NC NC = Removed lead 7

8 Application Information and Additional Details SD Figure 1: Input/Output Timing Diagram Figure 2: Switching Time Waveform Definitions SD Figure 3: Shutdown Waveform Definitions Figure 4: Deadtime Waveform Definitions Figure 5: Delay Matching Waveform Definitions 8

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24 Package Details: MLPQ 4x4-16L 24

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26 Tape and Reel Details: MLPQ 4x4 26

27 Part Marking Information Ordering Information Base Part Number IRS21844 Package Type MLPQ 4x4-16L Standard Pack Form Quantity Complete Part Number Tube/Bulk 92 Tape and Reel 3,000 IRS21844MTRPBF The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied. For technical support, please contact IR s Technical Assistance Center WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California Tel: (310)

28 Revision History Date Comment 09/24/09 Converted from existing data sheet; changing only package information 03/24/2010 Included Qual Info Page 11/19/2010 Updated POD 28