Packages. Feature Comparison. Crossconduction. Input logic. Part COM HIN/LIN no none 21064

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1 DS No.PD6266 Rev A Features Floating channel designed for bootstrap operation Fully operational to +6 V Tolerant to negative transient voltage, dv/dt immune Gate drive supply range from 1 V to 2 V Undervoltage lockout for both channels 3.3 V, 5 V, and 15 V input logic compatible Cross-conduction prevention logic Matched propagation delay for both channels Outputs in phase with inputs Logic and power ground +/- 5 V offset. Internal 54 ns deadtime Lower di/dt gate driver for better noise immunity Description The IRS238/IRS2384 are high voltage, high speed power MOSFET and IGBT drivers with dependent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input Typical Connection Part Input logic Packages Feature Comparison IRS238(S)PbF HALF-BRIDGE DRIVER 8-Lead SOIC IRS238S Crossconduction prevention logic Deadtime (ns) is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 6 V. up to 6 V 8-Lead PDIP IRS238 Ground Pins Ton/Toff (ns) 216 COM HIN/LIN no none 2164 VSS/COM 22/2 218 Internal 54 COM HIN/LIN yes 2184 Programmable 54-5 VSS/COM 22/2 219 Internal 54 COM IN/SD yes 2194 Programmable 54-5 VSS/COM 75/2 234 HIN/LIN yes Internal 1 COM 16/ HIN/LIN yes Internal 54 COM 22/2 V CC V CC V B HIN HIN HO LIN LIN COM V S LO TO LOAD (Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. 1

2 IRS238(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Units V B High side floating absolute voltage V S High side floating supply offset voltage V B - 25 V B +.3 V HO High side floating output voltage V S -.3 V B +.3 V CC Low side and logic fixed supply voltage V LO Low side output voltage -.3 V CC +.3 V IN Logic input voltage (HIN & LIN ) V SS -.3 V CC +.3 dv S /dt Allowable offset supply voltage transient 5 V/ns P D Package power T A +25 C Rth JA Thermal resistance, junction to ambient (8 lead PDIP) 1. (8 lead SOIC).625 (8 lead PDIP) 125 (8 lead SOIC) 2 T J Junction temperature 15 T S Storage temperature T L Lead temperature (soldering, 1 seconds) 3 V W C/W C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The V S and V SS offset rating are tested with all supplies biased at a 15 V differential. Symbol Definition Units V B High side floating supply absolute voltage V S + 1 V S + 2 V S High side floating supply offset voltage Note 1 6 V HO High side floating output voltage V S V B V CC Low side and logic fixed supply voltage 1 2 V V LO Low side output voltage V CC V IN Logic input voltage COM V CC T A Ambient temperature C Note 1: Logic operational for V S of -5 V to +6 V. Logic state held for V S of -5 V to -V BS. (Please refer to the Design Tip DT97-3 for more details). 2

3 IRS238(S)PbF Dynamic Electrical Characteristics V BIAS (V CC, V BS ) = 15 V, V SS = COM, C L = 1 pf, T A = 25 C, DT = V SS unless otherwise specified. Symbol Definition Units Test Conditions ton Turn-on propagation delay 22 3 VS = V toff Turn-off propagation delay 2 28 V S = V or 6 V MT Delay matching ton - toff 46 tr Turn-on rise time 1 22 tf Turn-off fall time 35 8 DT Deadtime: LO turn-off to HO turn-on(dtlo-ho) & HO turn-off to LO turn-on (DTHO-LO) MDT Deadtime matching = DTLO-HO - DTHO-LO 6 ns V S = V Static Electrical Characteristics V BIAS (V CC, V BS ) = 15 V, V SS = COM, DT= V SS and T A = 25 C unless otherwise specified. The V IL, V IH, and I IN parameters are referenced to V SS /COM and are applicable to the respective input leads: HIN and LIN. The V O, I O, and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol Definition Units Test Conditions V IH Logic 1 input voltage for HIN & LIN 2.5 V IL Logic input voltage for HIN & LIN.8 V OH High level output voltage, V BIAS - V O.5.2 V OL Low level output voltage, V O.2.1 I LK Offset supply leakage current 5 V B = V S = 6 V µa I QBS Quiescent V BS supply current V IN = V or 5 V I QCC Quiescent V CC supply current ma I IN+ Logic 1 input bias current 5 2 HIN = 5 V, LIN = 5 V µa I IN- Logic input bias current 1 2 HIN = V, LIN = V V CCUV+ V BSUV+ V CCUV- V BSUV- V CC and V BS supply undervoltage positive going threshold V CC and V BS supply undervoltage negative going threshold V CCUVH Hysteresis.3.7 V V V CC = 1 V to 2 V I O = 2 ma V BSUVH I O+ Output high short circuit pulsed curren 2 29 I O- Output low short circuit pulsed current 42 6 ma V O = V, PW 1 µs V O = 15 V, PW 1 µs 3

4 IRS238(S)PbF Functional Block Diagram VB IR238 UV DETECT R HO HIN VSS/COM LEVEL SHIFT PULSE GENERATOR HV LEVEL SHIFTER PULSE FILTER R S Q VS DT DEADTIME & SHOOT-THROUGH PREVENTION UV DETECT VCC LO LIN VSS/COM LEVEL SHIFT DELAY COM VSS 4

5 IRS238(S)PbF Lead Definitions Symbol Description HIN LIN V B HO V S V CC LO COM Logic input for high side gate driver output (HO), in phase Logic input for low side gate driver output (LO), in phase High side floating supply High side gate driver output High side floating supply return Low side and logic fixed supply Low side gate driver output Low side return Lead Assignments 1 V CC V B 8 1 V CC V B 8 2 HIN HO 7 2 HIN HO 7 3 LIN V S 6 3 LIN V S 6 4 COM LO 5 4 COM LO 5 8 Lead PDIP 8 Lead SOIC IRS238PbF IRS238SPbF 5

6 IRS238(S)PbF LIN HIN LIN HIN ton 5% 5% t r toff tf 9% 9% HO LO HO LO 1% 1% Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions LIN HIN 5 % 5 % 9% HO DT LO-HO 1% LO 9% DT HO-LO MDT= DT LO-HO 1% - DT HO-LO Figure 3. Deadtime Waveform Definitions 6

7 IRS238(S)PbF 5 5 Turn-On Turn-on Delay Delay Time Time (ns) (ns Turn-On Turn-on Delay Time Time (ns) (ns Temperature( ( o C) o C) Figure 4A. Turn-On Time vs. vs. Temperature V BIAS Supply Voltage (V) Figure 4B. Turn-On Time vs. vs. Supply Voltage 5 5 Turn-Off Time Time (ns) (ns) Turn-Off Time Time (ns) (ns) Temperature( ( o C) o C) Figure Figure 5A. 5A. Turn-Off Propagation Delay Delay vs. vs. Temperature V BIAS Supply Voltage (V) Figure 5B. Turn-Off Propagation Delayvs. vs. Supply Voltage 7

8 IRS238(S)PbF 5 5 Turn-On Rise Time (ns) T u Turn-On n R ise Rise Tim Time e (ns) (ns) Figure Figure 6A 6A..Turn-On Turn-On Rise Rise Tim Time e vs vs..tem Temperature V BIAS Supply Voltage (V) Figure 6B.Turn-On Turn-On Rise Rise Tim Time e vs.supply Voltage g e Turn-Off Fall Time (ns) Temperature 25 5 ( o C) Temperature( o C) Figure 7A..Turn-Off FallTim Timee vs.tem Temperature T u Turn-Off F a Fall lt Time (ns) V BIAS Supply Voltage (V) Input Voltage (V) Figure 7B.Turn-Off FallTim Time e vs. vs.input Supply volta Voltage g e 8

9 IRS238(S)PbF 1 1 Deadtime (ns) (ns) Deaduime Deadtime (ns) (ns) ( o C) Figure 8A. Deadtime vs. Temperature V BIAS Supply Voltage (V) Figure 8A. Deadtime vs. Supply Voltage Figure 8B. Deadtime vs Supply Voltage 5 5 Input Input Voltage (V) (V) Input Voltage (V) Figure 9A. Logic "1" 1 Input Voltage vs. Temperature V BIAS Supply Voltage (V) Figure 9B. Logic "1" 1 Input Voltage vs. Supply Voltage 9

10 IRS238(S)PbF 4 4 Input Input Voltage (V) (V) Input Voltage (V) Temperature Temperatre ( o C) Figure 1A. Logic "" Input Voltage vs. vs. Temperature V BIAS Supply Voltage (V) Figure 1B. 1A. Logic "" Input Voltage vs. Supply Voltage High High Level Output Voltage (V) High High Level Output Voltage (V) V BIAS BAIS Supply Voltage (V) Figure 11A. High Level Output Voltage vs. Temperature Figure 11B. 11A. High Lovel Level Output Voltage vs. Supply Voltage 1

11 IRS238(S)PbF Low Level Output Voltage (V) (V) Figure 12A. Low Level Output Voltage vs. vs.temperature Low Low Level Output Voltage (V) (V) V BIAS Supply Voltage (V) Figure 12B. Low Level Output Voltage vs. Supply Voltage Offset Offset Supply Leakage Current (µa) Offset Supply Leakage currentt( Current(µA) (µa) V B Boost Voltage (V) Figure Figure 13A. 13A. Offset Offset Supply Supply Leakage Leakage Current Current vs. vs. Temperature Temperature Figure Figure 13A. 13B. Offset Offset Supply Supply Leakage Leakage Current Current vs. vs. Supply Supply Voltage Voltage 11

12 IRS238(S)PbF VBS V BS Supply Supply Current Current (µa) (µα) Figure 14A. V BS Supply Current vs. Temperature V VBS Supply Current (µa) (µα) V BS Supply Voltage (V) BS Supply Voltage (V) Figure 14B. V BS Supply Current Figure vs. 14B. Supply BS Supply Voltage Current vs. Supply Voltage 3. 3 V VCC Supply Current (ma) (mα) V VCC Supply Current (ma) (mα) V CC Supply Voltage (V) Figure 15A. V CC Supply Current vs. Temperature Figure 15B. 14B. V CC Supply Current vs. Supply Voltage 12

13 IRS238(S)PbF Logic 1 Input Current (µa) Logic "1" Input Current (µa) Figure 16A. Logic "1" 1 Input Input Current vs. vs. Temperature Logic 1 "1" Input Current Current (µa) (µα) V CC Supply Voltage (V) Figure 16B. Logic Logic "1" 1 Input Input Current Current vs. vs. Supply Voltage Logic "" Input Current (µa) (µα) Figure 17A. Logic "" Input Current vs. Temperature Logic "" Input Current (µa) (µα) V CC CC Supply Voltage (V) (V) Figure 17B. Logic "" Input Current vs. vs. Supply Voltage 13

14 IRS238(S)PbF V Vcc CC UVLO Threshold (+) (+) (V) (V) Figure 18. VVcc CC Undervoltage Threshold (+) (+) vs. Temperature V Vcc CC UVLO Threshold (-) (-) (V) (v) Figure 19. VVcc CC Undervoltage Threshold (-) (-) vs. Temperature V VBS UVLO Threshold (+) (+) (V) (v) Figure VV BS Undervoltage Threshold (+) vs. Temperature VBS V BS UVLO Threshold (-) (-) (V) (V) Figure 21. V BS Undervoltage Threshold (-) (-) vs. Temperature 14

15 IRS238(S)PbF Output Source Current (ma) (mα) Figure 22A. Output Source Current vs. Temperature Output Source Current (ma) (mα) V BIAS Supply Voltage (V) V BIAS Supply Voltage (V) Figure 22B. Output Source Current vs. Supply Voltage 1 1 Output Sink Current (ma) (mα) Output Sink Current (ma) (mα) Temperature ( o ( C) o C) V BIAS Supply Voltage (V) V BIAS Supply Voltage (V) Figure 23A. Output Sink Current vs.temperature Figure 23B. Output Sink Current vs. Supply Voltage 15

16 IRS238(S)PbF VS VS Offset Supply Voltage (V) V BS Flouting Floating Supply Voltage Voltage (V) (V) Figure 24. Maximum V S Negative V S Negative Offset Offset vs. vs. Supply Voltage Voltage 16

17 IRS238(S)PbF V 7 V V V 7 V V Frequency (khz) Figure 25. IRS238 vs. Frequency (IRFBC2), R gate =33Ω, V CC =15 V Frequency (khz) Figure 26. IRS238 vs. Frequency (IRFBC3), R gate =22 Ω, V CC =15 V V 7 V V V 7 V V Frequency (khz) Figure 27. IRS238 vs. Frequency (IRFBC4), R gate =15 Ω, V CC =15 V Frequency (khz) Figure 28. IRS238 vs. Frequency (IRFPE5), R gate =1Ω, V CC =15 V 17

18 IRS238(S)PbF V 7 V V V 7 V V Frequency (khz) Figure 29. IRS238S vs. Frequency (IRFBC2), R gate =33Ω, V CC =15 V Frequency (khz) Figure 3. IRS238S vs. Frequency (IRFBC3), R gate =22Ω, V CC =15 V V 7 V V 7 V V V Tempreture ( o C) Frequency (khz) Figure 31. IRS238S vs. Frequency (IRFBC4), R gate =15Ω, V CC =15 V Frequency (khz) Figure 32. IRS238S vs. Frequency (IRFPE5), R gate =1Ω, V CC =15 V 18

19 IRS238(S)PbF Case outlines 8-Lead PDIP (MS-1AB) A E 6 6X D e B H.25 [.1] A 6.46 [.255] 3X 1.27 [.5] FOOTPRINT 8X.72 [.28] 8X 1.78 [.7] INCHES DIM MIN MAX A A b.13.2 MILLIMETERS MIN MAX c D E e.5 BASIC 1.27 BASIC e1.25 BASIC.635 BASIC H K L y 8 8 e1 A C y K x 45 8X b A1.25 [.1] C A B.1 [.4] 8X L 7 8X c NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-12AA. 8-Lead SOIC 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.15 [.6]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.25 [.1]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE (MS-12AA) 19

20 IRS238(S)PbF Tape & Reel 8-Lead SOIC LOADED TAPE FEED DIRECTION B A H D F C NOTE : CO NTROLLING DIMENSION IN MM E G CARRIER TAPE DIMENSION FOR 8SOICN Metric Imperial Code Min Max Min Max A B C D E F G 1.5 n/a.59 n/a H F D E C B A G H REEL DIMENSIONS FOR 8SOICN Metric Imperial Code Min Max Min Max A B C D E F n/a 18.4 n/a.724 G H

21 IRS238(S)PbF LEADFREE PART MARKING INFORMATION Part number Date code IRxxxxxx S YWW? IR logo Pin 1 Identifier? MARKING CODE P Lead Free Released Non-Lead Free Released?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 2-2 ORDER INFORMATION 8-Lead PDIP IRS238PbF 8-Lead SOIC IRS238SPbF 8-Lead SOIC Tape & Reel IRS238STRPbF The SOIC-8 is MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at < IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245 Tel: (31) Data and specifications subject to change without notice. 6/16/