SELF-OSCILLATING HALF-BRIDGE DRIVER

Transcription

1 Features Floating channel designed for bootstrap operation Fully operational to +600V olerant to negative transient voltage dv/dt immune Undervoltage lockout Programmable oscillator frequency 1 f = 1.4 ( + 75 Ω) C Matched propagation delay for both channels Low side output in phase with Description he I2152 is a high voltage, high speed, selfoscillating power MOSFE and IGB driver with both high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. he front end features a programmable oscillator which is similar to the 555 timer. he output drivers feature a high pulse current buffer stage and an internal deadtime designed for minimum driver cross-conduction. Propagation delays for the two channels are matched to simplify use in 50% duty cycle applications. he floating channel can be used to drive an N-channel power MOSFE or IGB in the high side configuration that operates off a high voltage rail up to 600 volts. Preliminary Data Sheet No. PD60035I SELF-OSCILLAING HALF-BIDGE DIVE ypical Connection I2152 (NOE: For new designs, we recommend I s new products I2154 and I21541) Product Summary V OFFSE 600V max. Duty Cycle 50% I O +/- V OU 100 ma / 210 ma 10-20V Deadtime (typ.) 1.2 µs Packages 8 Lead PDIP 8 Lead SOIC up to 600V V B O AD COM V S 1

2 Absolute Maximum atings Absolute Maximum atings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. he hermal esistance and Power Dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units V B High side floating supply voltage V S High side floating supply offset voltage V B - 25 V B V High side floating output voltage V S V B V Low side output voltage V voltage V C voltage I CC Supply current (note 1) 25 I output vurrent -5 5 dv s /dt Allowable offset supply voltage transient 50 V/ns P D Package power A +25 C (8 Lead DIP) 1.0 (8 Lead SOIC) HJA hermal resistance, junction to ambient (8 Lead DIP) 125 (8 Lead SOIC) 200 J Junction temperature 150 S Storage temperature C L Lead temperature (soldering, 10 seconds) 300 V ma W C/W ecommended Operating Conditions he input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. he V S offset rating is tested with all supplies biased at 15V differential. Symbol Definition Min. Max. Units V B High Side Floating Supply Absolute Voltage V S + 10 V S + 20 V S High Side Floating Supply Offset Voltage 600 V High Side Floating Output Voltage V S V B V Low Side Output Voltage 0 I CC Supply Current (Note 1) 5 ma A Ambient emperature C V Note 1: Because of the I2152 s application specificity toward off-line supply systems, this IC contains a zener clamp structure between the chip and COM which has a nominal breakdown voltage of 15.6V. herefore, the IC supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value resistor connected between the chip and the rectified line voltage and a local decoupling capacitor from to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. herefore, this circuit should not be driven by a DC, low impedance power source of greater than V CLAMP. 2

3 Dynamic Electrical Characteristics V BIAS (, V BS ) = 12V, C L = 1000 pf and A = 25 C unless otherwise specified. Symbol Definition Min. yp. Max. Units est Conditions t r urn-on rise time t f urn-off fall time D Deadtime µs D duty cycle % Static Electrical Characteristics V BIAS (, V BS ) = 12V, C L = 1000 pf, = 1 nf and A = 25 C unless otherwise specified. he V IN, V H and I IN parameters are referenced to COM. he V O and I O parameters are referenced to COM and are applicable to the respective output leads: or. Symbol Definition Min. yp. Max. Units est Conditions f OSC Oscillator frequency = 35.7 kω khz = 7.04 kω V CLAMP zener shunt clamp voltage I CC = 5 ma V C+ 2/3 threshold V V C- 1/3 threshold V CUV undervoltage lockout, V< <UV+ V + high level output voltage, I = -100 µa 3 ns I = -1 ma V - low level output voltage I = 100 µa mv I = 1 ma V UV undervoltage lockout V< <UV+ V OH High level output voltage, V BIAS - V O 100 I O = 0A V OL Low level output voltage, V O 100 I O = 0A I LK Offset supply leakage current 50 V B = V S = 600V I QBS Quiescent V BS supply current I QCC Quiescent supply current I C input current UV+ supply undervoltage positive going threshold UV- supply undervoltage negative going V threshold UVH supply undervoltage lockout hysteresis mv I O+ Output high short circuit pulsed current V O = 0V ma I O- Output low short circuit pulsed current V O = 15V µa

4 Functional Block Diagram - + UV DEEC S Q Q DEAD IME PULSE GEN HV LEVEL SHIF PULSE FILE S Q V B V S - + DEAD IME DELAY 15.6V COM Lead Definitions Symbol V B V S COM Description Oscillator timing resistor input,in phase with for normal IC operation Oscillator timing capacitor input, the oscillator frequency according to the following equation: 1 f = 1.4 ( + 75 Ω) C where 75Ω is the effective impedance of the output stage High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return Lead Assignments 8 Lead PDIP 8 Lead SOIC I2152 I2152S 4

5 8 Lead PDIP Lead SOIC

6 UV+ V CLAMP () () 50% 50% t r t f 90% 90% 10% 10% Figure 1. Input/Output iming Diagram Figure 2. Switching ime Waveform Definitions 50% 50% 90% 90% 10% D 10% Figure 3. Deadtime Waveform Definitions WOLD HEADQUAES: 233 Kansas St., El Segundo, California el: (310) I GEA BIAIN: Hurst Green, Oxted, Surrey H8 9BB, UK el: I CANADA: 15 Lincoln Court, Brampton, Ontario L6 3Z2 el: (905) I GEMANY: Saalburgstrasse 157, Bad Homburg el: I IALY: Via Liguria 49, Borgaro, orino el: I FA EAS: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, oshima-ku, okyo, Japan 171 el: I SOUHEAS ASIA: 1 Kim Seng Promenade, Great World City West ower, 13-11, Singapore el: IAIWAN: 16 Fl. Suite D..207, Sec.2, un Haw South oad, aipei, 10673, aiwan el: Data and specifications subject to change without notice. 3/1/99 6