3-PHASE BRIDGE DRIVER

Transcription

1 Data Sheet No. PD-6.33E IR2132 Features n Floating channel designed for bootstrap operation Fully operational to +6V Tolerant to negative transient voltage dv/dt immune n Gate drive supply range from 1 to 2V n Undervoltage lockout for all channels n Over-current shutdown turns off all six drivers n Independent half-bridge drivers n Matched propagation delay for all channels n Outputs out of phase with inputs Description The IR2132 is a high voltage, high speed power MOSFET and IGBT driver with three independent high and low side referenced output channels. Proprietary HVIC technology enables ruggedized monolithic construction. Logic inputs are compatible with 5V CMOS or LSTTL outputs. A ground-referenced operational amplifier provides analog feedback of bridge current via an external current sense resistor. A current trip function which terminates all six outputs is also derived from this resistor. An open drain FAULT signal indicates if an over-current or undervoltage shutdown has occurred. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use at high frequencies. The floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operate up to 6 volts. Typical Connection 3-PHASE BRIDGE DRIVER Product Summary V OFFSET I O +/- V OUT t on/off (typ.) 6V max. 2 ma / 42 ma 1-2V 675 & 425 ns Deadtime (typ.).8 µs Packages CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-165

2 Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to V S. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 5 through 53. Parameter Value Symbol Definition Units V B1,2,3 High Side Floating Supply Voltage V S1,2,3 High Side Floating Offset Voltage V B1,2,3-25 V B1,2,3 +.3 V HO1,2,3 High Side Floating Output Voltage V S1,2,3 -.3 V B1,2,3 +.3 V CC Low Side and Logic Fixed Supply Voltage V SS Logic Ground V CC - 25 V CC +.3 V LO1,2,3 Low Side Output Voltage -.3 V CC +.3 V V IN Logic Input Voltage (HIN1,2,3, LIN1,2,3 & ITRIP) V SS -.3 V CC +.3 V FLT FAULT Output Voltage V SS -.3 V CC +.3 V CAO Operational Amplifier Output Voltage V SS -.3 V CC +.3 V CA- Operational Amplifier Inverting Input Voltage V SS -.3 V CC +.3 dv S /dt Allowable Offset Supply Voltage Transient 5 V/ns P D Package Power TA +25 C (28 Lead DIP) 1.5 (28 Lead SOIC) 1.6 W (44 Lead PLCC) 2. R θja Thermal Resistance, Junction to Ambient (28 Lead DIP) 83 (28 Lead SOIC) 78 C/W (44 Lead PLCC) 63 T J Junction Temperature 15 T S Storage Temperature C T L Lead Temperature (Soldering, 1 seconds) 3 Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to V S. The V S offset rating is tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54. Parameter Value Symbol Definition Units V B1,2,3 High Side Floating Supply Voltage V S1,2,3 + 1 V S1,2,3 + 2 V S1,2,3 High Side Floating Offset Voltage Note 1 6 V HO1,2,3 High Side Floating Output Voltage V S1,2,3 V B1,2,3 V CC Low Side and Logic Fixed Supply Voltage 1 2 V SS Logic Ground -5 5 V LO1,2,3 Low Side Output Voltage V CC V V IN Logic Input Voltage (HIN1,2,3, LIN1,2,3 & ITRIP) V SS V SS + 5 V FLT FAULT Output Voltage V SS V CC V CAO Operational Amplifier Output Voltage V SS 5 V CA- Operational Amplifier Inverting Input Voltage V SS 5 T A Ambient Temperature C Note 1: Logic operational for V S of (V S - 5V) to (V S + 6V). Logic state held for V S of (V S - 5V) to (V S - V BS ). B-166 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL

3 Dynamic Electrical Characteristics V BIAS (V CC, V BS1,2,3 ) = 15V, V S,1,2,3 = V SS, C L = 1 pf and T A = 25 C unless otherwise specified. The dynamic electrical characteristics are defined in Figures 3 through 5. Parameter Value Symbol Definition Figure Units Test Conditions t on Turn-On Propagation Delay t off Turn-Off Propagation Delay V IN = & 5V t r Turn-On Rise Time V S1,2,3 = to 6V t f Turn-Off Fall Time ns t itrip ITRIP to Output Shutdown Prop. Delay V IN, V ITRIP = & 5V t bl ITRIP Blanking Time 4 V ITRIP = 1V t flt ITRIP to FAULT Indication Delay V IN, V ITRIP = & 5V t flt,in Input Filter Time (All Six Inputs) 31 V IN = & 5V t fltclr LIN1,2,3 to FAULT Clear Time V IN, V ITRIP = & 5V µs DT Deadtime V IN = & 5V SR+ Operational Amplifier Slew Rate (+) SR- Operational Amplifier Slew Rate (-) V/µs Static Electrical Characteristics V BIAS (V CC, V BS1,2,3 ) = 15V, V S,1,2,3 = V SS and T A = 25 C unless otherwise specified. The V IN, V TH and I IN parameters are referenced to V SS and are applicable to all six logic input leads: HIN1,2,3 & LIN1,2,3. The V O and I O parameters are referenced to V S,1,2,3 and are applicable to the respective output leads: HO1,2,3 or LO1,2,3. Parameter Value Symbol Definition Figure Units Test Conditions V IH Logic Input Voltage (OUT = LO) V IL Logic 1 Input Voltage (OUT = HI) 22.8 V V IT,TH+ ITRIP Input Positive Going Threshold V OH High Level Output Voltage, V BIAS - VO 24 1 mv V IN = V, I O = A V OL Low Level Output Voltage, VO 25 1 V IN = 5V, I O = A I LK Offset Supply Leakage Current 26 5 V B = V S = 6V µa I QBS Quiescent V BS Supply Current V IN = V or 5V I QCC Quiescent V CC Supply Current ma V IN = V or 5V I IN+ Logic 1 Input Bias Current (OUT = HI) V IN = V I IN- Logic Input Bias Current (OUT = LO) µa V IN = 5V I ITRIP+ High ITRIP Bias Current ITRIP = 5V I ITRIP- Low ITRIP Bias Current 32 1 na ITRIP = V V BSUV+ V BS Supply Undervoltage Positive Going Threshold V BSUV- V BS Supply Undervoltage Negative Going Threshold V CCUV+ V CC Supply Undervoltage Positive Going V Threshold V CCUV- V CC Supply Undervoltage Negative Going Threshold R on,flt FAULT Low On-Resistance Ω CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-167

4 Static Electrical Characteristics -- Continued V BIAS (V CC, V BS1,2,3 ) = 15V, V S,1,2,3 = V SS and T A = 25 C unless otherwise specified. The V IN, V TH and I IN parameters are referenced to V SS and are applicable to all six logic input leads: HIN1,2,3 & LIN1,2,3. The V O and I O parameters are referenced to V S,1,2,3 and are applicable to the respective output leads: HO1,2,3 or LO1,2,3. Parameter Value Symbol Definition Figure Units Test Conditions I O+ Output High Short Circuit Pulsed Current V O = V, V IN = V PW 1 µs ma I O- Output Low Short Circuit Pulsed Current V O = 15V, V IN = 5V PW 1 µs V OS Operational Amplifer Input Offset Voltage 4 3 mv V S = V CA- =.2V I CA- CA- Input Bais Current na V CA- = 2.5V CMRR Op. Amp. Common Mode Rejection Ratio V S =V CA- =.1V & 5V PSRR Op. Amp. Power Supply Rejection Ratio db V S = V CA- =.2V V CC = 1V & 2V V OH,AMP Op. Amp. High Level Output Voltage V V CA- = V, V S = 1V V OL,AMP Op. Amp. Low Level Output Voltage 45 2 mv V CA- = 1V, V S = V I SRC,AMP Op. Amp. Output Source Current V CA- = V, V S = 1V V CAO = 4V I SRC,AMP Op. Amp. Output Sink Current V CA- = 1V, V S = V V CAO = 2V ma I O+,AMP Operational Amplifier Output High Short V CA- = V, V S = 5V Circuit Current V CAO = V I O-,AMP Operational Amplifier Output Low Shor t V CA- = 5V, V S = V Circuit Current V CAO = 5V Lead Assignments 28 Lead DIP 44 Lead PLCC w/o 12 Leads 28 Lead SOIC (Wide Body) IR2132 IR2132J IR2132S Part Number B-168 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL

5 Functional Block Diagram Lead Definitions Lead Symbol Description HIN1,2,3 Logic inputs for high side gate driver outputs (HO1,2,3), out of phase LIN1,2,3 Logic inputs for low side gate driver output (LO1,2,3), out of phase FAULT Indicates over-current or undervoltage lockout (low side) has occurred, negative logic Low side and logic fixed supply V CC ITRIP CAO CA- V SS V B1,2,3 HO1,2,3 V S1,2,3 LO1,2,3 V S Input for over-current shutdown Output of current amplifier Negative input of current amplifier Logic ground High side floating supplies High side gate drive outputs High side floating supply returns Low side gate drive outputs Low side return and positive input of current amplifier CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-169

6 Device Information Process & Design Rule HVDCMOS 4. µm Transistor Count 7 Die Size 126 X 175 X 26 (mil) Die Outline Thickness of Gate Oxide 8Å Connections Material Poly Silicon First Width 4 µm Layer Spacing 6 µm Thickness 5Å Material Al - Si (Si: 1.% ±.1%) Second Width 6 µm Layer Spacing 9 µm Thickness 2,Å Contact Hole Dimension 8 µm X 8 µm Insulation Layer Material PSG (SiO 2 ) Thickness 1.5 µm Passivation Material PSG (SiO 2 ) (1) Thickness 1.5 µm Passivation Material Proprietary* (2) Thickness Proprietary* Method of Saw Full Cut Method of Die Bond Ablebond 84-1 Wire Bond Method Thermo Sonic Material Au (1. mil / 1.3 mil) Leadframe Material Cu Die Area Ag Lead Plating Pb : Sn (37 : 63) Package Types 28 Lead PDIP & SOIC / 44 Lead PLCC Materials EME63 / MP15 / MP19 Remarks: * Patent Pending B-17 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL

7 HIN1,2,3 LIN1,2,3 ITRIP IR2132 FAULT HO1,2,3 LO1,2,3 Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit HIN1,2,3 HIN1,2,3 LIN1,2,3 5% 5% 5% 5% LIN1,2,3 LO1,2,3 5% 5% t on t r t off t f 9% 9% HO1,2,3 DT DT HO1,2,3 LO1,2,3 1% 1% Figure 3. Deadtime Waveform Definitions Figure 4. Input/Output Switching Time Waveform Definitions LIN1,2,3 5% V CC ITRIP FAULT 5% 5% 5% V S CA- + - V SS CAO LO1,2,3 5% t flt t fltclr V SS t itrip Figure 5. Overcurrent Shutdown Switching Time Waveform Definitions Figure 6. Diagnostic Feedback Operational Amplifier Circuit CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-171

8 15V 15V V 3V + CA- - CA- V S + - V CC V SS CAO 5 pf V S V CC V SS CAO + 2k 3V T1 9% T2.2V 1k V 1% V V V SR+ = SR- = T1 T2 Figure 7. Operational Amplifier Slew Rate Measurement V OS = V CAO V Figure 8. Operational Amplifier Input Offset Voltage Measurement V CC V S V SS CAO Measure V CAO1 at V S =.1V V CAO2 at V S = 5V (V CAO1 -.1V) - (V CAO2-5V) CMRR = -2 * LOG (db) 4.9V Figure 9. Operational Amplifier Common Mode Rejection Ratio Measurements.2V + 15V V CC - CA- + V S + CA- - 1k 2k V SS CAO Measure V CAO1 at V CC = 1V V CAO2 at V CC = 2V PSRR = -2 * LOG V CAO1 - V CAO2 (1V) (21) Figure 1. Operational Amplifier Power Supply Rejection Ratio Measurements Turn-On Delay Time (µs).9.6 Turn-On Delay Time (µs) Figure 11A. Turn-On Time vs. Temperature. VBIAS Supply Voltage (V) Figure 11B. Turn-On Time vs. Voltage B-172 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL

9 Turn-Off Delay Time (µs).6.4 Turn-Off Delay Time (µs) Figure 12A. Turn-Off Time vs. Temperature. VBIAS Supply Voltage (V) Figure 12B. Turn-Off Time vs. Voltage Turn-On Rise Time (ns) 15 1 Turn-On Rise Time (ns) Figure 13A. Turn-On Rise Time vs. Temperature VBIAS Supply Voltage (V) Figure 13B. Turn-On Rise Time vs. Voltage Turn-Off Fall Time (ns) 75 5 Turn-Off Fall Time (ns) Figure 14A. Turn-Off Fall Time vs. Temperature VBIAS Supply Voltage (V) Figure 14B. Turn-Off Fall Time vs. Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-173

10 ITRIP to Output Shutdown Delay Time (µs) ITRIP to Output Shutdown Delay Time (µs) Figure 15A. ITRIP to Output Shutdown Time vs. Temperature. VBIAS Supply Voltage (V) Figure 15B. ITRIP to Output Shutdown Time vs. Voltage ITRIP to FAULT Indication Delay Time (µs) ITRIP to FAULT Indication Delay Time (µs) Figure 16A. ITRIP to FAULT Indication Time vs. Temperature. Figure 16B. ITRIP to FAULT Indication Time vs. Voltage LIN1,2,3 to FAULT Clear Time (µs) LIN1,2,3 to FAULT Clear Time (µs) Figure 17A. LIN1,2,3 to FAULT Clear Time vs. Temperature B-174 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL. Figure 17B. LIN1,2,3 to FAULT Clear Time vs. Voltage

11 Deadtime (µs) Deadtime (µs) Figure 18A. Deadtime vs. Temperature. VBIAS Supply Voltage (V) Figure 18B. Deadtime vs. Voltage Amplifier Slew Rate + (V/µs) Amplifier Slew Rate + (V/µs) Figure 19A. Amplifier Slew Rate (+) vs. Temperature. Figure 19B. Amplifier Slew Rate (+) vs. Voltage Amplifier Slew Rate - (V/µs) Amplifier Slew Rate - (V/µs) Figure 2A. Amplifier Slew Rate (-) vs. Temperature. Figure 2B. Amplifier Slew Rate (-) vs. Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-175

12 Logic "" Input Threshold (V) Logic "" Input Threshold (V) Figure 21A. Logic Input Threshold vs. Temperature. Figure 2B. Logic Input Threshold vs. Voltage Logic "1" Input Threshold (V) Logic "1" Input Threshold (V) Figure 22A. Logic 1 Input Threshold vs. Temperature. Figure 22B. Logic 1 Input Threshold vs. Voltage ITRIP Input Positive Going Threshold (mv) ITRIP Input Positive Going Threshold (mv) Figure 23A. ITRIP Input Positive Going Threshold vs. Temperature B-176 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL Figure 23B. ITRIP Input Positive Going Threshold vs. Voltage

13 High Level Output Voltage (V).6.4 High Level Output Voltage (V) Figure 24A. High Level Output vs. Temperature. VBIAS Supply Voltage (V) Figure 24B. High Level Output vs. Voltage Low Level Output Voltage (V).6.4 Low Level Output Voltage (V) Figure 25A. Low Level Output vs. Temperature. VBIAS Supply Voltage (V) Figure 25B. Low Level Output vs. Voltage 5 5 Offset Supply Leakage Current (µa) Figure 26A. Offset Supply Leakage Current vs. Temperature Offset Supply Leakage Current (µa) VB Boost Voltage (V) Figure 26B. Offset Supply Leakage Current vs. Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-177

14 VBS Supply Current (µa) 6 4 VBS Supply Current (µa) Figure 27A. V BS Supply Current vs. Temperature VBS Floating Supply Voltage (V) Figure 27B. V BS Supply Current vs. Voltage VCC Supply Current (ma) V CC Supply Current (ma) Figure 28A. V CC Supply Current vs. Temperature. Figure 28B. V CC Supply Current vs. Voltage Logic "1" Input Bias Current (ma) Logic "1" Input Bias Current (ma) Figure 29A. Logic 1 Input Current vs. Temperature. Figure 29A. Logic 1 Input Current vs. Voltage B-178 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL

15 Logic "" Input Bias Current (ma) Logic "" Input Bias Current (ma) Figure 3A. Logic Input Current vs. Temperature. Figure 3B. Logic Input Current vs. Voltage "High" ITRIP Bias Current (µa) "High" ITRIP Bias Current (µa) Figure 31A. High ITRIP Current vs. Temperature Figure 31B. High ITRIP Current vs. Voltage "Low" ITRIP Bias Current (na) "Low" ITRIP Bias Current (µa) Figure 32A. Low ITRIP Current vs. Temperature Figure 32B. Low ITRIP Current vs. Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-179

16 VBS Undervoltage Lockout + (V) VBS Undervoltage Lockout - (V) Figure 33. V BS Undervoltage (+) vs. Temperature 6. Figure 34. V BS Undervoltage (-) vs. Temperature VCC Undervoltage Lockout + (V) V CC Undervoltage Lockout - (V) Figure 35. V CC Undervoltage (+) vs. Temperature 6. Figure 36. V CC Undervoltage (-) vs. Temperature FAULT- Low On Resistance (ohms) FAULT- Low On Resistance (ohms) Figure 37A. FAULT Low On Resistance vs. Temperature B-18 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL Figure 37B. FAULT Low On Resistance vs. Voltage

17 Output Source Current (ma) 3 2 Output Source Current (ma) Figure 38A. Output Source Current vs. Temperature VBIAS Supply Voltage (V) Figure 38B. Output Source Current vs. Voltage Output Sink Current (ma) 45 3 Output Sink Current (ma) Figure 39A. Output Sink Current vs. Temperature VBIAS Supply Voltage (V) Figure 39B. Output Sink Current vs. Voltage 5 5 Amplifier Input Offset Voltage (mv) Amplifier Input Offset Voltage (mv) Figure 4A. Amplifier Input Offset vs. Temperature Figure 4B. Amplifier Input Offset vs. Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-181

18 CA- Input Bias Current (na) CA- Input Bias Current (na) Figure 41A. CA- Input Current vs. Temperature. Figure 41B. CA- Input Current vs. Voltage Amplifier CMRR (db) 6 4 Amplifier CMRR (db) Figure 42A. Amplifier CMRR vs. Temperature Figure 42B. Amplifier CMRR vs. Voltage Amplifier PSRR (db) 6 4 Amplifier PSRR (db) Figure 43A. Amplifier PSRR vs. Temperature Figure 43B. Amplifier PSRR vs. Voltage B-182 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL

19 6. 6. Amplifier High Level Output Voltage (V) Amplifier High Level Output Voltage (V) Figure 44A. Amplifier High Level Output vs. Temperature 4.5 Figure 44B. Amplifier High Level Output vs. Voltage 1 1 Amplifier Low Level Output Voltage (mv) Amplifier Low Level Output Voltage (mv) Figure 45A. Amplifier Low Level Output vs. Temperature Figure 45B. Amplifier Low Level Output vs. Voltage Amplifier Output Source Current (ma) Amplifier Output Source Current (ma) Figure 46A. Amplifier Output Source Current vs. Temperature. Figure 46B. Amplifier Output Source Current vs. Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-183

20 5. 5. Amplifier Output Sink Current (ma) Amplifier Output Sink Current (ma) Figure 47A. Amplifier Output Sink Current vs. Temperature. Figure 47B. Amplifier Output Sink Current vs. Voltage Output High Short Circuit Current (ma) Output High Short Circuit Current (ma) Figure 48A. Amplifier Output High Short Circuit Current vs. Temperature. Figure 48B. Amplifier Output High Short Circuit Current vs. Voltage Output Low Short Circuit Current (ma) Output Low Short Circuit Current (ma) Figure 49A. Amplifier Output Low Short Circuit Current vs. Temperature B-184 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL. Figure 49B. Amplifier Output Low Short Circuit Current vs. Voltage

21 5 5 48V 45 48V 45 Junction V 16V V Junction V 16V V E+2 1E+3 1E+4 1E+5 Frequency (Hz) Figure 5. IR2132 T J vs. Frequency (IRF82) R GATE = 33Ω, V CC = 15V 2 1E+2 1E+3 1E+4 1E+5 Frequency (Hz) Figure 51. IR2132 T J vs. Frequency (IRF83) R GATE = 2Ω, V CC = 15V V V Junction V 32V 16V V Junction V V 2 1E+2 1E+3 1E+4 1E+5 Frequency (Hz) Figure 52. IR2132 T J vs. Frequency (IRF84) R GATE = 15Ω, V CC = 15V 2 1E+2 1E+3 1E+4 1E+5 Frequency (Hz) Figure 53. IR2132 T J vs. Frequency (IRF45) R GATE = 1Ω, V CC = 15V. VS Offset Supply Voltage (V) VBS Floating Supply Voltage (V) Figure 54. Maximum V S Negative Offset vs. V BS Supply Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-185