IR2175(S) & (PbF) LINEAR CURRENT SENSING IC

Transcription

1 Data Sheet No. PD0208 Rev. E IR21(S) & (PbF) LINEAR CURRENT SENSING IC Features Floating channel up to +00V Monolithic integration Linear current feedback through shunt resistor Direct digital PWM output for easy interface Low IQBS allows the boot strap power supply Independent fast overcurrent trip signal High common mode noise immunity Input overvoltage protection for IGBT short circuit condition Open Drain outputs Also available LEAD-FREE Description The IR21 is a monolithic current sensing IC designed for motor drive applications. It senses the motor phase current through an external shunt resistor, converts from analog to digital signal, and transfers the signal to the low side. IR s proprietary high voltage isolation technology is implemented to enable the high bandwidth signal processing. The output format is discrete PWM to eliminate need for the A/D input interface for the IR21. The dedicated overcurrent trip () signal facilitates IGBT short circuit protection. The open-drain outputs make easy for any interface from 3.3V to 1V. S Block Diagram Product Summary V OFFSET 00Vmax I QBS 2mA Vin +/-20mVmax Gain temp.drift 20ppm/ o C (typ.) fo Overcurrent trip signal delay Overcurrent trip level Packages 8 Lead PDIP IR21 Up to 00V 130kHz (typ.) 2µsec (typ) +/-20mV (typ.) 8 Lead SOIC IR21S 1V VCC V+ PWM Output GND Overcurrent IR21 VS VB To Motor Phase (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.

2 Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units V S High side offset voltage V BS High side floating supply voltage V CC Low side and logic fixed supply voltage V IN Maximum input voltage between V IN+ and V S - V Digital PWM output voltage -0.3 VCC +0.3 V Overcurrent output voltage -0.3 VCC +0.3 dv/dt Allowable offset voltage slew rate 0 V/ns P D Package power T A +2 C 8 lead SOIC.2 8 lead PDIP 1.0 W Rth JA Thermal resistance, junction to ambient 8 lead SOIC lead PDIP 12 C/W T J Junction temperature 10 T S Storage temperature - 10 C T L Lead temperature (soldering, 10 seconds) 300 Note 1: Capacitors are required between VB and Vs when bootstrap power is used. The external power supply, when used, is required between VB and Vs pins. V Recommended Operating Conditions The output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. Symbol Definition Min. Max. Units V B High side floating supply voltage V S V S +20 V S High side floating supply offset voltage V Digital PWM output voltage VCC V V Overcurrent output voltage VCC V CC Low side and logic fixed supply voltage V IN Input voltage between V IN+ and V S mv T A Ambient temperature C 2

3 DC Electrical Characteristics V CC = V BS = 1V, and T A = 2 o unless otherwise specified. Symbol Definition Min. Typ. Max. Units Test Conditions V IN Nominal input voltage range before saturation Note 1: ±10mV offset represents ±1.% duty cycle fluctuation Note 2: Gain = (full range of duty cycle in %) / (full input voltage range). V IN+ _ V S V + Overcurrent trip positive input voltage 20 V - Overcurrent trip negative input voltage -20 V OS Input offset voltage V IN = 0V (Note 1) V OS/ TA Input offset voltage temperature drift 2 µv/ o C G Gain (duty cycle % per V IN ) %/V max gain error=% (Note 2) G/ TA Gain temperature drift 20 ppm/ o C I LK Offset supply leakage current 0 µa V B = V S = 00V I QBS Quiescent V BS supply current 2 V S = 0V ma I QCC Quiescent V CC supply current 0. LIN Linearity (duty cycle deviation from ideal linearity 0. 1 % curve) V LIN/ TA Linearity temperature drift.00 %/ o C I O Digital PWM output sink current 20 2 ma I C output sink current 10 1 AC Electrical Characteristics V CC = V BS = 1V, and T A = 2 o unless otherwise specified. mv V O = 1V V O = 0.1V V O = 1V V O = 0.1V Symbol Definition Min. Typ. Max. Units Test Conditions Propagation delay characteristics fo Carrier frequency output khz f/ TA Temperature drift of carrier frequency 00 ppm/ o C Dmin Minimum duty 9 % Dmax Maximum duty 91 % VIN+=+20mV BW fo bandwidth 1 khz PHS Phase shift at 1kHz -10 o tdoc Propagation delay time of 1 2 twoc Low true pulse width of 1. µsec figure 1 V IN = 0 & V VIN+=-20mV, V IN + = 100mVpk -pk sine wave, gain=-3db V IN + =100mVpk-pk sine wave 3

4 Timing Waveforms Duty=9% Vin+= -20mV Vs = 0V Duty=91% Vin+= +20mV Vs = 0V Carrier Frequency = 130kHz Figure 1 Output waveform Application Hint: Temperature drift of the output carrier frequency can be cancelled by measuring both a PWM period and the on-time of PWM (Duty) at the same time. Since both periods vary in the same direction, computing the ratio between these values at each PWM period gives consistent measurement of the current feedback over the temperature drift. 4

5 Lead Definitions Symbol Description V CC V IN+ V B V S N.C. Low side and logic supply voltage Low side logic ground Positive sense input High side supply High side return Digital PWM output Overcurrent output (negative logic) No connection Lead Assignment 1 VC C VIN VC C VIN Vs 2 Vs 3 V B 3 V B 4 NC 4 NC 8 lead SOIC Also available LEAD-FREE (PbF) 8 lead PDIP Also available LEAD-FREE (PbF) IR21S IR21

6 Case Outlines 8 Lead PDIP (MS-001AB) A E X D e B H 0.2 [.010] A.4 [.2] 3X 1.2 [.00] FOOTPRINT 8X 0.2 [.028] 8X 1.8 [.00] DIM INC HES MILLIMETERS MIN MAX MIN MAX A A b c D E e.00 BASIC 1.2 BASIC e1.02 BASIC 0.3 BASIC H K L y e1 A C y K x 4 8X b A1 0.2 [.010] C A B 0.10 [.004] 8X L 8X c NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.M CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 8 Lead SOIC DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.1 [.00]. DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.2 [.010]. DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE (MS-012AA)

7 LEADFREE PART MARKING INFORMATION Part number IRxxxxxx Date code YWW? IR logo Pin 1 Identifier? MARKING CODE P Lead Free Released Non-Lead Free Released?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP ORDER INFORMATION Basic Part (Non-Lead Free) 8-Lead PDIP IR21 order IR21 8-Lead SOIC IR21S order IR21S Leadfree Part 8-Lead PDIP IR21 order IR21PbF 8-Lead SOIC IR21S order IR21SPbF Thisproduct has been designed and qualified for the industrial market. Qualification Standards can be found on IR s Web Site Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9024 Tel: (310) //2004