1 RevH,

Transcription

1 PD RevH IRAMS10UP60A 1 RevH,

2 Internal Electrical Schematic - IRAMS10UP60A V + (10) VRU (12) VRV (13) VRW (14) Rg1 Rg3 Rg5 VB1 (7) U, VS1 (8) VB2 (4) V, VS2 (5) VB3 (1) W, VS3 (2) HIN1 (15) HIN2 (16) HIN3 (17) R 3 23 VS1 24 HO1 25 VB1 1 VCC 2 HIN1 3 HIN2 4 HIN3 22 VB2 21 HO2 20 VS2 19 VB3 Driver IC 18 HO3 17 VS3 LO1 16 LO2 15 LO3 14 Rg2 Rg4 Rg6 LIN1 (18) 5 LIN1 LIN2 6 LIN3 7 F 8 ITRIP 9 EN 10 RCIN 11 VSS 12 COM 13 LIN2 (19) LIN3 (20) R 1 R2 T/I TRIP (21) R T THERMISTOR VDD (22) C VSS (23) 2

3 Inverter Section Electrical T J = 25 C Inverter Section Switching Characteristics Thermal Resistance IRAMS10UP60A Symbol Parameter Min Typ Max Units Conditions V (BR)CES Collector-to-Emitter Breakdown Voltage V V IN =0V, I C =20µA V (BR)CES / T V CE(ON) I CES I lk_module V FM Symbol Parameter Min Typ Max Units Conditions E on Turn-On Switching Loss I C =5A, V + =400V E off Turn-Off Switching Loss µj V DD =15V, L=1mH E tot Total Switching Loss T J =25 C See CT1 E on Turn-on Swtiching Loss T J =150 C E off Turn-off Switching Loss µj Energy losses include "tail" and E tot Total Switching Loss diode reverse recovery Erec Diode Reverse Recovery energy µj t rr Diode Reverse Recovery time ns RBSOA SCSOA Reverse Bias Safe Operating Area Short Circuit Safe Operating Area FULL SQUARE µs T J =150 C, V + =400V V DD =15V, I F =5A, L=1mH T J =150 C, I C =5A, V P =600V V + =480V, V DD =+15V to 0V See CT3 T J =150 C, V P =600V, V + =360V, V DD =+15V to 0V Symbol Parameter Min Typ Max Units Conditions R th(j-c) R th(j-c) R th(c-s) Temperature Coeff. Of Breakdown Voltage Collector-to-Emitter Saturation Voltage Zero Gate Voltage Collector Current-to-Emitter Zero Gate Phase-to-Phase Current Diode Forward Voltage Drop Junction to case thermal resistance, each IGBT under inverter operation. Junction to case thermal resistance, each Diode under inverter operation. Thermal Resistance case to sink V V/ C IN =0V, I C =1.0mA (25 C C) I C =5A T J =25 C, V DD =15V V I C =5A T J =150 C V IN =5V, V + =600V µa V IN =5V, V + =600V, T J =150 C µa V IN =5V, V + =600V I C =5A V I C =5A, T J =150 C C/W C/W C/W See CT2 Flat, greased surface. Heatsink compound thermal conductivity - 1W/mK 3

4 Absolute Maximum Ratings Driver Function Absolute Maximum Ratings indicate substaines limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to (Note 1) V SS Symbol Definition Min Max Units V S1,2,3 High Side offset voltage V V B1,2,3 High Side floating supply voltage V V DD Low Side and logic fixed supply voltage V V IN Input voltage LIN, HIN, T/I TRIP V T J Juction Temperature C Recommended Operating Conditions Driver Function The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltages are absolute referenced to V SS. The V S offset is tested with all supplies biased at 15V differential (Note 1). All input pin (V IN ) and I TRIP are clamped with a 5.2V zener diode and pull-up resistor to V DD Symbol Definition Min Max Units V B1,2,3 V DD High side floating supply voltage Low side and logic fixed supply voltage V S V S V S1,2,3 V ITRIP High side floating supply offset voltage T/I TRIP input voltage Note 2 V SS 450 V SS +5 V V V IN Logic input voltage LIN, HIN V SS V SS +5 V Static Electrical Characteristics Driver Function V BIAS (V CC, V BS1,2,3 )=15V, unless otherwise specified. The V IN and I IN parameters are referenced to V SS and are applicable to all six channels. (Note 1) Symbol Definition Min Typ Max Units V IN,th+ Positive going input threshold V V IN,th- Negative going input threshold V V CCUV+ V CC and V BS supply undervoltage Positive going threshold V V BSUV+ V CCUV- V BSUV- V CCUVH V BSUVH V CC and V BS supply undervoltage Negative going threshold V CC and V BS supply undervoltage I lockout hysteresis I QBS Quiescent V BS supply current µa I QCC Quiscent V CC supply current ma I LK Offset Supply Leakage Current µa I IN+ Input bias current (OUT=LO) µa I IN+ Input bias current (OUT=HI) µa V(I TRIP ) I TRIP threshold Voltage (OUT=HI or OUT=LO) V V V 4

5 Dynamic Electrical Characteristics V DD =V BS =V BIAS =15V, I o =1A, V D =9V, PWM IN =2kHz, V IN_ON =V IN _ th+, V IN_OFF =V IN_th- T A =25 C, unless otherwise specified Symbol Definition Min Typ Max Units T ON Input to output propagation turn-on delay time (see fig.11) ns T OFF Input to output propagation turn-off delay time (see fig. 11) ns D T Dead Time ns I/T Trip T/I Trip to six switch to turn-off propagation delay (see fig. 2) ns T FCLTRL Post I Trip to six switch to turn-off clear time (see fig. 2) ms Internal NTC - Thermistor Characteristics Parameter Typ Units Conditions R 25 Resistance 100 +/- 5% kω T C = 25 C R 125 Resistance % /- 14.9% kω T C = 125 C B B-Constant (25-50 C) /- 3% k R 2 = R 1 e [B(1/T2-1/T1)] Temperature Range Typ. Dissipation constant -40 / 125 C 1 mw/ C T C = 25 C Note 1: For more details, see IR21365 data sheet Note 2: Logic operational for V s from V - -5V to V V. Logic stata held for V S from V - -5V to V - -V BS. (Please refer to DT97-3 for more details) Thermistor Built-in IRAMS10UP60A V CC (22) NTC T/I TRIP (21) 12K IR k V SS (23) Note 3: The Maximum recommended sense voltage at the T/I TRIP terminal under normal operating conditions is 3.3V. 5

6 Figure1. Input/Output Timing Diagram HIN1,2,3 LIN1,2,3 HO1,2,3 LO1,2,3 Itrip U,V,W Note 4: The shaded area indicates that both high-side and low-side switches are off and therefore the halfbridge output voltage would be determined by the direction of current flow in the load. Hin1,2,3 Ho V + Itrip HIN1,2,3 LIN1,2,3 U,V,W Vbus X 1 X X X (15,16,17) IC Driver U,V,W (8,5,2) Lin1,2,3 (18,19,20) Lo 6

7 Figure 2. T/I Trip Timing Waveform HIN1,2,3 LIN1,2,3 T/Itrip 50% U,V,W 50% t fltclr Note 5: The shaded area indicates that both high-side and low-side switches are off and therefore the halfbridge output voltage would be determined by the direction of current flow in the load. 7

8 Module Pin-Out Description Pin Name Description 1 VB3 High Side Floating Supply Voltage 3 2 W,VS3 Output 3 - High Side Floating Supply Offset Voltage 3 na none 4 VB2 High Side Floating Supply voltage 2 5 V,VS2 Output 2 - High Side Floating Supply Offset Voltage 6 na none 7 VB1 High Side Floating Supply voltage 1 8 U,VS1 Output 1 - High Side Floating Supply Offset Voltage 9 na none 10 V+ Positive Bus Input Voltage 11 na none 12 LE1 Low Side Emitter Connection - Phase 1 13 LE2 Low Side Emitter Connection - Phase 2 14 LE3 Low Side Emitter Connection - Phase 3 15 HIN1 Logic Input High Side Gate Driver - Phase 1 16 HIN2 Logic Input High Side Gate Driver - Phase 2 17 HIN3 Logic Input High Side Gate Driver - Phase 3 18 LIN1 Logic Input Low Side Gate Driver - Phase 1 19 LIN2 Logic Input Low Side Gate Driver - Phase 2 20 LIN3 Logic Input Low Side Gate Driver - Phase 3 21 T/Itrip Temperature Monitor and Shut-down Pin 22 VCC +15V Main Supply 23 VSS Negative Main Supply 8

9 Typical Application Connection IRAMS10UP60A IRAMS10UP60A VBW U 3-ph AC MOTOR V BOOT-STRAP CAPACITORS VSW VBV VSV CURRENT SENSING CAN USE A SINGLE SENSE RESISTOR OR PHASE LEG SENSING AS SHOWN W VBU VSU DC BUS CAPACITORS PHASE LEG CURRENT SENSE V+ LeU LeV LeW HINU HINV HINW Driver IC CONTROLLER LINU LINV LINW TEMP SENSE 3.3 V 1m 5k 6.8K 10.2k 10m 0.1 m T/ITRIP V DD (15 V) VSS NTC 12k O/C SENSE (ACTIVE LOW) 1. Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible to reduce ringing and EMI problems. Additional high frequency ceramic capacitor mounted close to the module pins will further improve performance. 2. In order to provide good decoupling between V CC -Gnd and V B -V SS terminals, the capacitors shown connected between these terminals should be located very close to the module pins. Additional high frequency capacitors, typically 0.1µF, are strongly recommended. 3. Value of the boot-strap capacitors depends upon the switching frequency. Their selection should be made based on IR design tip DN 98-2a, application note AN-1044 or Figure Low inductance shunt resistors shuld be used for phase leg current sensing. Similarly, the length of the traces between pins 12, 13 and 14 to the corrisponding shunt resistors should be kept as small as possible. 5. Over-current sense signal can be obtained from external hardware detecting excessive instantaneous current in inverter. 9

10 Maximum RMS Output Current/Phase (A) Tc=100 C Tc=110 C Tc=120 C PWM Switching Frequency (khz) Figure 3. Maximum sinusoidal phase current as function of switching frequency V BUS =400V, T j =150 C, Modulation Depth=0.8, PF=0.6 Maximum RMS Phase Current (A) Switching Frequency: 12 khz 16 khz 20 khz Motor Current Modulation Frequency (Hz) Figure 4. Maximum sinusoidal phase current as function of modulation frequency V BUS =400V, T j =150 C, T c =100 C, Modulation Depth=0.8, PF=

11 Current Voltage Current (A) Voltage (V) Time (µs) Figure 5. IGBT Turn-on. Typical turn-on j =125 C, V BUS =400V Current (A) Current Voltage Voltage (V) Time (µs) Figure 6. IGBT Turn-off. Typical turn-off j =125 C, V BUS =400V 11

12 1000 Thermistor Resistance (k_ω) Minimum Nominal Maximum Temperature ( C) Figure 7. Variation of thermistor resistance with temperature 4 3 V sense (V). 2 Maximum Nominal Minimum Thermistor Temperature ( C) Figure 8. Variation of temperature sense voltage with thermistor temperature using external bias resistance of 4.3KΩ, V CC =15V 12

13 180 IGBT Junction Temperature ( C) Thermistor Temperature ( C) Figure 9. Estimated maximum IGBT junction temperature with thermistor temperature Capacitance (µf) Switching Frequency (khz) Figure 10. Recommended minimum Bootstrap Capacitor value Vs Switching Frequency 13

14 Figure 11. Switching Parameter Definitions V CE I C I C V CE 90% I C 50% H IN /L IN 90% I C 50% H IN /L IN H IN /L IN H IN /L IN 10% V CE 10% I C 10% I C T ON t r T OFF t f Figure 11a. Input to Output propagation turn-on delay time Figure 11b. Input to Output propagation turn-off delay timet I F V CE H IN /L IN I rr t rr Figure 11c. Diode Reverse Recovery 14

15 Vbus 5V Ho Hin1,2,3 IC Driver U,V,W Lin1,2,3 Lo Figure CT1. Switching Loss Circuit Vbus Hin1,2,3 Ho IN PWM=4µs V CC 1k 10k Lin1,2,3 IC Driver U,V,W Io 5VZD IN Lo V P =Peak Voltage on the IGBT die I o Figure CT2. S.C.SOA Circuit Vbus Hin1,2,3 Ho IN V CC 1k 10k IC Driver U,V,W Io 5VZD Lin1,2,3 IN Lo V P =Peak Voltage on the IGBT die I o Figure CT3. R.B.SOA Circuit 15

16 Package Outline note 2 note E2D24 note 1 Standard pin leadforming option Notes: Dimensions in mm 1 - Marking for pin 1 identification 2- Product Part Number 3- Lot and Date code marking For mounting instruction see AN

17 Package Outline note 2 note E2D24 note 1 Pin leadforming option -2 Notes: Dimensions in mm 1 - Marking for pin 1 identification 2- Product Part Number 3- Lot and Date code marking Data and Specifications are subject to change without notice IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) TAC Fax: (310) Visit us at for sales contact information Rev.H, 01/