TDM Photonic Network using Deposited Materials

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1 TDM Photonic Network using Deposited Materials ROBERT HENDRY, GILBERT HENDRY, KEREN BERGMAN LIGHTWAVE RESEARCH LAB COLUMBIA UNIVERSITY HPEC 2011

2 Motivation for Silicon Photonics Performance scaling becoming extremely difficult Data movement cost increasingly expensive On/off-chip communication bandwidth limited Photonics offers: Higher bandwidth density High datarate and parallel wavelengths Low operating power Low latency HPEC

3 Target Architectures Optical interconnection network on stacked memory Optical link to memory HPEC

4 Ring Resonators electric control modulator switch Off resonance waveguide waveguide light source optical message signal signal electric control switch On resonance waveguide waveguide signal filter HPEC

5 Electrical control Photonic Communication Light source Photonic Network ring-resonator modulators filters detectors HPEC

6 Electrical control Photonic Communication Light source Photonic Network 10 Gb/s x 3 = 30 Gb/s aggregate bandwidth filters detectors HPEC

Optical Power Budget Optical Power Nonlinear Effects P total = P channel Maximum Network-Level Insertion Loss N Detector Sensitivity Total Injected Power Injected Power Per Wavelength Received Power

7 Optical Power Budget Optical Power Nonlinear Effects P total = P channel Maximum Network-Level Insertion Loss N Detector Sensitivity Total Injected Power Injected Power Per Wavelength Received Power 1 dbm passing by a ring db each The total injectable power P total must remain below a threshold to avoid non-linear effects. P total is then divided among the N wavelengths of a WDM packet, where each channels injects at P channel. waveguide crossing db each 1 mm waveguide propagation -1.0 db/cm total insertion loss 0.32 db 0.68 dbm HPEC

8 Silicon Photonics Technologies Material Crystalline Silicon Propagation Loss 1.7 db/cm [Xia et al. 2007] Crystalline Silicon Best electrical and optical properties Unable to deposit HPEC

9 Silicon Photonics Technologies Material Crystalline Silicon Polycrystalline Silicon Propagation Loss 1.7 db/cm [Xia et al. 2007] 6.45 db/cm [Fang et al. 2008] Crystalline Silicon Best electrical and optical properties Unable to deposit Polycrystalline Silicon Can deposit Very lossy HPEC

10 Silicon Photonics Technologies Material Crystalline Silicon Polycrystalline Silicon Silicon Nitride Propagation Loss 1.7 db/cm [Xia et al. 2007] 6.45 db/cm [Fang et al. 2008] 0.1 db/cm [Shaw et al. 2005] [Gondarenko et al. 2009] Crystalline Silicon Best electrical and optical properties Unable to deposit Polycrystalline Silicon Can deposit Very lossy Silicon Nitride Very low loss Can deposit Not useful active devices HPEC

11 Poly-Si / SiN Combination approach We can use silicon nitride and polycrystalline silicon in combination SiN for non-active wave guides Poly-Si for active devices (e.g. ring-resonator based switch) Designs for a layered modulator and switch HPEC

12 Poly-Si / SiN Combination approach Waveguide crossings eliminated Insertion loss, crosstalk both incurred heavily in waveguide crossings However,.1 db insertion loss per vertical coupling [Sun et al. 2008] HPEC

13 Insertion Loss Analysis Worst-case insertion loss for a photonic mesh [Biberman et al. 2011] HPEC

14 Insertion Loss Analysis Worst-case insertion loss for a photonic mesh [Biberman et al. 2011] HPEC

15 Photonic TDM NoC Architecture Mesh topology No electronic links, other than TDM clock distribution Time slot 1 Time slot 2 TIME Time slot 3 Time slot 4 Time slot 5 HPEC

16 Photonic TDM NoC Architecture Mesh topology No electronic links, other than TDM clock distribution Time slot 1 Time slot 2 TIME Time slot 3 Time slot 4 Time slot 5 HPEC

17 Photonic TDM NoC Architecture Mesh topology No electronic links, other than TDM clock distribution Time slot 1 Time slot 2 TIME Time slot 3 Time slot 4 Time slot 5 HPEC

18 Photonic TDM NoC Architecture Mesh topology No electronic links, other than TDM clock distribution Time slot 1 Time slot 2 TIME Time slot 3 Time slot 4 Time slot 5 HPEC

19 Photonic TDM NoC Architecture Mesh topology No electronic links, other than TDM clock distribution Time slot 1 Time slot 2 TIME Time slot 3 Time slot 4 Time slot 5 HPEC

20 Photonic TDM NoC Architecture Mesh topology No electronic links, other than TDM clock distribution Time slot 1 Time slot 2 TIME Time slot 3 Time slot 4 Time slot 5 HPEC

P total = P channel N Optical Power Maximum

21 X-Y Buffering Mesh topology No electronic links, other than TDM clock distribution Nonlinear Effects P total = P channel N Optical Power Maximum Network-Level Insertion Loss Detector Sensitivity HPEC

22 Photonic TDM vs. Photonic Circuit-Switched Insertion Loss HPEC

23 Single-Layer Switch vs. Multi-layer Switch Single-layer TDM Switch Multi-layer TDM Switch Gateway 1 North East West 4 Control South HPEC

24 Single-Layer Switch vs. Multi-layer Switch Single-layer TDM Switch Multi-layer TDM Switch Gateway 1 North East West 4 Control South 18 crossings 4 crossings HPEC

25 TDM Network Insertion Loss Analysis 4x4 Network 8x8 Network 16x16 Network 64x64 Network HPEC

26 Maximum Bandwidth (# of Wavelengths) 4x4 Network 8x8 Network 16x16 Network 64x64 Network HPEC

27 Summary of Results HPEC

28 Conclusions Poly-Silicon and Silicon Nitride in conjunction are a good choice of materials for photonic interconnection networks Low-loss = more wavelengths = higher bandwidth We ve shown that our best network, when at large scale, can be improved with a multi-layer implementation Future work: We expect the elimination of waveguide crossings to significantly reduce crosstalk across a wide variety of network architectures HPEC

MODELING AND EVALUATION OF CHIP-TO-CHIP SCALE SILICON PHOTONIC NETWORKS

1 MODELING AND EVALUATION OF CHIP-TO-CHIP SCALE SILICON PHOTONIC NETWORKS Robert Hendry, Dessislava Nikolova, Sébastien Rumley, Keren Bergman Columbia University HOTI 2014 2 Chip-to-chip optical networks