OPTICAL I/O RESEARCH PROGRAM AT IMEC

Transcription

1 OPTICAL I/O RESEARCH PROGRAM AT IMEC IMEC CORE CMOS PHILIPPE ABSIL, PROGRAM DIRECTOR JORIS VAN CAMPENHOUT, PROGRAM MANAGER

2 SCALING TRENDS IN CHIP-LEVEL I/O RECENT EXAMPLES OF HIGH-BANDWIDTH I/O Graphics Processing Unit 190 GB/s >50pJ/bit Source: FPGA >300 GB/s Source: White Paper: Virtex-7 FPGAs, WP380 (v1.0), P. Dorsey, October 27, 2010 Hybrid Memory Cube 128 GB/s ~8 pj/bit Source: Intel Developer Forum (IDF), 2011 MIT MICRO PHOTONICS CENTER FALL MEETING

3 I/O Aggregate BW (TB/s) I/O Energy Budget (pj/bit) HPC SCALING I/O SCALING INTO THE TERABYTE REGIME GPU Vendor 1 GPU Vendor 2 0.4Byte/Flop 0.2Byte/Flop 0.1Byte/Flop 28nm/ 32nm 20nm Year of Production 3pJ/bit 14nm 1.6TB/s 0.8TB/s 10nm 7nm 3.2TB/s Assumptions: 3 years between future CMOS nodes 20W I/O Power Budget 5 1.5pJ/bit 0.75pJ/bit MIT MICRO PHOTONICS CENTER FALL MEETING

4 SYSTEM ROADMAP DATA WAREHOUSE SWITCHES Source: Ali Ghiasi, BROADCOM, IEEE Group Four Photonics, Tb/s by 2014! MIT MICRO PHOTONICS CENTER FALL MEETING

5 SILICON PHOTONICS FOR 3-D OPTICAL I/O LOW-POWER, HIGH-BANDWIDTH OPTICAL INTERCONNECT I/O Requirements by nm/7nm CMOS node Aggregate BW ~ Multiple TB/s Area/Perimeter Constrained: BW density > 1Tb/s/mm Power constrained: E bit < 1pJ/bit Optical I/O by Silicon Photonics Silicon Photonics Interposer Best-in-class Silicon Optical Devices 3-D Assembly with CMOS/DRAM u-bumps DRAM DRAM DRAM optical connector u-bumps solder bumps DRAM Memory Controller Silicon Photonics Interposer package SM Optical Fiber (ribbon) Heat sink Logic die Logic die Silicon Photonics Interposer package FR4 MIT MICRO PHOTONICS CENTER FALL MEETING

6 CORE CMOS PROGRAMS INSITE INSITE-LOGIC INSITE-MEMORY INSITE-3D INSITE-OPTICAL Lithography Device cluster Interconnect Cluster 193i Extentions Double Patterning, Computational lithography Extreme-UV Source, Mask, Imaging Logic Devices Logic, SRAM, DRAM Memory Devices Flash MIMCAP, RRAM, FBRAM Program Kick-Off December 2010 Nano Interconnect Cu line scaling Low-K & air gap 3D Chip Stacking In-foundry TSV Smart Interposers, ubump Optical I/O Si-Photonics Supporting Expertise Centers Unit Processes Research (Clean/Strip, Epi, ALD, (D)RIE, Anneal, Metallization ) Materials Characterization & Metrology Reliability, ESD Adv. Characterization (Fill & Sense ) Ab Initio TCAD Transport modeling MIT MICRO PHOTONICS CENTER FALL MEETING

7 OPTICAL I/O PROGRAM MISSION Identification of System-Level Requirements for Optical I/O Silicon Photonics Technology Development Optimization of CMOS circuits for efficient Optical I/O Building Demonstrators and Benchmarking vs. Competing Technology MIT MICRO PHOTONICS CENTER FALL MEETING

8 HIGH PERFORMANCE I/O ROADMAP I/O Technology Options Silicon Photonics PIC R&D Modulators Detectors Multiplexing PIC-CMOS 3D Assembly Cu Extension (PCB + Adv. Signaling, Flex) Optical I/O VCSEL or PIC single link imec Optical I/O Program Focus 2018 Optical I/O VCSEL or PIC + Multiplexing 25G MRR + thermal control Program 35G MRR supported (Advanced Designs) by 50G Hybrid (non-silicon materials) 25G Ge p-i-n (+mod. integration) 35G Ge p-i-n / APD 50G Ge APD imec CORE Partners 4-channel WDM Flip-chip 8-channel WDM / Multi Core Fiber 16-channel WDM / Multi Core Fiber m-bump + TSV + Laser Assembly Bump-less + TSV + Laser Assembly SWITCH (<2km) 0.2TB/s 0.4TB/s 0.4TB/s 0.4TB/s 0.8TB/s 0.8TB/s 0.8TB/s HPC (<1m) 0.4TB/s 0.4TB/s 0.4TB/s 0.8TB/s 0.8TB/s 0.8TB/s 1.6TB/s LINK DATA RATE IMEC up to 20125Gb/s up to 25Gb/s MIT MICRO PHOTONICS up to 25Gb/s CENTER FALL up MEETING to 35Gb/s 2012 up to 35Gb/s up to 35Gb/s up to 850Gb/s

9 Silicon Photonics Exploration Passive components library Hybrid silicon / III-V active devices Insertion loss for 1 coupler [db] Low insertion loss coupling <2dB / facet Polarization management BW = 25nm <2.0dB IL Wavelength [nm] Low-loss, compact and robust (De-) Multiplexer MIT MICRO PHOTONICS CENTER <3.5dB FALL MEETING insertion 2012 loss, <-20dB crosstalk 9

10 ULTRA LOW-LOSS SILICON PHOTONICS (300MM) Silicon Wire Loss (db/cm) Imec 200mm (193nm) Previous state-of-the-art (e-beam) Imec 300mm (193-immersion) Record low 0.7dB/cm 300mm Photonics SOI - Adapted 28nm STI - ASML 193nm immersion litho - AMAT eharp trench fill MIT MICRO PHOTONICS CENTER FALL MEETING

11 DIMENSION CONTROL IS CRUCIAL FOR SILICON PHOTONICS Linewidth variation Resonance wavelength of a device Thickness variation response n eff m Wavelength response is directly proportional to device dimension (variation). L Thickness and linewidth control is vital for commercial viability MIT MICRO PHOTONICS CENTER FALL MEETING

12 LOCATION SPECIFIC PROCESSING MIT MICRO PHOTONICS CENTER FALL MEETING

13 GRATING FIBER COUPLER AS A TEST DEVICE Even a simple grating fiber coupler is 10X sensitive to thickness than width variation. Trench width Trench etch depth 2 nm/nm Si thickness BOX 2000nm peak Si T : 220+/-11 nm λ peak : λ o +/-22 nm 0.2 nm/nm 1.2 nm/nm MIT MICRO PHOTONICS CENTER FALL MEETING

14 WTW THICKNESS CORRECTION Before correction After correction and defect curing Reproducible WtW target thickness and uniformity. MIT MICRO PHOTONICS CENTER FALL MEETING

15 IMPROVED WIWNU SILICON THICKNESS Corrective Etching (GCIB LSP ) Damage Recovery Thickness WiWNU 3s (nm) Roughness (nm) Silicon wire loss (db/cm) Reference SOI Wafer LSP Wafer w/o recovery LSP Wafer with recovery Typ Reference (no LSP) LSP corrected Fiber Coupler Response WIWNU Silicon Thickness Range <3nm 90% of the Fiber Couplers Within 7nm Without Loss Penalty MIT MICRO PHOTONICS CENTER FALL MEETING

16 SCALING OPTICAL TECHNOLOGY Faster Channels 70G 50G 35G 25G PAM-16 (LightWire/Luxtera) 4-bit 2-bit 1-bit More Bits per Symbol Amplitude: PAM Phase and Amplitude: QPSK 10G core 8core 16core J. Sakaguchi, et al, "19-core fiber transmission of 19x100x172-Gb/s SDM- WDM-PDM-QPSK signals at 305Tb/s," OFC2012, PDP5C.1. More Channels Fiber Ribbons more Wavelengths: WDM more Fiber Cores: SDM MIT MICRO PHOTONICS CENTER FALL MEETING

17 SILICON PHOTONICS WDM LINK REQUIRED COMPONENTS Laser 1 Laser 2 Laser 8 Package 1 Package 2 Silicon Photonics Chip Silicon Photonics Chip Fiber Coupler TX DATA Power Splitter driver CMOS chip Ring E-O modulator Heater 1 8 SMF Ribbon TM TE DEMUX 1 Ge WPD 1 amplifier CMOS chip RX DATA Transceiver Components WDM Laser Passive Optical Devices: couplers, filters, waveguides Silicon Electro-Optic Modulator Waveguide Heater Germanium Waveguide Photodetector Single-Mode Fiber Ribbon CMOS Tx: modulator driver CMOS Rx: TIA/LA amplifier CMOS control: thermal control feedback loop MIT MICRO PHOTONICS CENTER FALL MEETING

18 MODULATOR REQUIREMENTS Laser 1 Laser 2 Laser 8 Package 1 Package 2 Silicon Photonics Chip Silicon Photonics Chip Fiber Coupler TX DATA Power Splitter driver CMOS chip Ring E-O modulator Heater 1 8 SMF Ribbon TM TE DEMUX 1 Ge WPD 1 amplifier RX DATA CMOS chip Targeted Modulator Specifications Transmitter penalty (TP) < 3dB, e.g. Extinction Ratio (ER) > 7dB Insertion Loss (IL) < 1dB Power consumption (E bit <20fJ/bit) Modulation speed = 10Gb/s, 20Gb/s, CMOS compatible drive-voltage Thermally robust / fabrication tolerant Footprint < 500mm 2 ER TP IL 10log ER +1-1 Impressive progress in silicon ring modulators: Oracle, Kotura, Sandia, LETI, However, none of demonstrations simultaneously meets all these requirements! lin lin MIT MICRO PHOTONICS CENTER FALL MEETING

19 DIODE DESIGN Carrier depletion based modulation Lateral versus inter-digitated diode design Maximize extinction ratio (ER) for minimum insertion loss (IL) 10 Gb/s operation or more Shallow etch (~70nm) limits ring radius to ~40um Target doping concentration = 1x10 18 cm -3 P++ XSection w=450nm h = 70nm 150nm N++ P+ N+ MIT MICRO PHOTONICS CENTER FALL MEETING

20 DC PERFORMANCE Lateral Diode Interdigitated Diode Vpp (V) Max ER (db) IL (db) ER for IL=3dB (grey regions) Transmitter Penalty (db) Lateral 1Vpp Interdigitated 1Vpp Interdigitated diode has higher extinction ratio for similar insertion loss MIT MICRO PHOTONICS CENTER FALL MEETING

21 HIGH-SPEED OPERATION (10Gb/s) 10Gb/s, PRBS = Vpp measured at PPG Lateral Diode Interdigitated Diode Vpp: 1V; Vpp: 0.7V; Open eye diagrams obtained at 10Gb/s for both designs Interdigitated design suffers from the RC frequency limitation (can be improved by design up to >10GHz) MIT MICRO PHOTONICS CENTER FALL MEETING

22 SILICON PHOTONICS WDM LINK REQUIRED COMPONENTS Laser 1 Laser 2 Laser 8 Package 1 Package 2 Silicon Photonics Chip Silicon Photonics Chip Fiber Coupler TX DATA Power Splitter driver CMOS chip Ring E-O modulator Heater 1 8 SMF Ribbon TM TE DEMUX 1 Ge WPD 1 amplifier CMOS chip RX DATA Transceiver Components WDM Laser Passive Optical Devices: couplers, filters, waveguides Silicon Electro-Optic Modulator Waveguide Heater Germanium Waveguide Photodetector Single-Mode Fiber Ribbon CMOS Tx: modulator driver CMOS Rx: TIA/LA amplifier CMOS control: thermal control feedback loop MIT MICRO PHOTONICS CENTER FALL MEETING

23 WDM COMPONENTS ROBUST MICRORING FILTERS Worst channel IL Crosstalk 2 nd order 4-channel MRR improves significantly worst channel insertion loss compensating detuning by its flat-top response Excellent FSR control over the wafer Worst-Channel (wafer-scale average) 1 st order 2 nd order XT(dB) IL (db) FSR (nm) ± ± 0.12 MIT MICRO PHOTONICS CENTER FALL MEETING

24 PHOTODETECTOR REQUIREMENTS Laser 1 Laser 2 Laser 8 Package 1 Package 2 Silicon Photonics Chip Silicon Photonics Chip Fiber Coupler TX DATA Power Splitter driver CMOS chip Ring E-O modulator Heater 1 8 SMF Ribbon TM TE DEMUX 1 Ge WPD 1 amplifier RX DATA CMOS chip Targeted Photodetector Specifications high responsivity (> 0.8A/W) CMOS bias voltage (~1V) high speed (10Gbps, 20Gbps, ) low capacitance (< 10fF) low dark current (< 100nA) footprint < 500um2 Si BOx Si substrate Lateral pin Ge PD n+ p+ i-ge 1/2/4 mm ~300nm MIT MICRO PHOTONICS CENTER FALL MEETING

25 Dark Current [A] Current (µa) Responsivity (A/W) GE WAVEGUIDE PHOTODETECTOR Si Ge 12.5Gb/s Ge-on-Si Waveguide Photo-detector DC as low as RT R~0.8A/W ( < 1565nm) Bandwidth > 20GHz 1.E E-04 1.E-05 1.E-06 1.E-07 1.E Dark current Responsivity 1.E Voltage Bias [V](V) Voltage (V) MIT MICRO PHOTONICS CENTER FALL MEETING

26 PHOTONICS-ELECTRONICS INTEGRATION Oracle IBM imec Imec demonstrator 40nm CMOS Chip (4x10Gb/s drivers) optical fibers Oracle IBM imec Compact, low loss microring modulators Advanced CMOS driver/receiver circuit design CMOS / Photonics flip-chip assembly Speed 10 Gb/s 8 Gb/s 10 Gb/s Power 0.1pJ/bit 1.8 pj/bit 0.35 pj/bit(*) Voltage Supply Double Double Single 1V CMOS 40nm 90nm 40nm (*) 1 st generation is bondpad & modulator size limited MIT MICRO PHOTONICS CENTER FALL MEETING

27 Silicon Wire Loss (db/cm) Dark Current [A] Si Ge-on-Si Waveguide Photo-detector DC as low as RT R~0.8A/W ( < 1565nm) Bandwidth > 20GHz Footprint < 20mm 2 Dark current 1.E-03 1.E-04 1.E-05 1.E-06 1.E-07 1.E-08 1.E Bias [V] Ge Record low loss waveguide platform 0.7dB/cm using advanced CMOS processes 1nm Silicon thickness control Imec 200mm (193nm) Previous state-of-the-art (e-beam) Imec 300mm (193-immersion) Record low 0.7dB/cm Micro Ring Array 20Gb/s Modulation MOS MRR Modulator 50ps 5mm Compact High Speed Micro Ring Modulators 20Gb/s modulation demonstrated 10Gb/s 1V pp, 3dB IL Footprint < 150mm 2 MIT MICRO PHOTONICS CENTER FALL MEETING 2012 Low-loss, compact and robust (De-) Multiplexer <1.5dB insertion loss, <-19dB crosstalk 27 Integrated heaters

28 Ge-on-Si Waveguide Photo-detector DC as low as RT R~0.8A/W ( < 1565nm) Bandwidth > 20GHz Footprint < 20mm2 Record low loss waveguide platform 0.7dB/cm using advanced CMOS processes 1nm Silicon thickness control Robust & Complete Silicon Photonics Platform Ge Si Dark current Imec 200mm (193nm) Previous state-of-the-art (e-beam) 1.5 Imec 300mm (193-immersion) Record low 0.7dB/cm 1 Photonics Electronics Co-Design 1.E-03 Dark Current [A] Silicon Wire Loss (db/cm) Nanometer scale control High-speed and compact actives 2 1.E-04 1.E-05 1.E-06 1.E-07 1.E-08 1.E Flip-chip stacking 40nm CMOS + Photonics Photonics integration compatible with 3D TSV Bias [V] 1 Outlook Micro Ring Array MOS MRR Modulator 3D chip stacking Non-silicon material integration High density packaging Compact High Speed Micro Ring Modulators Thermal Control Low-loss, compact and robust (De-) Multiplexer 20Gb/s modulation demonstrated 40nm CMOS Chip (4x10Gb/s drivers) 20Gb/s Modulation 50ps 5mm 10Gb/s 1Vpp, 3dB IL IMEC22012 Footprint < 150mm optical fibers <1.5dB insertion loss, <-21dB crosstalk MIT MICRO PHOTONICS CENTER FALL MEETING 2012 Integrated heaters 28

29 THANK YOU Acknowledgments: partners of imec s CORE Industry Affiliation Program