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1 Disribued by: The conen and copyrighs of he aached maerial are he propery of is owner.

2 16K-Bi CMOS PARALLEL E 2 PROM FEATURES Fas Read Access Times: 200 ns Low Power CMOS Dissipaion: Acive: 25 ma Max. Sandby: 100 µa Max. Simple Wrie Operaion: On-Chip Address and Daa Laches Self-Timed Wrie Cycle wih Auo-Clear Fas Wrie Cycle Time: 10ms Max End of Wrie Deecion: DATA Polling Hardware Wrie Proecion CMOS and TTL Compaible I/O 10,000 Program/Erase Cycles 10 Year Daa Reenion Commercial, Indusrial and Auomoive Temperaure Ranges DESCRIPTION The CAT28C16A is a fas, low power, 5V-only CMOS Parallel E 2 PROM organized as 2K x 8-bis. I requires a simple inerface for in-sysem programming. On-chip address and daa laches, self-imed wrie cycle wih auo-clear and power up/down wrie proecion eliminae addiional iming and proecion hardware. DATA Polling signals he sar and end of he self-imed wrie cycle. Addiionally, he CAT28C16A feaures hardware wrie proecion. The CAT28C16A is manufacured using Caalys s advanced CMOS floaing gae echnology. I is designed o endure 10,000 program/erase cycles and has a daa reenion of 10 years. The device is available in JEDEC approved 24-pin DIP and SOIC or 32-pin PLCC packages. BLOCK DIAGRAM A 4 A 10 ADDR. BUFFER & LATCHES ROW DECODER 2,048 x 8 E 2 PROM ARRAY INADVERTENT WRITE PROTECTION HIGH VOLTAGE GENERATOR CONTROL LOGIC I/O BUFFERS TIMER DATA POLLING I/O 0 I/O 7 A 0 A 3 ADDR. BUFFER & LATCHES COLUMN DECODER 508 FHD F02 18 by Caalys Semiconducor, Inc. Characerisics subjec o change wihou noice 1

3 PIN CONFIGURATION DIP Package (P) SOIC Package (J,K) PLCC Package (N) A 7 A A 8 A 7 A A 8 A A A 4 A 3 A A 10 A 4 A 3 A A 10 A 6 A 5 A A 8 A A A A A 0 I/O 0 I/O I/O 7 I/O 6 I/O 5 A 0 I/O 0 I/O I/O 7 I/O 6 I/O 5 A 2 A 1 A TOP VIEW A 10 I/O I/O 4 I/O I/O I/O 7 V SS I/O 3 V SS I/O 3 I/O I/O 6 A 7 PIN FUTIONS Pin Name Funcion A 0 A 10 Address Inpus I/O 0 I/O 7 Daa Inpus/Oupus Chip Enable Oupu Enable Wrie Enable V SS 5V Supply Ground No Connec I/O 1 I/O 2 V SS I/O 3 I/O 4 I/O FHD F01 MODE SELECTION Mode I/O Power Read L H L D OUT ACTIVE Bye Wrie ( Conrolled) L H D IN ACTIVE Bye Wrie ( Conrolled) L H D IN ACTIVE Sandby, and Wrie Inhibi H X X High-Z STANDBY Read and Wrie Inhibi X H H High-Z ACTIVE CAPACITAN T A = 25 C, f = 1.0 MHz, = 5V Symbol Tes Max. Unis Condiions C (1) I/O Inpu/Oupu Capaciance 10 pf V I/O = 0V C (1) IN Inpu Capaciance 6 pf V IN = 0V Noe: (1) This parameer is esed iniially and afer a design or process change ha affecs he parameer. 2

4 ABSOLUTE MAXIMUM RATINGS* Temperaure Under Bias C o +125 C Sorage Temperaure C o +150 C Volage on Any Pin wih Respec o Ground (2) V o V wih Respec o Ground V o +7.0V Package Power Dissipaion Capabiliy (Ta = 25 C) W Lead Soldering Temperaure (10 secs) C Oupu Shor Circui Curren (3) ma *COMMENT Sresses above hose lised under Absolue Maximum Raings may cause permanen damage o he device. These are sress raings only, and funcional operaion of he device a hese or any oher condiions ouside of hose lised in he operaional secions of his specificaion is no implied. Exposure o any absolue maximum raing for exended periods may affec device performance and reliabiliy. RELIABILITY CHARACTERISTICS Symbol Parameer Min. Max. Unis Tes Mehod N (1) END Endurance 10,000 Cycles/Bye MIL-STD-883, Tes Mehod 1033 T (1) DR Daa Reenion 10 Years MIL-STD-883, Tes Mehod 1008 V (1) ZAP ESD Suscepibiliy 2000 Vols MIL-STD-883, Tes Mehod 3015 I (1)(4) LTH Lach-Up 100 ma JEDEC Sandard 17 D.C. OPERATING CHARACTERISTICS = 5V ±10%, unless oherwise specified. 3 Limis Symbol Parameer Min. Typ. Max. Unis Tes Condiions I CC Curren (Operaing, TTL) 35 ma = = V IL, f = 1/ RC min, All I/O s Open I (5) CCC Curren (Operaing, CMOS) 25 ma = = V ILC, f = 1/ RC min, All I/O s Open I SB Curren (Sandby, TTL) 1 ma = V IH, All I/O s Open I (6) SBC Curren (Sandby, CMOS) 100 µa = V IHC, All I/O s Open I LI Inpu Leakage Curren µa V IN = GND o I LO Oupu Leakage Curren µa V OUT = GND o, = V IH V IH (6) High Level Inpu Volage V V IL (5) Low Level Inpu Volage V V OH High Level Oupu Volage 2.4 V I OH = 400µA V OL Low Level Oupu Volage 0.4 V I OL = 2.1mA V WI Wrie Inhibi Volage 3.0 V Noe: (1) This parameer is esed iniially and afer a design or process change ha affecs he parameer. (2) The minimum DC inpu volage is 0.5V. During ransiions, inpus may undershoo o 2.0V for periods of less han 20 ns. Maximum DC volage on oupu pins is +0.5V, which may overshoo o +2.0V for periods of less han 20 ns. (3) Oupu shored for no more han one second. No more han one oupu shored a a ime. (4) Lach-up proecion is provided for sresses up o 100mA on address and daa pins from 1V o +1V. (5) V ILC = 0.3V o +0.3V. (6) V IHC = 0.3V o +0.3V.

5 A.C. CHARACTERISTICS, Read Cycle = 5V ±10%, unless oherwise specified. 28C16A-20 Symbol Parameer Min. Max. Unis RC Read Cycle Time 200 ns Access Time 200 ns AA Address Access Time 200 ns Access Time 80 ns (1) LZ Low o Acive Oupu 0 ns (1) OLZ Low o Acive Oupu 0 ns (1)(2) HZ High o High-Z Oupu 55 ns (1)(2) OHZ High o High-Z Oupu 55 ns (1) OH Oupu Hold from Address Change 0 ns Figure 1. A.C. Tesing Inpu/Oupu Waveform(3) 2.4 V 0.45 V INPUT PULSE LEVELS 2.0 V 0.8 V REFEREN POINTS 508 FHD F03 Figure 2. A.C. Tesing Load Circui (example) 1.3V 1N14 DEVI UNDER TEST 3.3K C L = 100 pf OUT C L ILUDES JIG CAPACITAN 508 FHD F04 Noe: (1) This parameer is esed iniially and afer a design or process change ha affecs he parameer. (2) Oupu floaing (High-Z) is defined as he sae when he exernal daa line is no longer driven by he oupu buffer. (3) Inpu rise and fall imes (10% and 0%) < 10 ns. 4

6 A.C. CHARACTERISTICS, Wrie Cycle = 5V ±10%, unless oherwise specified. 28C16A-20 Symbol Parameer Min. Max. Unis WC Wrie Cycle Time 10 ms AS Address Seup Time 10 ns AH Address Hold Time 100 ns CS Seup Time 0 ns CH Hold Time 0 ns (2) CW Pulse Time 150 ns S Seup Time 15 ns H Hold Time 15 ns (2) WP Pulse Widh 150 ns DS Daa Seup Time 50 ns DH Daa Hold Time 10 ns DL Daa Lach Time 50 ns (1) INIT Wrie Inhibi Period Afer Power-up 5 20 ms Noe: (1) This parameer is esed iniially and afer a design or process change ha affecs he parameer. (2) A wrie pulse of less han 20ns duraion will no iniiae a wrie cycle. 5

7 DEVI OPERATION Read Daa sored in he CAT28C16A is ransferred o he daa bus when is held high, and boh and are held low. The daa bus is se o a high impedance sae when eiher or goes high. This 2-line conrol archiecure can be used o eliminae bus conenion in a sysem environmen. Figure 3. Read Cycle RC ADDRESS V IH LZ OHZ DATA OUT HIGH-Z OLZ OH DATA VALID HZ DATA VALID AA 28C16A F05 Figure 4. Bye Wrie Cycle [ Conrolled] WC ADDRESS AS AH CS CH S WP H DATA OUT HIGH-Z DL DATA IN DATA VALID DS DH 508 FHD F06 6

8 Bye Wrie A wrie cycle is execued when boh and are low, and is high. Wrie cycles can be iniiaed using eiher or, wih he address inpu being lached on he falling edge of or, whichever occurs las. Daa, conversely, is lached on he rising edge of or, whichever occurs firs. Once iniiaed, a bye wrie cycle auomaically erases he addressed bye and he new daa is wrien wihin 10 ms. DATA Polling DATA polling is provided o indicae he compleion of a bye wrie cycle. Once a bye wrie cycle is iniiaed, aemping o read he las bye wrien will oupu he complemen of ha daa on I/O 7 (I/O 0 I/O 6 are indeerminae) unil he programming cycle is complee. Upon compleion of he self-imed bye wrie cycle, all I/O s will oupu rue daa during a read cycle. Figure 5. Bye Wrie Cycle [ Conrolled] WC ADDRESS AS AH DL CW H CS S CH HIGH-Z DATA OUT DATA IN DATA VALID DS DH 508 FHD F07 Figure 6. DATA Polling ADDRESS H S WC I/O 7 DIN = X D OUT = X D OUT = X 28C16A F08 7

9 HARDWARE DATA PROTECTION The following is a lis of hardware daa proecion feaures ha are incorporaed ino he CAT28C16A. (1) sense provides for wrie proecion when falls below 3.0V min. (2) A power on delay mechanism, INIT (see AC characerisics), provides a 5 o 20 ms delay before a wrie sequence, afer has reached 3.0V min. (3) Wrie inhibi is acivaed by holding any one of low, high or high. (4) Noise pulses of less han 20 ns on he or inpus will no resul in a wrie cycle. ORDERING INFORMATION Prefix Device # Suffix CAT 28C16A N I -20 T Opional Company ID Produc Number Temperaure Range Blank = Commercial (0 C o +70 C) I = Indusrial (-40 C o +85 C) A = Auomoive (-40 o +105 C)* Tape & Reel T: 500/Reel Package P: PDIP N: PLCC J: SOIC (JEDEC) K: SOIC (EIAJ) Speed 20: 200ns * -40 C o +125 C is available upon reques 28C16A F0 Noes: (1) The device used in he above example is a CAT28C16ANI-20T (PLCC, Indusrial emperaure, 200 ns Access Time, Tape & Reel). 8

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