PI90LV032A PI90LV028A PI90LV018A. 3V LVDS High-Speed Differential Line Receivers PI90LV032A. Features Signaling Rates >400Mbps (200 MHz) PI90LV028A
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1 PI90LV032A PI90LV02A PI90LV0A 3V LVDS HighSpeed Differenial Line Receivers Feaures Signaling Raes >400Mbps (200 MHz) PI90LV032A Single 3.3V Power Supply Design Acceps ±350mV (ypical) Differenial Swing Maximum Differenial Skew of 0.35ns Maximum Propagaion Delay of 3.3ns Low Volage TTL (LVTTL) Oupus Indusrial Temperaure Operaing Range: 40 C o 5 C Open, Shor, and Terminaed Fail Safe Mees or Exceeds IEEE SCI Sandard Mees or Exceeds ANSI/TIA/EIA644 LVDS Sandard Packaging (Pbfree & Green avaliable): SOIC, TSSOP, and MSOP RIN RIN ROUT EN ROUT2 RIN2 ROUT3 RIN3 RIN3 RIN PI90LV02A Pin 3 W, L EN* RIN4 VCC RIN4 RIN4 ROUT4 RIN2 RIN3 RIN4 RIN RIN R RIN3 RIN2 EN EN* R2 R3 R4 ROUT ROUT2 ROUT3 ROUT4 Descripion The PI90LV032A, PI90LV02A, and PI90LV0A are differenial line receivers ha use lowvolage differenial signaling (LVDS) o suppor daa raes in excess of 400 Mbps. These producs are designed for applicaions requiring highspeed, lowpower consumpion and low noise generaion. A differenial inpu signal (350mV) is ranslaed by he device o 3V CMOS oupu level. Exclusive o he PI90LV032A quad receiver is a powerdown mode ha Threesaes he oupus and places he device in a lowpower idle sae (40mW ypical). Applicaions Applicaions include poinopoin and mulidrop baseband daa ransmission over conrolled impedance media of approximaely 00 Ohms. The ransmission media can be prined circui board races, backplanes, or cables. The PI90LV032A, PI90LV02A, PI90LV0A and companion line drivers (PI90LV03A, PI90LV027A, and PI90LV07A) provide new alernaives o RS232, PECL, and ECL devices for highspeed, poinopoin inerface applicaions. RIN RIN RIN2 RIN2 RIN RIN RIN RIN RIN2 RIN2 PI90LV0A RIN RIN NC NC 2 Pin W,U 6 5 Pin 2 W,U VCC ROUT ROUT2 VCC ROUT NC R R2 R ROUT ROUT2 ROUT PS423D //0
2 3V LVDS HighSpeed Differenial Line Receivers Funcion Tables PI90LV032A Enables E N EN* R N Inpu s Oupu I R IN H X H L H H X L H L X L H L H X L L H L L H X X Z Pin Descripions Name R OUT R IN R IN Descripio n TTL/CMOS receiver oupu pins Noninvering receiver inpu pins Invering receiver inpu pins Ground pin V C C Posiive power supply pin, 3.3V ±0% PI90LV02A Inpus Oupu R IN R IN H L H L H L PI90LV0A Recommended Operaing Condiions Supply Volage Receiver Inpus M in. T yp. Max. (VC C) Inpu Volage Oupu R IN R IN H L H L H L 3. 0 Unis V Absolue Maximum Raings (see Noe, Page 4) Supply Volage ( ) V o 4.0V Inpu Volage (R IN, R IN ) V o 3.9V Enable Inpu Volage (EN, EN*) V o ( 0.3V) Oupu Volage ( ) V o ( 0.3V) S Package mW Derae S Package....2mW/ C above 25 C Sorage Temperaure Range C o 50 C Lead Temperaure Range Soldering (4s) C Maximum Juncion Temperaure C ESD Raing... 6kV Noe: Sresses greaer han hose lised under Absolue Maximum Raings may cause permanen damage o he device. This is a sress raing only and funcional operaion of he device a hese or any oher condiions above hose indicaed in he operaional secions of his specificaion is no implied. Exposure o absolue maximum raing condiions for exended periods may affec reliabiliy. Operaing Free Air Temperaure (TA) C 2 PS423D //0
3 3V LVDS HighSpeed Differenial Line Receivers Elecrical Characerisics Over supply volage and operaing emperaure ranges, unless oherwise specified. (Noe 2) Symbol Paramee r Condiion s P in M in. T yp. Max. Unis V TH V TL VCMR I IN Differenial Inpu Threshold Differenial Inpu Threshold High Low CommonMode Volage Range Inpu Curren Vcm =.2V(2) R I N, V I D = 200mV peakopeak(5) V R IN V IN = 2.V 0 ± 0 V IN V IN = 3.6 or 0V = 0V 0 ± 0 = 3.6V = 0V mv μa I OH = 0.4mA, VID = 200mV V OH V OL Oupu High Volag e Oupu Low Volag e I OH I OH I OL = 0.4mA, Inpu erminae d = 0.4mA, Inpu shored = 2mA, VID = 200mV 0. V I OS O upu Shor Circui Curren Enabled, Vou = 0V(0) ma I OZ Oupu ThreeSae Curren Disabled, VOUT = 0V or VCC 0 ± 0 μa V IH V IL I I Inpu High Volag e Inpu Low Volag e Inpu Curren V IN = 0V or VC C, Oher Inpu = VCC or EN, EN* V 0 ± 0 μa V CL Inpu Clamp Volag e I CL = ma V I CC No Load Supply Curren Receivers Enabled EN, EN* = VCC or, Inpu s Open EN, EN* = 2.4V or 0.5V, Inpus Open ma ICCZ No Load Supply Curren Receivers Disabled EN =, EN* = VC C, Inpus Open PS423D //0
4 3V LVDS HighSpeed Differenial Line Receivers Swiching Characerisics Over supply volage and operaing emperaure ranges, unless oherwise specified. (Noes 3,4,7,) Symbol Paramee r C ondiion s M in. T yp. Max. Unis PHLD Differenial Propagaion Delay High o Low ( V C M =.2V) PLHD SKD SKD2 SKD3 SKD4 TLH THL PHZ Differenial Propagaion Delay Low o Differenial Pulse Skew P HLD LHD High ( V (6) P C M.2V) = D ifferenial ChanneloChannel Skewsame devic e( 7) C L = 0pF D ifferenial ParoPar Skew( ) V ID = 200mV. 0 D ifferenial ParoPar Skew 9) (Figures & 2) (. 5 Rise Tim e Fall Tim e Disable Time High o Z R L = 2KΩ 2 ns PLZ PZH PZL MAX Disable Time Low o Z 6 2 C L = 0pF Enable Time Z o High 7 (Figures 3 & 4) Enable Time Z o Low 7 (3) Maximum Operaing Frequenc y All channels swiching MHz Noes:. Absolue Maximum Raings are hose values beyond which he safey of he device canno be guaraneed. They are no mean o imply ha he devices should be operaed a hese limis. The able of Elecrical Characerisics specifies condiions of device operaion. 2. Curren ino device pins is defined as posiive. Curren ou of device pins is defined as negaive. All volages are referenced o ground unless oherwise specified. 3. All ypicals are given for: = 3.3V, T A = 25 C. 4. Generaor waveform for all ess unless oherwise specified: f = MHz, Z O = 50Ω, R and F (0% o 00%) 3ns for R IN. 5. The VCMR range is reduced for larger VID. Example : if VID = 400mV, he VCMR is 0.2V o 2.2V. The failsafe condiion wih inpus shored is valid over a commonmode range of 0V o 2.3V. A VID up p 0V may be applied o he R IN / R IN inpus wih he CommonMode volage se o /2. Propagaion delay and Differenial Pulse skew decrease when VID is increased from 200mV o 400mV. Skew specificaions apply for 200mV VID 00mV over he common mode range. 6. skd is he magniude difference in differenial propagaion delay ime beween he posiive going edge and he negaive going edge of he same channel. 7. SKD2, ChanneloChannel Skew, is defined as he difference beween he propagaion delay of one channel and ha of he ohers on he same chip wih any even on he inpus.. SKD3, ParoPar Skew, is he differenial ChanneloChannel skew of any even beween devices. This specificaion applies o devices a he same,and wihin 5ºC of each oher wihin he operaing emperaure range. 9. SKD4, ParoPar Skew, is he differenial ChanneloChannel skew of any even beween devices. This specificaion applies o devices over recommended operaing emperaure and volage ranges, and across process disribuion. skd4 is defined as IMax Mini differenial propagaion delay. 0. Oupu shor circui curren (I OS ) is specified as magniude only, minus sign indicaes direcion only. Only one oupu should be shored a a ime, do no exceed maximum juncion emperaure specificaion.. C L includes probe and jig capaciance. 2. is always higher han R IN and R IN volage. R IN and R IN are allowed o have a volage range 0.2V o VID/2. However, o be complian wih AC specificaions, he common volage range 0.V o 2.3V. 3. fmax generaor inpu condiions: R = F < ns, (0% o 00%), 50% duy cycle, differenial (.05V o.35v peak o peak). Oupu Crieria: duy cycle = 60%/40%, V OL (max 0.4V), V OH (min 2.7V), Load = 0pF (sray plus probes). 4 PS423D //0
5 3V LVDS HighSpeed Differenial Line Receivers Parameer Measuremen Informaion R IN Generaor R IN R ROUT C L Receiver ENABLED Figure. Receiver Propagaion Delay and Transiion Time Tes Circui R IN.3V R IN 0V (Differenial) V ID = 200mV.2V.V PLHD PHLD.5V 0% 0%.5V 20% 20% V OL TLH THL Figure 2. Receiver Propagaion Delay and Transiion Time Waveforms C L includes load and es jig capaciance. S = VCC for T PZL, and T PLZ measuremens S = for PZH and PHZ measuremens S R L Generaor 50 EN R IN R IN DEVICE UNDER TEST C L EN* /4 PI90LV032 Figure 3. Receiver ThreeSTATE Delay Tes Circui 5 PS423D //0
6 3V LVDS HighSpeed Differenial Line Receivers EN When EN* =.5V.5V 3V 0V EN* When EN = Oupu When V ID = 00mV Oupu When V ID = 00mV.5V.5V PLZ PHZ 0.5V 0.5V PZL PZH 50% 50% 3V 0V V OL V OH Figure 4. Receiver ThreeSTATE Delay Waveforms Enable Daa Inpu Balanced Sysem RT 00 /4PI90LV032A Daa Oupu ANY LVDS DRIVER Figure 5. PoinoPoin Applicaion 6 PS423D //0
7 3V LVDS HighSpeed Differenial Line Receivers Packaging Mechanical: 6Pin SOIC (50 Mil) W x REF SEATING PLANE BSC X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS Packaging Mechanical: Pin SOIC (50 Mil) W x REF SEATING PLANE BSC X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS 7 PS423D //0
8 3V LVDS HighSpeed Differenial Line Receivers Packaging Mechanical: 6Pin TSSOP (4.4mm wide) L DOCUMENT CONTROL NO. PD 30 6 REVISION: E DATE: 03/09/ max..20 SEATING PLANE BSC BSC Noe:. Package Ouline Exclusive of Mold Flash and Meal Burr 2. Conrolling dimenions in millimeers 3. Ref: JEDEC MO53F/AB Pericom Semiconducor Corporaion 3545 N. s Sree, San Jose, CA DESCRIPTION: 6Pin, 73Mil Wide, TSSOP PACKAGE CODE: L PS423D //0
9 3V LVDS HighSpeed Differenial Line Receivers Packaging Mechanical: Pin Mini Small Ouline (MSOP) U Ordering Informaion Ordering Code Package Code Package Descripion PI90LV032AWE W Pbfree & Green, 6pin SOIC PI90LV032ALE L Pbfree & Green, 6pin TSSOP PI90LV02AWE W Pbfree & Green, pin SOIC PI90LV02AUE U Pbfree & Green, pin MSOP PI90LV0AWE W Pbfree & Green, pin SOIC PI90LV0AUE U Pbfree & Green, pin MSOP Noes:. Thermal characerisics can be found on he company web sie a Pericom Semiconducor Corporaion PS423D //0
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IR Receiver Modules for New TSOP48.. 2 3 MECHANICAL DATA Pinning = OUT, 2 =, 3 = 6672 FEATURES Low supply curren Phoo deecor and preamplifier in one package Inernal filer for PCM frequency Improved shielding
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Features Near-Zero propagation delay 5Ω switches connect inputs to outputs High signal passing bandwidth (400 MHz) Beyond Rail-to-Rail switching 5V I/O tolerant with 3.3V supply 2.5V and 3.3V supply voltage
PI5V330S. Low On-Resistance Wideband/Video Quad 2-Channel Mux/DeMux. Features. Description. Block Diagram. Pin Configuration.
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Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. DS34C87T CMOS Quad TRI-STATE Differential Line Driver General Description
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CARD 1 CARD 15 CARD 16. Maxim Integrated Products 1
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PI5C16861 PI5C (25Ω) 20-Bit, 2-Port Bus Switch
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Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. DS26LV31T 3V Enhanced CMOS Quad Differential Line Driver General Description
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2 3 MECHANICAL DATA Pinning: = OUT, 2 =, 3 = V S 6672 FEATURES Very low supply curren Phoo deecor and preamplifier in one package Inernal filer for PCM frequency Improved shielding agains EMI Supply volage:
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MX629. DELTA MODULATION CODEC meets Mil-Std DATA BULLETIN. Military Communications Multiplexers, Switches, & Phones
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Description Q0+ Q0- Q1+ Q1- Q2+ Q2- VDD Q3+ Q3- Q4+ Q4- CLK_SEL CLK0. nclk0 Q5+ Q5- SYNC_OE Q6+ Q6- CLK1. nclk1 Q7+ Q7- VEE Q8+ Q8- Q9+ Q9-
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