PI90LV9637. LVDS High-Speed Differential Line Receivers. Features. Description. Applications PI90LV9637
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1 LVDS High-Speed Differenial Line Receivers Feaures Signaling Raes >400Mbps (200 MHz) Single 3.3V Power Supply Design Acceps ±350mV (ypical) Differenial Swing Maximum Differenial Skew of 0.35ns Maximum Propagaion Delay of 4.7ns Low Volage TTL (LVTTL) Oupus Indusrial Temperaure Operaing Range: -40 C o 85 C Open, Shor, and Terminaed Fail Safe Mees or Exceeds ANSI/TIA/EIA-644 LVDS Sandard Packaging (Pb-free & Green available): -8-Pin SOIC (W) -8-Pin MSOP (U) Descripion The PI90LV9637 is a differenial line receiver ha use low-volage differenial signaling (LVDS) o suppor daa raes in excess of 400 Mbps. These producs are designed for applicaions requiring high-speed, low-power consumpion and low noise generaion. A differenial inpu signal (350mV) is ranslaed by he device o 3V CMOS oupu level. Applicaions Applicaions include poin-o-poin and mulidrop baseband daa ransmission over conrolled impedance media of approximaely 100-ohms. The ransmission media can be prined circui board races, backplanes, or cables. The PI90LV9637provides new alernaives o RS-232, PECL, and ECL devices for high-speed, poin-o-poin inerface applicaions. PI90LV Pin W,U 1 PS8667C 11/11/08
2 LVDS High-Speed Differenial Line Receivers Absolue Maximum Raings (see Noe 1, Page 4) Supply Volage ( ) V o +4.0V Inpu Volage (, R IN- ) V o +3.9V Enable Inpu Volage (EN) V o ( +0.3V) Oupu Volage (R OUT ) V o ( +0.3V) S Package mW Derae S Package...8.2mW/ C above +25 C Sorage Temperaure Range C o +150 C Lead Temperaure Range Soldering (4s) C Maximum Juncion Temperaure C ESD Raing... 10kV Noe: Sresses greaer han hose lised under Absolue Maximum Raings may cause permanen damage o he device. This is a sress raing only and funcional operaion of he device a hese or any oher condiions above hose indicaed in he operaional secions of his specificaion is no implied. Exposure o absolue maximum raing condiions for exended periods may affec reliabiliy. Recommended Operaing Condiion Supply Volage Receiver M in. T yp. Max. (VC C) Inpu Volage GND Operaing Free Air Temperaure (TA) Unis V C Funcion Table Differenial Pin Descripion Inpus Oupu, RIN R OU T V D I 100mV H 100mV < VID < 100mV? V D I 100mV L Open Name R OUT R IN GND Descripio n TTL/CMOS receiver oupu pins Non-invering receiver inpu pins Invering receiver inpu pins Ground pin V C C Posiive power supply pin, +3.3V ±10% H 2 PS8667C 11/11/08
3 LVDS High-Speed Differenial Line Receivers Elecrical Characerisics Over supply volage and operaing emperaure ranges, unless oherwise specified. (Noe 2) Symbol V TH V TL VCMR I IN V OH V OL I OS Paramee r Differenial Inpu High Threshold Differenial Inpu Low Threshold Common-Mode Volag e Range Inpu Curren Oupu High Volag e Oupu Low Volag e Oupu Shor Circui Curren (12) Vcm = +1.2V V ID V IN V IN V IN I OH I OH I OH I OL Condiion s = 200mV peak-o-peak (5) P in M in. T yp. Max. R I N+, R IN Unis mv V = +2.8V 10 ± = +3.6 or 0V = 0V 10 ± = +3.6V = 0.4mA, VID = +200mV = 0V = 0.4mA, Inpu erminae d = 0.4mA, Inpu shored R OUT = 2mA, VID = 200mV E nabled, Vou = 0V( 10) ma μa V I OZ V IH V IL I I V CL I CC ICCZ C W Oupu Three-Sae Curren Inpu High Volag e Inpu Low Volag e Inpu Curren Inpu Clamp Volag e No Load Supply Curren Receivers Enabled No Load Supply Curren Receivers Disabled Disabled, V IN I CL EN = VOUT = 0V or VCC 10 ± μa 2.0 V GND 0. 8 EN = 0V or VCC, Oher Inpu = VCC or GND 20 ± μa = 18mA 1. 5 VCC or GND, Inpus Open 0. 8 V EN = 2.4V or 0.5V, Inpus Open EN = GND, Inpus Open 7 10 Inpu Capacianc e 5 10 pf ma 3 PS8667C 11/11/08
4 LVDS High-Speed Differenial Line Receivers Swiching Characerisics Over supply volage and operaing emperaure ranges, unless oherwise specified. (Noes 3,4,7,8) Symbol PHLD PLHD SKD1 SKD2 SKD3 SKD4 TLH THL PHZ PLZ f PZH PZL MAX Paramee r Differenial Propagaion Delay High o Differenial Propagaion Delay Low o Low ( V High ( V C M = 1.23V) C M 1.23V) C ondiion s M in. T yp. Max. (6) Differenial Pulse Skew PHLD - P LHD (7) Differenial Channel-o-Channel Skew-same devic e C L = 10pF V ID = 200mV ( 8) D ifferenial Par-o-Par Skew ) D ifferenial Par-o-Par Skew (Figures 1 & 2) = ( 1. 5 Rise Tim e Fall Tim e Disable Time High o Z R L = 2kΩ 8 12 Disable Time Low o Z 6 12 Enable Time Z o High C L = 10pF (Figures 3 & 4) Enable Time Z o Low (13) Maximum Operaing Frequenc y Unis All channels swiching 250 MHz Noes: 1. Absolue Maximum Raings are hose values beyond which he safey of he device canno be guaraneed. They are no mean o imply ha he devices should be operaed a hese limis. The able of Elecrical Characerisics specifies condiions of device operaion. 2. Curren ino device pins is defined as posiive. Curren ou of device pins is defined as negaive. All volages are referenced o ground unless oherwise specified. 3. All ypicals are given for: = +3.3V, T A = +25 C. 4. Generaor waveform for all ess unless oherwise specified: f = 1 MHz, Z O = 50Ω, R and F (0% o 100%) 3ns for R IN. 5. The VCMR range is reduced for larger V ID. Example : if V ID = 400mV, he VCMR is 0.2V o 2.2V. The fail-safe condiion wih inpus shored is valid over a common-mode range of 0V o 2.3V. A V ID up p - 0V may be applied o he / R IN- inpus wih he Common-Mode volage se o /2. Propagaion delay and Differenial Pulse skew decrease when VID is increased from 200mV o 400mV. Skew specificaions apply for 200mV V ID 800mV over he common mode range. 6. skd1 is he magniude difference in differenial propagaion delay ime beween he posiive going edge and he negaive going edge of he same channel. 7. SKD2, Channel-o-Channel Skew, is defined as he difference beween he propagaion delay of one channel and ha of he ohers on he same chip wih any even on he inpus. 8. SKD3, Par-o-Par Skew, is he differenial Channel-o-Channel skew of any even beween devices. This specificaion applies o devices a he same,and wihin 5ºC of each oher wihin he operaing emperaure range. 9. SKD4, Par-o-Par Skew, is he differenial Channel-o-Channel skew of any even beween devices. This specificaion applies o devices over recommended operaing emperaure and volage ranges, and across process disribuion. skd4 is defined as IMax - Mini differenial propagaion delay. 10. Oupu shor circui curren (I OS ) is specified as magniude only, minus sign indicaes direcion only. Only one oupu should be shored a a ime, do no exceed maximum juncion emperaure specificaion. 11. C L includes probe and jig capaciance. 12. is always higher han and R IN- volage. R IN- and are allowed o have a volage range -0.2V o - V ID /2. However, o be complian wih AC specificaions, he common volage range 0.1V o 2.3V. 13. fmax generaor inpu condiions: R = F < 1ns, (0% o 100%), 50% duy cycle, differenial (1.05V o1.35v peak o peak). Oupu Crieria: duy cycle = 60%/40%, V OL (max 0.4V), V OH (min 2.7V), Load = 10pF (sray plus probes). ns 4 PS8667C 11/11/08
5 LVDS High-Speed Differenial Line Receivers Parameer Measuremen Informaion Generaor R IN R ROUT C L 50Ω 50Ω Receiver Enabled Figure 1. Receiver Propagaion Delay and Transiion Time Tes Circui R IN- 0V (Differenial) PLHD V ID = 200mV +1.2V PHLD +1.3V +1.1V R OUT 1.5V 80% 80% 1.5V 20% 20% V OL TLH THL Figure 2. Receiver Propagaion Delay and Transiion Time Waveforms C L includes load and es jig capaciance. S 1 = VCC for T PZL, and T PLZ measuremens S 1 = GND for PZH and PHZ measuremens S 1 R L Generaor EN R IN Device Under Tes C L R OUT 50Ω Figure 3. Receiver Three-Sae Delay Tes Circui 5 PS8667C 11/11/08
6 LVDS High-Speed Differenial Line Receivers EN When EN* = 1.5V 1.5V 3V 0V EN* When EN = GND Oupu When V ID = -100mV Oupu When V ID = +100mV 1.5V 1.5V PLZ PHZ 0.5V 0.5V PZL PZH 50% 50% 3V 0V V OL V OH GND Figure 4. Receiver Three-Sae Delay Waveforms Enable Balanced Sysem Daa Inpu RT 100Ω 1/4 PI90LV Daa Oupu ANY LVDS DRIVER Figure 5. Poin-o-Poin Applicaion 6 PS8667C 11/11/08
7 LVDS High-Speed Differenial Line Receivers Packaging Mechanical: 8-Pin MSOP (U) 7 PS8667C 11/11/08
8 LVDS High-Speed Differenial Line Receivers Packaging Mechanical: 8-Pin SOIC (W) 8 DOCUMENT CONTROL NO. PD REVISION: F DATE: 03/09/ REF SEATING PLANE BSC X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS Noes: 1) Conrolling dimensions in millimeers. 2) Ref: JEDEC MS-012D/AA Pericom Semiconducor Corporaion 3545 N. 1s Sree, San Jose, CA DESCRIPTION: 8-Pin, 150-Mil Wide, SOIC PACKAGE CODE: W Ordering Informaion Ordering Code Package Code Package Type PI90LV9637U U 8-pin MSOP PI90LV9637UE U Pb-free & Green, 8-pin MSOP PI90LV9637WE W Pb-free & Green, 8-pin SOIC Noe: 1. Thermal characerisics can be found on he company web sie a Pericom Semiconducor Corporaion PS8667C 11/11/08
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