3V LVDS Quad Flow-Through Differential Line Driver. Features. Description. Block Diagram. Pin Configuration. Truth Table
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1 Features >00 Mbps (20 MHz) switching rates Flow-through pinout simplifies PCB layout Low Voltage Differential Signaling with output voltages of ±30mV into: 00-ohm load (P90LV04) 300ps typical differential skew 400ps maximum differential skew.ns maximum propagation delay 3.3V power supply design ±30mV differential signaling Bus-Pin ESD protection >0kV nteroperable with existing V LVDS receivers High impedance on LVDS outputs on power down Conforms to TA/EA-644 LVDS Standard ndustrial operating temperature range ( 40 C to +8 C) Packages (Pb-free & Green Available): 6-pin SOC (W) 6-pin TSSOP (L) Description The P90LV04A is a quad flow-through differential line driver designed for applications requiring ultra-low power dissipation and high data rates. This device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology. The P90LV04A accept low-voltage TTL/CMOS input levels and translates them to low-voltage (30 mv) differential output signals. n addition, the driver supports a 3-state function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 3mW typical. This device has a flow-through pinout for easy PCB layout. The and inputs are banded together and control the 3-state outputs. The intended application of this device and signaling technique is for point-to-point baseband (P90LV04A) data transmission over controlled impedance media. Block Diagram Pin Configuration D D OUT+ D OUT 2 6 D OUT D OUT D OUT2+ 2 D2 D OUT2+ D OUT D OUT2 D OUT3 3 6 D OUT3+ 3 D3 D OUT3+ D OUT D OUT4+ D OUT4 4 D4 D OUT4+ D OUT4 Truth Table Enables Output s H L or Open L L H H H L All other combinations of ABLE inputs X Z Z
2 Absolute Maximum Ratings Supply Voltage ( )... 3V to +4V Voltage ( )... 3V to ( + 3V) Enable Voltage (, )... 3V to ( + 3V) Output Voltage (, )... 3V to +3.9V Short Circuit Duration (, )... Continuous Maximum Package Power +2 C M Package mw MTC Package mw Derate M Package mw/ C above +2 C Derate MTC Package mw/ C above +2 C Storage Temperature Range... 6 C to +0 C Lead Temperature Range Soldering (4 seconds) C Maximum Junction Temperature C ESD Rating (0) (HBM,.kW, 00pF)... 0kV (EAJ, 0W, 200pF) Recommended Operating Conditions Min Typ Max Units Supply Voltage ( ) V Operating Free Air Temperature (T A ) C Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified (2,3,4). Symbol Paramete r Test Condition s P in M in. T yp. Max. Units V OD Differential output voltage magnitud e mv ΔV OD V OS ΔV OS V OH V OL V H V L H L V CL OS OSD OFF OZ CC CCL CCZ Change in Magnitude of VO D for complementary output states 3 mv Offset voltag e R L = 00 ohms (LV04A ) V See Figure Change in magnitude of VO S for 2 mv complementary output states Output high voltag e Output low voltag e high voltag e low voltag e high current low current clamp voltag e O utput short circuit current () Differential output short circuit c urrent ) V N = VCC V N = CL D N, or 2.V, μa or 4V μa = 8mA. 8 V Enabled, DN = VC C, = or D, D N = OUT ( Enabled, VO D Power-off leakage Output 3-State current No load enabled supply current driver s Loaded supply current drivers enabled No load supply current drivers disabled V OUT or 3.6V, V or Open = = 4. 2 = C C = = 8V and =2., V or V O UT = CC = VCC or R L = 00 ohms, (all channels ) V or (all inputs = C C ) = VC C or, =, = V CC ± ± V ma μa mα 2
3 Switching Characteristics = +3.3V ±0%, T A = 40 C (3,9,2) Symbol tphld tplhd Paramete r Differential Propagation Delay High to Low T est Conditions M in. T yp. Max Differential Propagation Delay Low to High Units tskd tskd2 tskd3 tskd4 ttlh tthl tphz tplz tpzh tpzl fmax Differential Pulse (6) Channel-to-Channel Skew Differential Part-to-Part Skew tphld t ( ) PLHD () Skew R L = 00ohms (LV04) = pf (Figures 2 and 3) D ifferential Part-to-Part Skew( 8) 0. 2 Rise Tim e. Fall Tim e. Disable Time High to Z Disable Time Low to Z Enable Time Z to High R L = 00ohms (LV04) = pf (Figures 4 and ) Enable Time Z to Low M aximum Operating Frequency ( 4) MHz Notes. Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of Electrical Characteristics specifies conditions of device operation. 2. Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: V OD and ΔV OD. 3. All typicals are given for: = +3.3V, T A = +2 C. 4. The P90LV04A is a current mode device and only functions within datasheet specifications when a resistive load is applied to the driver outputs typical range is (90 ohms to 0 ohms).. t SKD t PHLD t PLHD is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. 6. t SKD2 is the Differential Channel-to-Channel Skew of any event on the same device.. t SKD3, Differential Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification applies to devices at the same and within C of each other within the operating temperature range. 8. t SKD4, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over recommended operating temperature and voltage ranges, and across process distribution. t SKD4 is defined as Max Min differential propagation delay. 9. Generator waveform for all tests unless otherwise specified: f = MHz, Z O = 0 ohms, t r ns, and t f ns. ESD Ratings: HBM (. kohms, 00pF) 0kV EAJ (0 ohm, 200pF) 20. Output short circuit current ( OS ) is specified as magnitude only, minus sign indicates direction only. 2. includes probe and jig capacitance. 3. All input voltages are for one channel unless otherwise specified. Other inputs are set to. 4. f MAX generator input conditions: t r = t f <ns (0% to 00%), duty cycle, to 3V. Output Criteria: duty cycle = 4%/%, V OD >20mV, all channels switching. 3
4 Parameter Measurement nformation R L /2 R L /2 VOS VOD Driver ABLED Figure. Driver V OD and V OS Test Circuit Generator R L Driver ABLED Figure 2. DriverPropagation Delay & Transition Time Test Circuit 3V t PLHD Differential t PHLD V OH V OL 80% 80% D DFF V DFF = 20% 20% t TLH t THL Figure 3. Driver Propogation Delay and Transition Time Waveforms 4
5 Parameter Measurement nformation (continued) Generator D /4 P90LV04A +.2V Figure 4. Drive 3-State Delay Test Circuit When = or OP 3V 3V When = t PHZ t PZH When = VCC When = V OH.2V When = When = t PLZ t PZL.2V V OL Figure. Driver 3-State Delay Waveform Typical Application Enable Data /4 P90LV04A Any LVDS Receiver + Data Output Figure 6. Point-to-Point Application
6 Packaging Mechanical: 6-Pin SOC (W) 6 DOCUMT CONTROL NO. PD REVSON: E DATE: 03/09/ REF.00 BSC SEATNG PLANE X.XX X.XX DOTES DMSONS N MLLMETERS Notes: ) Controlling dimensions in millimeters. 2) Ref: JEDEC MS-02D/AC Pericom Semiconductor Corporation 34 N. st Street, San Jose, CA DESCRPTON: 6-Pin, 0-Mil Wide, SOC PACKAGE CODE: W 6
7 Packaging Mechanical: 6-Pin TSSOP (L) DOCUMT CONTROL NO. PD REVSON: E DATE: 03/09/ max..20 SEATNG PLANE 4.22 BSC BSC Note:. Package Outline Exclusive of Mold Flash and Metal Burr 2. Controlling dimentions in millimeters 3. Ref: JEDEC MO-3F/AB Pericom Semiconductor Corporation 34 N. st Street, San Jose, CA DESCRPTON: 6-Pin, 3-Mil Wide, TSSOP PACKAGE CODE: L Ordering nformation Ordering Code Package Code Package Type P90LV04AWE W Pb-free & Green, 6-pin SOC P90LV04ALE L Pb-free & Green, 6-pin TSSOP Notes:. Thermal characteristics can be found on the company web site at 2. E = Pb-free and Green 3. X = Tape and reel Pericom Semiconductor Corporation
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Description D2+A D2-A D3+A D3-A D0+B D0-B D1+B D1-B D2+B D2-B D3+B D3-B AUX+ A AUX- A HPD A CAB_DETA/LEDA AUX+ B AUX- B HPD B CAB_DETB/LEDB
High Bandwidth 6-differential Channel, 1:2 Demux Features 4 Differential Channel, 1:2 DeMux that will support 2.7Gbps DP rev 1.1a signals 1-channel 1:2 demux for DP_HPD signal 1-differential channel 1:2
PO3B402A. High Bandwidth Potato Chip OE1 Y1+ Y1- GND SEL3 SEL1 D3- D3+ OE2 Y2+ Y2- Y3+ M3- M3+ OE3 SEL2 OE3 Y3+ Y3- SEL3 OE4 Y4+ Y4- SEL4
FEATURES: Patented technology High signal -3db passing bandwidth at GHz Near-Zero propagation delay CC =.65 to 3.6 Ultra-Low Quiescent Power: 0.µA typical Ideally suited for low power applications Industrial
DIFFERENTIAL DRIVER CHARACTERISTICS
DS36C278 Low Power Multipoint EIA-RS-485 Transceiver General Description The DS36C278 is a low power differential bus/line transceiver designed to meet the requirements of RS-485 standard for multipoint
DS36C279 Low Power EIA-RS-485 Transceiver with Sleep Mode
DS36C279 Low Power EIA-RS-485 Transceiver with Sleep Mode General Description The DS36C279 is a low power differential bus/line transceiver designed to meet the requirements of RS-485 Standard for multipoint
74ABT244 Octal Buffer/Line Driver with 3-STATE Outputs
Octal Buffer/Line Driver with 3-STATE Outputs General Description The ABT244 is an octal buffer and line driver with 3-STATE outputs designed to be employed as a memory and address driver, clock driver,
PI3VeDP212 2-lane DisplayPort Switch/Mux for DP Driven Panels with Triple Control Pins
Features 2 Differential Channel, 2:1 mux/demux that will support 2.7Gbps or 1.62Gbps DP signals 1-differential channel is used for AUX signaling Insertion Loss for high speed channels @ 2.7 Gbps: -1.5dB
SP26LV431 HIGH SPEED +3.3V QUAD RS-422 DIFFERENTIAL LINE DRIVER
HIGH SPEED +3.3V QUAD RS-422 DIFFERENTIAL LINE DRIVER JUNE 2011 REV. 1.1.1 GENERAL DESCRIPTION The SP26LV431 is a quad differential line driver that meets the specifications of the EIA standard RS-422
PO3B10A. Truth Table. High Bandwidth Potato Chip. 2-Channel, 2:1 Mux/DeMux Switch w/ Single Enable GND V DD GND SEL
PO3B0A www.potatosemi.com FEATURES: Patented technology High signal -3db passing bandwidth at 3.5Gbps or.75ghz Near-Zero propagation delay CC =.65 to 3.6 Ultra-Low Quiescent Power: 0.µA typical Ideally
DS485 Low Power RS-485/RS-422 Multipoint Transceiver
Low Power RS-485/RS-422 Multipoint Transceiver General Description The DS485 is a low-power transceiver for RS-485 and RS- 422 communication. The device contains one driver and one receiver. The drivers
DS36C279 Low Power EIA-RS-485 Transceiver with Sleep Mode
DS36C279 Low Power EIA-RS-485 Transceiver with Sleep Mode General Description The DS36C279 is a low power differential bus/line transceiver designed to meet the requirements of RS-485 Standard for multipoint
DS3486 Quad RS-422, RS-423 Line Receiver
DS3486 Quad RS-422, RS-423 Line Receiver General Description National s quad RS-422, RS-423 receiver features four independent receivers which comply with EIA Standards for the electrical characteristics
MM74HC86 Quad 2-Input Exclusive OR Gate
MM74HC86 Quad 2-Input Exclusive OR Gate Features Typical Propagation Delay: 9ns Wide Operating oltage Range: 2 6 Low Input Current: 1mA Maximum Low Quiescent Current: 20mA Max. (74 Series) Output Drive
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23
19-1803; Rev 3; 3/09 Single/Dual LVDS Line Receivers with General Description The single/dual low-voltage differential signaling (LVDS) receivers are designed for highspeed applications requiring minimum
DS90LV012A/DS90LT012A 3V LVDS Single CMOS Differential Line Receiver
DS90LV012A/DS90LT012A 3V LVDS Single CMOS Differential Line Receiver General Description The DS90LV012A and DS90LT012A are single CMOS differential line receivers designed for applications requiring ultra
±15 kv ESD protected, low-power RS-485/RS-422 transceiver. Description
±15 kv ESD protected, low-power RS-485/RS-422 transceiver Datasheet - production data Features Low quiescent current: 300 µa Designed for RS-485 interface applications - 7 V to 12 V common mode input voltage
74ABT245 Octal Bi-Directional Transceiver with 3-STATE Outputs
September 1991 Revised November 1999 74ABT245 Octal Bi-Directional Transceiver with 3-STATE Outputs General Description The ABT245 contains eight non-inverting bidirectional buffers with 3-STATE outputs
DS36277 Dominant Mode Multipoint Transceiver
Dominant Mode Multipoint Transceiver General Description The DS36277 Dominant Mode Multipoint Transceiver is designed for use on bi-directional differential busses. It is optimal for use on Interfaces
FST Bit Low Power Bus Switch
2-Bit Low Power Bus Switch General Description The FST3306 is a 2-bit ultra high-speed CMOS FET bus switch with TTL-compatible active LOW control inputs. The low on resistance of the switch allows inputs
PI3V514. Low On-Resistance, 3.3V High-Bandwidth 5-port, 4:1 Mux/DeMux VideoSwitch. Description. Features. Pin Configuration.
Features Near-Zero propagation delay 5Ω switches connect inputs to outputs High signal passing bandwidth (400 MHz) Beyond Rail-to-Rail switching 5V I/O tolerant with 3.3V supply 2.5V and 3.3V supply voltage
High Speed, 3.3 V/5 V Quad 2:1 Mux/Demux (4-Bit, 1 of 2) Bus Switch ADG3257
High Speed, 3.3 V/5 V Quad 2:1 Mux/Demux (4-Bit, 1 of 2) Bus Switch ADG3257 FEATURES 100 ps propagation delay through the switch 2 Ω switches connect inputs to outputs Data rates up to 933 Mbps Single
PI3V312. Low On-Resistance, 3.3V High-Bandwidth 4-Port, 2:1 Mux/DeMux VideoSwitch. Features. Description. Block Diagram. Pin Configuration S 1 Y A 4
Features Near-Zero propagation delay 5Ω switches connect inputs to outputs High signal passing bandwidth (500MHz) Beyond Rail-to-Rail switching 5V I/O tolerant with 3.3V supply 1.8V, 2.5V and 3.3V supply
PI3DBS V High Speed 2 : 4 Differential Mux/Demux
3.3V High Speed 2 : 4 Differential Mux/Demux Features ÎÎ2:4 Differential Multiplexer/Demultiplexer ÎÎBidirectional Operation ÎÎCan be used in à à Single :4 Configuration à à Dual :2 Configuration à à Fan
DS3695/DS3695T/DS3696/DS3697 Multipoint RS485/RS422 Transceivers/Repeaters
DS3695/DS3695T/DS3696/DS3697 Multipoint RS485/RS422 Transceivers/Repeaters General Description The DS3695, DS3696, and DS3697 are high speed differential TRI-STATE bus/line transceivers/repeaters designed
DS3486 Quad RS-422, RS-423 Line Receiver
Quad RS-422, RS-423 Line Receiver General Description National s quad RS-422, RS-423 receiver features four independent receivers which comply with EIA Standards for the electrical characteristics of balanced/unbalanced
DS36C278 Low Power Multipoint EIA-RS-485 Transceiver
DS36C278 Low Power Multipoint EIA-RS-485 Transceiver General Description The DS36C278 is a low power differential bus line transceiver designed to meet the requirements of RS-485 standard for multipoint