FEATURES Low noise: 80 nv p-p (0.1 Hz to 10 Hz), 3 nv/ Hz Low drift: 0.2 μv/ C High speed: 2.8 V/μs slew rate, 8 MHz gain bandwidth Low VOS: 10 μv Exc

Transcription

1 FEATURES Low noise: 8 nv p-p (. Hz to Hz), nv/ Hz Low drift:. μv/ C High speed:.8 V/μs slew rate, 8 MHz gain bandwidth Low VOS: μv Excellent CMRR: db at VCM of ± V High open-loop gain:.8 million Fits OP7, A sockets Available in die form GENERAL DESCRIPTION The precision operational amplifier combines the low offset and drift of the OP7 with both high speed and low noise. Offsets down to μv and maximum drift of. μv/ C make the ideal for precision instrumentation applications. Exceptionally low noise, en =. nv/ Hz, at Hz, a low /f noise corner frequency of.7 Hz, and high gain (.8 million), allow accurate high-gain amplification of low-level signals. A gain-bandwidth product of 8 MHz and a.8 V/μs slew rate provide excellent dynamic accuracy in high speed, dataacquisition systems. A low input bias current of ± na is achieved by use of a bias current cancellation circuit. Over the military temperature range, this circuit typically holds IB and IOS to ± na and na, respectively. The output stage has good load driving capability. A guaranteed swing of ± V into Ω and low output distortion make the an excellent choice for professional audio applications. (Continued on Page ) FUNCTIONAL BLOCK DIAGRAM Low Noise, Precision Operational Amplifier PIN CONFIGURATIONS BAL IN +IN BAL V (CASE) NC = NO CONNECT V+ NC OUT Figure. 8-Lead TO-99 (J-Suffix) V OS TRIM IN +IN V NC = NO CONNECT 7-8 V OS TRIM 7 V+ OUT NC Figure. 8-Lead CERDIP Glass Hermetic Seal (Z-Suffix), 8-Lead PDIP (P-Suffix), 8-Lead SO (S-Suffix) V+ 7- Q R R 8 V OS ADJ.. R R Q C R R Q C Q Q Q R9 Q Q9 NONINVERTING INPUT (+) INVERTING INPUT ( ) Q QA QB QB QA Q Q Q7 R Q8 C R C Q Q OUTPUT R AND R ARE PERMANENTLY ADJUSTED AT WAFER TEST FOR MINIMUM OFFSET VOLTAGE V 7- Figure. Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9, Norwood, MA -9, U.S.A. Tel: Fax: 78.. Analog Devices, Inc. All rights reserved.

2 TABLE OF CONTENTS Features... General Description... Pin Configurations... Functional Block Diagram... Revision History... Specifications... Electrical Characteristics... Typical Electrical Characteristics... Absolute Maximum Ratings... 7 Thermal Resistance... 7 Typical Performance Characteristics...8 Application Information... Offset Voltage Adjustment... Noise Measurements... Unity-Gain Buffer Applications... Comments On Noise... Audio Applications... References... 8 Outline Dimensions... 9 Ordering Guide... ESD Caution... 7 REVISION HISTORY / Rev. E to Rev. F Removed References to 7...Universal Updated 7 to AD7...Universal Changes to Ordering Guide... / Rev. D to Rev. E Edits to Figure... 9/ Rev. C to Rev. D Updated Format...Universal Changes to Table... Removed Die Characteristics Figure... Removed Wafer Test Limits Table... Changes to Table... 7 Changes to Comments on Noise Section... Changes to Ordering Guide... / Rev. B to Rev. C Edits to Pin Connections... Edits to General Description... Edits to Die Characteristics... Edits to Absolute Maximum Ratings... 7 Updated Outline Dimensions... Edits to Figure 8... Edits to Outline Dimensions... 9/ Rev. to Rev. A Edits to Ordering Information... Edits to Pin Connections... Edits to Absolute Maximum Ratings... Edits to Package Type... Edits to Electrical Characteristics..., Edits to Wafer Test Limits... Deleted Typical Electrical Characteristics... Edits to Burn-In Circuit Figure...7 Edits to Application Information...8 Rev. F Page of

3 GENERAL DESCRIPTION (Continued from Page ) PSRR and CMRR exceed db. These characteristics, coupled with long-term drift of. μv/month, allow the circuit designer to achieve performance levels previously attained only by discrete designs. Low cost, high volume production of is achieved by using an on-chip Zener zap-trimming network. This reliable and stable offset trimming scheme has proven its effectiveness over many years of production history. The provides excellent performance in low noise, high accuracy amplification of low level signals. Applications include stable integrators, precision summing amplifiers, precision voltage threshold detectors, comparators, and professional audio circuits such as tape heads and microphone preamplifiers. The is a direct replacement for OP, OP7, and OP amplifiers; AD7 types can be directly replaced by removing the nulling potentiometer of the AD7. Rev. F Page of

4 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VS = ± V, TA = C, unless otherwise noted. Table. A/E /G Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE VOS μv LONG-TERM VOS STABILITY, VOS/Time.... μv/mo INPUT OFFSET CURRENT IOS 7 7 na INPUT BIAS CURRENT IB ± ± ± ±8 na INPUT NOISE VOLTAGE, en p-p. Hz to Hz μv p-p INPUT NOISE en fo = Hz nv/ Hz Voltage Density fo = Hz.... nv/ Hz fo = Hz..8.. nv/ Hz INPUT NOISE in fo = Hz.7..7 pa/ Hz Current Density fo = Hz... pa/ Hz fo = Hz.... pa/ Hz INPUT RESISTANCE Differential Mode RIN..7 MΩ Common Mode RINCM GΩ INPUT VOLTAGE RANGE IVR ±. ±. ±. ±. V COMMON-MODE REJECTION RATIO CMRR VCM = ± V db POWER SUPPLY REJECTION RATIO PSRR VS = ± V to ±8 V μv/v LARGE SIGNAL VOLTAGE GAIN AVO RL k Ω, VO = ± V 8 7 V/mV RL Ω, VO = ± V 8 V/mV OUTPUT VOLTAGE SWING VO RL k Ω ±. ±.8 ±. ±. V RL Ω ±. ±. ±. ±. V SLEW RATE SR RL kω V/μs GAIN BANDWIDTH PRODUCT GBW MHz OPEN-LOOP OUTPUT RESISTANCE RO VO =, IO = 7 7 Ω POWER CONSUMPTION Pd VO 9 7 mw OFFSET ADJUSTMENT RANGE RP = kω ±. ±. mv Input offset voltage measurements are performed approximately. seconds after application of power. A/E grades guaranteed fully warmed up. Long-term input offset voltage stability refers to the average trend line of VOS vs. time over extended periods after the first days of operation. Excluding the initial hour of operation, changes in VOS during the first days are typically. μv. Refer to the Typical Performance Characteristics section. Sample tested. See voltage noise test circuit (Figure ). Guaranteed by input bias current. Guaranteed by design. Rev. F Page of

5 VS = ± V, C TA C, unless otherwise noted. Table. A Parameter Symbol Conditions Min Typ Max Unit INPUT OFFSET VOLTAGE VOS μv AVERAGE INPUT OFFSET DRIFT TCVOS TCVOSn.. μv/ C INPUT OFFSET CURRENT IOS na INPUT BIAS CURRENT IB ± ± na INPUT VOLTAGE RANGE IVR ±. ±. V COMMON-MODE REJECTION RATIO CMRR VCM = ± V 8 db POWER SUPPLY REJECTION RATIO PSRR VS = ±. V to ±8 V μv/v LARGE SIGNAL VOLTAGE GAIN AVO RL kω, VO = ± V V/mV OUTPUT VOLTAGE SWING VO RL kω ±. ±. V Input offset voltage measurements are performed by automated test equipment approximately. seconds after application of power. A/E grades guaranteed fully warmed up. The TCVOS performance is within the specifications unnulled or when nulled with RP = 8 kω to kω. TCVOS is % tested for A/E grades, sample tested for G grades. Guaranteed by design. VS = ± V, C TA 8 C for J, Z, C TA 7 C for EP, and C TA 8 C for GP, GS, unless otherwise noted. Table. E G Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT ONSET VOLTAGE VOS μv AVERAGE INPUT OFFSET DRIFT TCVOS...8 μv/ C TCVOSn...8 μv/ C INPUT OFFSET CURRENT IOS na INPUT BIAS CURRENT IB ± ± ± ± na INPUT VOLTAGE RANGE IVR ±. ±.8 ±. ±.8 V COMMON-MODE REJECTION RATIO CMRR VCM = ± V 9 8 db POWER SUPPLY REJECTION RATIO PSRR VS = ±. V to ±8 V μv/v LARGE SIGNAL VOLTAGE GAIN AVO RL kω, VO = ± V 7 V/mV OUTPUT VOLTAGE SWING VO RL kω ±.7 ±. ±. ±. V The TCVOS performance is within the specifications unnulled or when nulled with RP = 8 kω to kω. TCVOS is % tested for A/E grades, sample tested for C/G grades. Guaranteed by design. Rev. F Page of

6 TYPICAL ELECTRICAL CHARACTERISTICS VS = ± V, TA = C unless otherwise noted. Table. Parameter Symbol Conditions N Typical Unit AVERAGE INPUT OFFSET VOLTAGE DRIFT TCVOS or Nulled or unnulled. μv/ C TCVOSn RP = 8 kω to kω AVERAGE INPUT OFFSET CURRENT DRIFT TCIOS 8 pa/ C AVERAGE INPUT BIAS CURRENT DRIFT TCIB pa/ C INPUT NOISE VOLTAGE DENSITY en fo = Hz. nv/ Hz en fo = Hz. nv/ Hz en fo = Hz. nv/ Hz INPUT NOISE CURRENT DENSITY in fo = Hz.7 pa/ Hz in fo = Hz. pa/ Hz in fo = Hz. pa/ Hz INPUT NOISE VOLTAGE SLEW RATE enp-p. Hz to Hz.8 μv p-p SR RL kω.8 V/μs GAIN BANDWIDTH PRODUCT GBW 8 MHz Input offset voltage measurements are performed by automated test equipment approximately. seconds after application of power. Rev. F Page of

7 ABSOLUTE MAXIMUM RATINGS Table. Parameter Rating Supply Voltage ± V Input Voltage ± V Output Short-Circuit Duration Indefinite Differential Input Voltage ±.7 V Differential Input Current ± ma Storage Temperature Range C to + C Operating Temperature Range A (J, Z) C to + C E, ( Z) C to +8 C E, (P) C to 7 C G (P, S, J, Z) C to +8 C Lead Temperature Range (Soldering, sec) C Junction Temperature C to + C For supply voltages less than ± V, the absolute maximum input voltage is equal to the supply voltage. The inputs of the are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise. If differential input voltage exceeds ±.7 V, the input current should be limited to ma. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θja is specified for the worst-case conditions, that is, θja is specified for device in socket for TO, CERDIP, and PDIP packages; θja is specified for device soldered to printed circuit board for SO package. Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. Table. Package Type θja θjc Unit TO-99 (J) 8 C/W 8-Lead Hermetic DlP (Z) 8 C/W 8-Lead Plastic DIP (P) C/W 8-Lead SO (S) 8 C/W ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. F Page 7 of

8 TYPICAL PERFORMANCE CHARACTERISTICS 9 T A = C V S = ±V GAIN (db) 8 7 RMS VOLTAGE NOISE (μv). TEST TIME OF sec FURTHER LIMITS LOW FREQUENCY (<.Hz) GAIN.. FREQUENCY (Hz) Figure.. Hz to Hz p-p Noise Tester Frequency Response 7-. k k k BANDWIDTH (Hz) Figure 7. Input Wideband Voltage Noise vs. Bandwidth (. Hz to Frequency Indicated) 7-7 VOLTAGE NOISE (nv/ Hz) I/F CORNER =.7Hz T A = C V S = ±V TOTAL NOISE (nv/ Hz) T A = C V S = ±V AT Hz AT khz R R R S R RESISTOR NOISE ONLY k FREQUENCY (Hz) Figure. Voltage Noise Density vs. Frequency 7- k k SOURCE RESISTANCE (Ω) Figure 8. Total Noise vs. Sourced Resistance 7-8 V S = ±V 7 VOLTAGE NOISE (nv/ Hz) I/F CORNER =.7Hz I/F CORNER I/F CORNER LOW NOISE AUDIO OP AMP VOLTAGE NOISE (nv/ Hz) AT Hz AT khz INSTRUMENTATION RANGE TO DC AUDIO RANGE TO khz k FREQUENCY (Hz) Figure. A Comparison of Op Amp Voltage Noise Spectra 7-7 TEMPERATURE ( C) Figure 9. Voltage Noise Density vs. Temperature 7-9 Rev. F Page 8 of

9 VOLTAGE NOISE (nv/ Hz) T A = C AT Hz AT khz TOTAL SUPPLY VOLTAGE, V+ V, (V) Figure. Voltage Noise Density vs. Supply Voltage 7- OFFSET VOLTAGE (μv) TRIMMING WITH kω POT DOES NOT CHANGE TCV OS C TEMPERATURE ( C) C A A A Figure. Offset Voltage Drift of Five Representative Units vs. Temperature 7- CURRENT NOISE (pa/ Hz).. I/F CORNER = Hz. k k FREQUENCY (Hz) Figure. Current Noise Density vs. Frequency 7- CHANGE IN OFFSET VOLTAGE (μv) 7 TIME (Months) Figure. Long-Term Offset Voltage Drift of Six Representative Units 7- SUPPLY CURRENT (ma).... T A = + C T A = + C T A = C CHANGE IN INPUT OFFSET VOLTAGE (μv) T A = C V S = V C/G F A/E. TOTAL SUPPLY VOLTAGE (V) Figure. Supply Current vs. Supply Voltage 7- TIME AFTER POWER ON (Min) Figure. Warm-Up Offset Voltage Drift 7- Rev. F Page 9 of

10 V S = ±V OPEN-LOOP GAIN (db) T A = C T A = 7 C THERMAL SHOCK RESPONSE BAND VOLTAGE GAIN (db) 9 7 DEVICE IMMERSED IN 7 C OIL BATH 8 TIME (Sec) Figure. Offset Voltage Change Due to Thermal Shock 7- k k k M M FREQUENCY (Hz) Figure 9. Open-Loop Gain vs. Frequency M 7-9 INPUT BIAS CURRENT (na) V S = ±V GBW 8 C SLEW 7 A 7 TEMPERATURE ( C) 7-7 SLEW RATE (V/μS) PHASE MARGIN (Degrees) 7 ΦM 7 7 TEMPERATURE ( C) V S = ±V 9 GAIN BANDWIDTH PRODUCT (MHz) 7- Figure 7. Input Bias Current vs. Temperature Figure. Slew Rate, Gain Bandwidth Product, Phase Margin vs. Temperature INPUT OFFSET CURRENT (na) C V S = ±V GAIN (db) GAIN PHASE MARGIN = 7 T A = C V S = ±V 8 8 PHASE SHIFT (Degrees) A 7 7 TEMPERATURE ( C) 7-8 M M FREQUENCY (Hz) M 7- Figure 8. Input Offset Current vs. Temperature Figure. Gain, Phase Shift vs. Frequency Rev. F Page of

11 . T A = C. 8 V S = ±V V IN = mv A V = + OPEN-LOOP GAIN (V/μV).. R L = kω R L = kω % OVERSHOOT. TOTAL SUPPLY VOLTAGE (V) Figure. Open-Loop Voltage Gain vs. Supply Voltage 7- CAPACITIVE LOAD (pf) Figure. Small-Signal Overshoot vs. Capacitive Load 7- MAXIMUM OUTPUT SWING 8 8 k k k M FREQUENCY (Hz) T A = C V S = ±V Figure. Maximum Output Swing vs. Frequency M 7- mv V mv mv ns A VCL = + C L = pf V S = ±V T A = C Figure. Small-Signal Transient Response 7-8 MAXIMUM OUTPUT (V) 8 POSITIVE SWING NEGATIVE SWING +V V V μs A VCL = + V S = ±V T A = C T A = C V S = ±V k k LOAD RESISTANCE (Ω) Figure. Maximum Output Voltage vs. Load Resistance 7- V Figure 7. Large Signal Transient Response 7-7 Rev. F Page of

12 T A = C V S = V SHORT-CIRCUIT CURRENT (ma) I SC (+) I SC ( ) Ω.μF kω D.U.T. VOLTAGE GAIN =,.7μF kω OP kω.kω μf SCOPE R IN = MΩ TIME FROM OUTPUT SHORTED TO GROUND (Min) Figure 8. Short-Circuit Current vs. Time 7-8.μF.μF kω.kω Figure. Voltage Noise Test Circuit (. Hz to Hz) 7- CMRR (db) 8 V S = ±V T A = C V CM = ±V OPEN-LOOP VOLTAGE GAIN (V/μV) T A = C V S = ±V...8. k k k M FREQUENCY (Hz) Figure 9. CMRR vs. Frequency 7-9. k k k LOAD RESISTANCE (Ω) Figure. Open-Loop Voltage Gain vs. Load Resistance 7- COMMON-MODE RANGE (V) 8 8 T A = C T A = + C T A = + C T A = C T A = + C T A = + C VOLTAGE NOISE (nv) 8 9 SEC/DIV ± ± ± ± SUPPLY VOLTAGE (V) Figure. Common-Mode Input Range vs. Supply Voltage 7-.Hz TO Hz p-p NOISE Figure. Low Frequency Noise 7- Rev. F Page of

13 POWER SUPPLY REJECTION RATIO (db) 8 POSITIVE SWING NEGATIVE SWING T A = C k k k M M M FREQUENCY (Hz) Figure. PSRR vs. Frequency 7- Rev. F Page of

14 APPLICATION INFORMATION series units can be inserted directly into OP7 sockets with or without removal of external compensation or nulling components. Additionally, the can be fitted to unnulled AD7-type sockets; however, if conventional AD7 nulling circuitry is in use, it should be modified or removed to ensure correct operation. offset voltage can be nulled to (or another desired setting) using a potentiometer (see Figure ). The provides stable operation with load capacitances of up to pf and ± V swings; larger capacitances should be decoupled with a Ω resistor inside the feedback loop. The is unity-gain stable. Thermoelectric voltages generated by dissimilar metals at the input terminal contacts can degrade the drift performance. Best operation is obtained when both input contacts are maintained at the same temperature kω R P OFFSET VOLTAGE ADJUSTMENT 7 V+ OUTPUT The input offset voltage of the is trimmed at wafer level. However, if further adjustment of VOS is necessary, a kω trim potentiometer can be used. TCVOS is not degraded (see Figure ). Other potentiometer values from kω to MΩ can be used with a slight degradation (. μv/ C to. μv/ C) of TCVOS. Trimming to a value other than zero creates a drift of approximately (VOS/) μv/ C. For example, the change in TCVOS is. μv/ C if VOS is adjusted to μv. The offset voltage adjustment range with a kω potentiometer is ± mv. If smaller adjustment range is required, the nulling sensitivity can be reduced by using a smaller potentiometer in conjunction with fixed resistors. For example, Figure shows a network that has a 8 μv adjustment range..7kω kω POT.7kΩ 8 V+ Figure. Offset Voltage Adjustment 7-7- NOISE MEASUREMENTS To measure the 8 nv p-p noise specification of the in the. Hz to Hz range, the following precautions must be observed: The device must be warmed up for at least five minutes. As shown in the warm-up drift curve, the offset voltage typically changes μv due to increasing chip temperature after power-up. In the -second measurement interval, these temperature-induced effects can exceed tens-ofnanovolts. For similar reasons, the device has to be well-shielded from air currents. Shielding minimizes thermocouple effects. Sudden motion in the vicinity of the device can also feedthrough to increase the observed noise. The test time to measure. Hz to Hz noise should not exceed seconds. As shown in the noise-tester frequency response curve, the. Hz corner is defined by only one zero. The test time of seconds acts as an additional zero to eliminate noise contributions from the frequency band below. Hz. A noise voltage density test is recommended when measuring noise on a large number of units. A Hz noise V voltage density measurement correlates well with a. Hz to Figure. Offset Nulling Circuit Hz p-p noise reading, since both results are determined by the white noise and the location of the /f corner frequency. UNITY-GAIN BUFFER APPLICATIONS When Rf Ω and the input is driven with a fast, large signal pulse (> V), the output waveform looks as shown in the pulsed operation diagram (see Figure 7). During the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input, and a current, limited only by the output short-circuit protection, is drawn by the signal generator. With Rf Ω, the output is capable of handling the current requirements (IL ma at V); the amplifier stays in its active mode and a smooth transition occurs. When Rf > kω, a pole is created with Rf and the amplifier s input capacitance (8 pf) that creates additional phase shift and reduces phase margin. A small capacitor ( pf to pf) in parallel with Rf eliminates this problem. R f +.8V/μs 7-7 Figure 7. Pulsed Operation Rev. F Page of

15 COMMENTS ON NOISE The is a very low noise, monolithic op amp. The outstanding input voltage noise characteristics of the are achieved mainly by operating the input stage at a high quiescent current. The input bias and offset currents, which would normally increase, are held to reasonable values by the input bias current cancellation circuit. The A/E has IB and IOS of only ± na and na at C respectively. This is particularly important when the input has a high source resistance. In addition, many audio amplifier designers prefer to use direct coupling. The high IB, VOS, and TCVOS of previous designs have made direct coupling difficult, if not impossible, to use. Voltage noise is inversely proportional to the square root of bias current, but current noise is proportional to the square root of bias current. The noise advantage of the disappears when high source resistors are used. Figure 8, Figure 9, Figure compare the observed total noise of the with the noise performance of other devices in different circuit applications. / Figure 9 shows the. Hz to Hz p-p noise. Here the picture is less favorable; resistor noise is negligible and current noise becomes important because it is inversely proportional to the square root of frequency. The crossover with the OP7 occurs in the kω to kω range depending on whether balanced or unbalanced source resistors are used (at kω the IB and IOS error also can be the VOS spec). p-p NOISE (nv) k R S UNMATCHED e.g. R S =R S = kω,r S = R S MATCHED e.g. R S = kω,r S =R S = kω REGISTER RS NOISE ONLY k k k k R S SOURCE RESISTANCE (Ω) ( Voltage Noise) + Total Noise = ( Current Noise RS ) + Figure 9. Peak-to-Peak Noise (. Hz to Hz) as Source Resistance (Includes Resistor Noise) ( Resistor Noise) For low frequency applications, the OP7 is better than the Figure 8 shows noise vs. source resistance at Hz. The /OP7 when RS > kω. The only exception is when gain same plot applies to wideband noise. To use this plot, multiply error is important. the vertical scale by the square root of the bandwidth. Figure illustrates the Hz noise. As expected, the results are between the previous two figures. OP8/8 OP7 /7 RS 7-9 TOTAL NOISE (nv/ Hz) OP8/8 OP7 /7 R S UNMATCHED e.g. R S =R S = kω,r S = R S MATCHED e.g. R S = kω,r S =R S = kω R S REGISTER R S NOISE ONLY k k k k R S SOURCE RESISTANCE (Ω) Figure 8. Noise vs. Source Resistance (Including Resistor Noise) at Hz At RS < kω, the low voltage noise of the is maintained. With RS < kω, total noise increases but is dominated by the resistor noise rather than current or voltage noise. lt is only beyond RS of kω that current noise starts to dominate. The argument can be made that current noise is not important for applications with low-to-moderate source resistances. The crossover between the and OP7 noise occurs in the kω to kω region. 7-8 TOTAL NOISE (nv/ Hz) OP8/8 OP7 /7 R S UNMATCHED e.g. R S =R S = kω,r S = R S MATCHED e.g. R S = kω,r S =R S = kω RS REGISTER RS NOISE ONLY k k k k R S SOURCE RESISTANCE (Ω) Figure. Hz Noise vs. Source Resistance (Includes Resistor Noise) Audio Applications 7- Rev. F Page of

16 For reference, typical source resistances of some signal sources are listed in Table 7. Table 7. Source Device Impedance Comments Strain Gauge < Ω Typically used in low frequency applications. Magnetic Tape Head Magnetic Phonograph Cartridges Linear Variable Differential Transformer < Ω Low is very important to reduce self-magnetization problems when direct coupling is used. IB can be neglected. < Ω Similar need for low IB in direct coupled applications. does not introduce any selfmagnetization problems. < Ω Used in rugged servo-feedback applications. Bandwidth of interest is Hz to khz. Table 8. Open-Loop Gain Frequency OP7 Hz db db Hz db db Hz 9 db db db AUDIO APPLICATIONS Figure is an example of a phono pre-amplifier circuit using the for A; R-R-C-C form a very accurate RIAA network with standard component values. The popular method to accomplish RIAA phono equalization is to employ frequency dependent feedback around a high quality gain block. Properly chosen, an RC network can provide the three necessary time constants of 8 μs, 8 μs, and 7 μs. For initial equalization accuracy and stability, precision metal film resistors and film capacitors of polystyrene or polypropylene are recommended because they have low voltage coefficients, dissipation factors, and dielectric absorption. (high-k ceramic capacitors should be avoided here, though low-k ceramics, such as NPO types that have excellent dissipation factors and somewhat lower dielectric absorption, can be considered for small values.) MOVING MAGNET CARTRIDGE INPUT R A 7.kΩ C A pf A C () µf + + LF ROLLOFF C OUT.7µF R 97.kΩ R Ω R 7.87kΩ R 7kΩ C.µF C.µF Figure. Phono Preamplifier Circuit R kω IN OUTPUT G = khz GAIN R =. ( + ) R = (9.9dB) AS SHOWN The brings a. nv/ Hz voltage noise and. pa/ Hz current noise to this circuit. To minimize noise from other sources, R is set to a value of Ω, generating a voltage noise of. nv/ Hz. The noise increases the. nv/ Hz of the amplifier by only.7 db. With a kω source, the circuit noise measures db below a mv reference level, unweighted, in a khz noise bandwidth. Gain (G) of the circuit at khz can be calculated by the expression: R G =. + R For the values shown, the gain is just under (or db). Lower gains can be accommodated by increasing R, but gains higher than db show more equalization errors because of the 8 MHz gain bandwidth of the. This circuit is capable of very low distortion over its entire range, generally below.% at levels up to 7 V rms. At V output levels, it produces less than.% total harmonic distortion at frequencies up to khz. Capacitor C and Resistor R form a simple db per octave rumble filter, with a corner at Hz. As an option, the switch selected Shunt Capacitor C, a nonpolarized electrolytic, bypasses the low frequency roll-off. Placing the rumble filter s high-pass action after the preamplifier has the desirable result of discriminating against the RIAA-amplified low frequency noise components and pickup produced low frequency disturbances. A preamplifier for NAB tape playback is similar to an RIAA phono preamplifier, though more gain is typically demanded, along with equalization requiring a heavy low frequency boost. The circuit in Figure can be readily modified for tape use, as shown by Figure. 7- Rev. F Page of

17 TAPE HEAD R A C A + R kω Ω R kω.µf.7µf Figure. Tape Head Preamplifier kω T = 8µs T = µs 7- Noise performance of this circuit is limited more by the Input Resistors R and R than by the op amp, as R and R each generate a nv/ Hz noise, while the op amp generates a. nv/ Hz noise. The rms sum of these predominant noise sources is about nv/ Hz, equivalent to.9 μv in a khz noise bandwidth, or nearly db below a mv input signal. Measurements confirm this predicted performance. R kω R kω C mf R Ω While the tape equalization requirement has a flat high frequency gain above khz (T = μs), the amplifier need not be stabilized for unity gain. The decompensated OP7 provides a greater bandwidth and slew rate. For many applications, the idealized time constants shown can require trimming of R and R to optimize frequency response for nonideal tape head performance and other factors (see the References section). The network values of the configuration yield a db gain at khz, and the dc gain is greater than 7 db. Thus, the worstcase output offset is just over mv. A single.7 μf output capacitor can block this level without affecting the dynamic range. The tape head can be coupled directly to the amplifier input, because the worst-case bias current of 8 na with a mh, μ inch head (such as the PRBH7K) is not troublesome. Amplifier bias-current transients that can magnetize a head present one potential tape head problem. The and OP7 are free of bias current transients upon power-up or powerdown. It is always advantageous to control the speed of power supply rise and fall to eliminate transients. In addition, the dc resistance of the head should be carefully controlled and preferably below kω. For this configuration, the bias current induced offset voltage can be greater than the pv maximum offset if the head resistance is not sufficiently controlled. A simple, but effective, fixed gain transformerless microphone preamp (Figure ) amplifies differential signals from low impedance microphones by db and has an input impedance of kω. Because of the high working gain of the circuit, an OP7 helps to preserve bandwidth, which is khz. As the OP7 is a decompensated device (minimum stable gain of ), a dummy resistor, Rp, may be necessary if the microphone is to be unplugged. Otherwise, the % feedback from the open input can cause the amplifier to oscillate. Common-mode input noise rejection will depend upon the match of the bridge-resistor ratios. Either close tolerance (.%) types should be used, or R should be trimmed for best CMRR. All resistors should be metal film types for best stability and low noise. LOW IMPEDANCE MICROPHONE INPUT (Z = Ω TO Ω) R = R R R R kω R P kω / OP7 + R kω R7 kω Figure. Fixed Gain Transformerless Microphone Preamplifier OUTPUT For applications demanding appreciably lower noise, a high quality microphone transformer coupled preamplifier (Figure ) incorporates the internally compensated. T is a JE- K-E Ω/ kω transformer that provides an optimum source resistance for the device. The circuit has an overall gain of db, the product of the transformer s voltage setup and the op amp s voltage gain. C 8pF R R Ω Ω Ω SOURCE T R Ω A OUTPUT T JENSEN JE K E JENSEN TRANSFORMERS Figure. High Quality Microphone Transformer Coupled Preamplifier Gain can be trimmed to other levels, if desired, by adjusting R or R. Because of the low offset voltage of the, the output offset of this circuit is very low,.7 mv or less, for a db gain. The typical output blocking capacitor can be eliminated in such cases, but it is desirable for higher gains to eliminate switching transients. 8 +8V 8V Figure. Burn-In Circuit Rev. F Page 7 of

18 Capacitor C and Resistor R form a μs time constant in this circuit, as recommended for optimum transient response by the transformer manufacturer. With C in use, A must have unitygain stability. For situations where the μs time constant is not necessary, C can be deleted, allowing the faster OP7 to be employed. A Ω resistor and R and R gain resistors connected to a noiseless amplifier generate nv of noise in a khz bandwidth, or 7 db below a mv reference level. Any practical amplifier can only approach this noise level; it can never exceed it. With the and T specified, the additional noise degradation is close to. db (or 9. referenced to mv). REFERENCES. Lipshitz, S. R, On RIAA Equalization Networks, JAES, Vol. 7, June 979, p Jung, W. G., IC Op Amp Cookbook, nd. Ed., H. W. Sams and Company, 98.. Jung, W. G., Audio IC Op Amp Applications, nd. Ed., H. W. Sams and Company, Jung, W. G., and Marsh, R. M., Picking Capacitors, Audio, February and March, 98.. Otala, M., Feedback-Generated Phase Nonlinearity in Audio Amplifiers, London AES Convention, March 98, preprint 97.. Stout, D. F., and Kaufman, M., Handbook of Operational Amplifier Circuit Design, New York, McGraw-Hill, 97. Rev. F Page 8 of

19 OUTLINE DIMENSIONS. (.). (9.7). (9.) PIN. (.) MAX. (.8). (.). (.9). (.).8 (.). (.) 8. (.) BSC.7 (.78). (.). (.).8 (7.). (.). (.). (.8) MIN SEATING PLANE. (.) MIN. (.) MAX. (.8) GAUGE PLANE. (8.). (7.87). (7.). (.9) MAX.9 (.9). (.). (.9). (.). (.).8 (.). (.7).8 (.97). (.98). (.) COPLANARITY.. (.98).8 (.89) 8 SEATING PLANE.7 (.) BSC. (.).8 (.8).7 (.88). (.). (.). (.). (.98).7 (.7) 8. (.9). (.99).7 (.). (.7) COMPLIANT TO JEDEC STANDARDS MS--BA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. COMPLIANT TO JEDEC STANDARDS MS--AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.. (.8) MAX Figure. 8-Lead Plastic Dual-in-Line Package [PDIP] (N-8) P-Suffix Dimensions shown in inches and (millimeters). (.) MIN. (.) MAX. (.) BSC. (.9) MAX. (.8). (.8). (.8). (.).7 (.78). (.7) 8 REFERENCE PLANE. (7.87). (.9). (.). (.8). (.8) MIN SEATING PLANE. (8.).9 (7.7). (.8).8 (.).7 (9.). (8.). (8.). (7.7) Figure 8. 8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8) S-Suffix Dimensions shown in millimeters and (inches).8 (.7). (.9). (.7) MIN. (.) MIN. (.7) MAX. (.8) BSC. (.) BSC 8.9 (.8). (.). (.) MAX. (.) BSC. (.8). (.). (.). (.). (.).8 (.7) BSC BASE & SEATING PLANE 7. (.). (.). (.).7 (.9) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. COMPLIANT TO JEDEC STANDARDS MO--AK CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. -A Figure 7. 8-Lead Ceramic DIP Glass Hermetic Seal [CERDIP] (Q-8) Z-Suffix Dimensions shown in inches and (millimeters) Figure 9. 8-Lead Metal Can [TO-99] (H-8) J-Suffix Dimensions shown in inches and (millimeters) Rev. F Page 9 of

20 ORDERING GUIDE Model Temperature Range Package Description Package Option AJ/88C to + C 8-Lead Metal Can (TO-99) J-Suffix (H-8) GJ to +8 C 8-Lead Metal Can (TO-99) J-Suffix (H-8) AZ to + C 8-Lead CERDIP Z-Suffix (Q-8) AZ/88C to + C 8-Lead CERDIP Z-Suffix (Q-8) EZ to +8 C 8-Lead CERDIP Z-Suffix (Q-8) GZ to +8 C 8-Lead CERDIP Z-Suffix (Q-8) EP to +7 C 8-Lead PDIP P-Suffix (N-8) EPZ to +7 C 8-Lead PDIP P-Suffix (N-8) GP to +8 C 8-Lead PDIP P-Suffix (N-8) GPZ to +8 C 8-Lead PDIP P-Suffix (N-8) GS to +8 C 8-Lead SOIC S-Suffix (R-8) GS-REEL to +8 C 8-Lead SOIC S-Suffix (R-8) GS-REEL7 to +8 C 8-Lead SOIC S-Suffix (R-8) GSZ to +8 C 8-Lead SOIC S-Suffix (R-8) GSZ-REEL to +8 C 8-Lead SOIC S-Suffix (R-8) GSZ-REEL7 to +8 C 8-Lead SOIC S-Suffix (R-8) NBC Die Z = Pb-free part. Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C7--/(F) Rev. F Page of