Low Voltage Micropower Quad Operational Amplifier OP490

Transcription

1 Low Voltage Micropower Quad Operational Amplifier FEATURES Single/dual-supply operation.6 V to 36 V ±0.8 V to ±8 V Single-supply operation; input and output voltage ranges include ground Low supply current: 80 μa maximum High output drive: 5 ma minimum Low offset voltage:.0 ma maximum High open-loop gain: 800 V/mV typical Industry standard quad pinouts GENERAL DESCRIPTION The is a high performance micropower quad op amp that operates from a single supply of.6 V to 36 V or from dual supplies of ±0.8 V to ±8 V. The input voltage range includes the negative rail allowing the to accommodate input signals down to ground in single-supply operation. The output swing of the also includes ground when operating from a single supply, enabling zero-in, zero-out operation. The quad draws less than 0 μa of quiescent supply current per amplifier, but each amplifier is able to deliver over 5 ma of output current to a load. Input offset voltage is under FUNCTIONAL BLOCK DIAGRAM OUT A 4 OUT D IN A 3 IN D IN A 3 IN D V 4 V IN B 5 0 IN C IN B 6 9 IN C OUT B 7 8 OUT C TOP VIEW (Not to Scale) Figure. 4-Lead Plastic DIP (P-Suffix) OUT A 6 OUT D IN A 5 IN D IN A 3 4 IN D V 4 3 V IN B 5 IN C IN B 6 IN C OUT B 7 0 OUT C NC 8 TOP VIEW (Not to Scale) 9 NC NC = NO CONNECT Figure. 6-Lead SOIC (S-Suffix) 0.5 mv. Gain exceeds over 400,000 and CMR is better than 90 db. A PSRR of under 5.6 μv/v minimizes offset voltage changes experienced in battery-powered systems. The quad combines high performance with the space and cost savings of quad amplifiers. The minimal voltage and current requirements of the make it ideal for battery and solar-powered applications, such as portable instruments and remote sensors Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 906, Norwood, MA , U.S.A. Tel: Fax: Analog Devices, Inc. All rights reserved.

2 TABLE OF CONTENTS Features... Functional Block Diagram... General Description... Revision History... Specifications... 3 Electrical Characteristics... 3 Absolute Maximum Ratings... 5 Thermal Resistance... 5 ESD Caution... 5 Typical Performance Characteristics... 6 Applications Information... 9 Battery-Powered Applications...9 Single-Supply Output Voltage Range...9 Input Voltage Protection... 0 Micropower Voltage-Controlled Oscillator... 0 Micropower Single-Supply Quad Voltage-Output 8-Bit DAC... High Output Amplifier... Single-Supply Micropower Quad Programmable Gain Amplifier... Outline Dimensions... 4 Ordering Guide... 5 REVISION HISTORY 7/09 Rev. C to Rev. D Deleted 4-Lead CERDIP (Y-Suffix)... Universal Deleted Figure, Renumbered Figures Sequentially... Changes to Table... 3 Changes to Table... 4 Changes to Figure Updated Outline Dimensions... 4 Changes to Ordering Guide /0 Rev. B to Rev. C Deleted 8-Pin LCC (TC-Suffix) Pin Connection Diagram... Deleted Electrical Characteristics... 3 Edits to Absolute Maximum Ratings... 6 Edits to Ordering Guide... 6 Rev. D Page of 6

3 SPECIFICATIONS ELECTRICAL VS = ±.5 V to ±5 V, TA = 5 C, unless otherwise noted. Table. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOS mv Input Offset Current IOS VCM = 0 V na Input Bias Current IB VCM = 0 V 4. 5 na Large Signal Voltage Gain AVO VS = ±5 V, VO = ±0 V RL = 00 kω V/mV RL = 0 kω V/mV RL = kω V/mV V = 5 V, V = 0 V, V < VO < 4 V RL = 00 kω V/mV RL = 0 kω V/mV Input Voltage Range IVR V = 5 V, V = 0 V 0 4 V Common-Mode Rejection Ratio CMRR V = 5 V, V = 0 V, 0 V < VCM < 4 V db VS = ±5 V, 5 V < VCM < 3.5 V 90 0 db Input Resistance Differential Mode RIN VS = ±5 V 30 MΩ Input Resistance Common-Mode RINCM VS = ±5 V 0 GΩ OUTPUT CHARACTERISTICS Output Voltage Swing VO L VS = ±5 V, RL = 0 kω ±3.5 ±4. V VS = ±5 V, RL = kω ±0.5 ±.5 V Output Voltage High VOH V = 5 V, V = 0 V, RL = kω V Output Voltage Low VOL V = 5 V, V = 0 V, RL = 0 kω μv Capacitive Load Stability AV = 650 pf DYNAMIC PERFORMANCE Slew Rate SR VS = ±5 V 5 V/ms Channel Separation CS fo = 0 Hz, VO = 0 V p-p, VS = ±5 V 0 50 db Gain Bandwidth Product GBWP AV = 0 khz POWER SUPPLY Power Supply Rejection Ratio PSRR 3. 0 μv/v Supply Current (All Amplifiers) ISY VS = ±.5 V, no load μa VS = ±5 V, no load μa NOISE PERFORMANCE Voltage Noise en p-p fo = 0. Hz to 0 Hz, VS = ±5 V 3 μv p-p Voltage Noise Density en f = khz 60 nv/ Hz Current Noise Density in f = khz 0.07 pa/ Hz Guaranteed by CMRR test. Guaranteed but not 00% tested. Rev. D Page 3 of 6

4 @ VS = ±.5 V to ±5 V, 40 C TA 85 C Table. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOS mv Average Input Offset Voltage Drift TCVOS VS = ±5 V 4 μv/ C Input Offset Current IOS VCM = 0 V.3 7 na Input Bias Current IB VCM = 0 V na Large Signal Voltage Gain AVO VS = ±5 V, VO = ±0 V RL = 00 kω V/mV RL = 0 kω V/mV RL = kω 75 5 V/mV V = 5 V, V = 0 V, V < VO < 4 V RL = 00 kω V/mV RL = 0 kω V/mV Input Voltage Range IVR V = 5 V, V = 0 V V V Common-Mode Rejection Ratio CMRR V = 5 V, V = 0 V, 0 V < VCM < 3.5 V db VS = ±5 V, 5 V < VCM < 3.5 V 90 0 db OUTPUT CHARACTERISTICS Output Voltage Swing VO VS = ±5 V ±3 ±4 V RL = kω ±0 ± V Output Voltage High VOH V = 5 V, V = 0 V, RL = kω V Output Voltage Low VOL V = 5 V, V = 0 V, RL = 0 kω μv POWER SUPPLY Power Supply Rejection Ratio PSRR μv/v Supply Current (All Amplifiers) ISY VS = ±.5 V, no load ma VS = ±5 V, no load 75 0 ma Guaranteed by CMRR test. V IN IN OUTPUT Figure 3. Simplified Schematic V Rev. D Page 4 of 6

5 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage ±8 V Digital Input Voltage [(V ) 0 V] to [(V) 0 V] Common-Mode Input Voltage [(V ) 0 V] to [(V) 0 V] Output Short-Circuit Duration Continuous Storage Temperature Range 65 C to 50 C Operating Temperature Range 40 C to 85 C Junction Temperature (TJ) Range 65 C to 50 C Lead Temperature (Soldering, 300 C 60 sec) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θja is specified for worst-case mounting conditions, that is, θja is specified for a device in socket for the PDIP package; θja is specified for a device soldered to a printed circuit board (PCB) for the SOIC package. Table 4. Package Type θja θjc Unit 4-Lead PDIP_N (S-Suffix) C/W 6-Lead SOIC_R (S-Suffix) 9 7 C/W ESD CAUTION Rev. D Page 5 of 6

6 TYPICAL PERFORMANCE CHARACTERISTICS INPUT OFFSET VOLTAGE (ma) TOTAL SUPPLY CURRENT (µa) V S = ±.5V TEMPERATURE ( C) Figure 4. Input Offset Voltage vs. Temperature TEMPERATURE ( C) Figure 7. Total Supply Current vs. Temperature INPUT OFFSET CURRENT (na) OPEN-LOOP GAIN (V/mV) R L = 0kΩ 5 C 85 C 5 C TEMPERATURE ( C) Figure 5. Input Offset Current vs. Temperature SINGLE-SUPPLY VOLTAGE (V) Figure 8. Open-Loop Gain vs. Single-Supply Voltage R L = 0kΩ INPUT BIAS CURRENT (na) OPEN-LOOP GAIN (db) GAIN PHASE PHASE SHIFT (Degrees) TEMPERATURE ( C) Figure 6. Input Bias Current vs. Temperature k 0k 00k FREQUENCY (Hz) Figure 9. Open-Loop Gain and Phase Shift vs. Frequency Rev. D Page 6 of 6

7 60 0 CLOSED-LOOP GAIN (db) POWER SUPPLY REJECTION (db) POSITIVE SUPPLY NEGATIVE SUPPLY k 0k 00k FREQUENCY (Hz) Figure 0. Closed-Loop Gain vs. Frequency k LOAD RESISTANCE (Ω) Figure 3. Power Supply Rejection vs. Frequency OUTPUT VOLTAGE SWING (V) V = 5V, V = 0V COMMON-MODE REJECTION (db) k 0k 00k LOAD RESISTANCE (Ω) Figure. Output Voltage Swing vs. Load Resistance k FREQUENCY (Hz) Figure 4. Common-Mode Rejection vs. Frequency k OUTPUT SWING (V) Hz) POSITIVE NEGATIVE VOLTAGE NOISE DENSITY (nv/ k 0k 00k LOAD RESISTANCE (Ω) Figure. Output Voltage Swing vs. Load Resistance k FREQUENCY (Hz) Figure 5. Voltage Noise Density vs. Frequency Rev. D Page 7 of 6

8 Hz) CURRENT NOISE DENSITY (pa/ 00 0 VOLTAGE (5V/DIV) A V = R L = 0kΩ C L = 500pF k FREQUENCY (Hz) Figure 6. Current Noise Density vs. Frequency TIME (ms/div) Figure 8. Large Signal Transient Response VOLTAGE (0mV/DIV) A V = R L = 0kΩ C L = 500pF TIME (00µs/DIV) Figure 7. Small Signal Transient Response Rev. D Page 8 of 6

9 APPLICATIONS INFORMATION V IN 8V GND 8V kω D A Figure 9. Burn-In Circuit 5V A OP37 A 00Ω 5V B C D V C B 5V 5V 0kΩ 0V 0Hz CHANNEL SEPARATION = 0 log Figure 0. Channel Separation Test Circuit V V V/ BATTERY-POWERED APPLICATIONS The can be operated on a minimum supply voltage of.6 V or with dual supplies of ±0.8 V drawing only 60 μa of supply current. In many battery-powered circuits, the can be continuously operated for hundreds of hours before requiring battery replacement, thereby reducing equipment downtime and operating costs. High performance portable equipment and instruments frequently use lithium cells because of their long shelf life, light weight, and high energy density relative to older primary cells. Most lithium cells have a nominal output voltage of 3 V and are noted for a flat discharge characteristic. The low supply current requirement of the, combined with the flat discharge characteristic of the lithium cell, indicates that the can be operated over the entire useful life of the cell. Figure shows the typical discharge characteristic of a Ah lithium cell powering an with each amplifier, in turn, driving full output swing into a 00 kω load. LITHIUM-SULPHUR DIOXIDE CELL VOLTAGE (V) HOURS Figure. Lithium-Sulphur Dioxide Cell Discharge Characteristic with and 00 kω Loads SINGLE-SUPPLY OUTPUT VOLTAGE RANGE In single-supply operation the input and output ranges of the include ground. This allows true zero-in, zero-out operation. The output stage provides an active pull-down to around 0.8 V above ground. Below this level, a load resistance of up to MΩ to ground is required to pull the output down to zero. In the region from ground to 0.8 V, the has voltage gain equal to the data sheet specification. Output current source capability is maintained over the entire voltage range including ground Rev. D Page 9 of 6

10 INPUT VOLTAGE PROTECTION The uses a PNP input stage with protection resistors in series with the inverting and noninverting inputs. The high breakdown of the PNP transistors coupled with the protection resistors provides a large amount of input protection, allowing the inputs to be taken 0 V beyond either supply without damaging the amplifier. MICROPOWER VOLTAGE-CONTROLLED OSCILLATOR An in combination with an inexpensive quad CMOS switch comprise the precision VCO of Figure. This circuit provides triangle and square wave outputs and draws only 75 μa from a 5 V supply. A acts as an integrator; S switches the C 75nF 5V charging current symmetrically to yield positive and negative ramps. The integrator is bounded by B, which acts as a Schmitt trigger with a precise hysteresis of.67 V, set by Resistors R5, R6, and R7, and the associated CMOS switches. The resulting output of A is a triangle wave with upper and lower levels of 3.33 V and.67 V. The output of B is a square wave with almost rail-to-rail swing. With the components shown, frequency of operation is given by the equation fout = VCONTROL (Volts) 0 Hz/V but this is easily changed by varying C. The circuit operates well up to a few hundred hertz. 5V V CONTROL R 00kΩ R 00kΩ R3 00kΩ R4 00kΩ 4 R5 00kΩ 3 6 A 5 B 7 TRIANGLE OUT R8 00kΩ 5V SQUARE OUT IN/OUT V DD 4 S OUT/IN CONT 3 5V R6 00kΩ R7 00kΩ OUT/IN CONT S 3 IN/OUT IN/OUT 4 CONT OUT/IN S3 5 0 CONT OUT/IN 6 9 S4 IN/OUT V SS 7 8 5V Figure. Micropower Voltage Controlled Oscillator Rev. D Page 0 of 6

11 MICROPOWER SINGLE-SUPPLY QUAD VOLTAGE- OUTPUT 8-BIT DAC The circuit shown in Figure 3 uses the CMOS quad 8-bit DAC, and the to form a single-supply quad voltage output DAC with a supply drain of only 40 μa. The is used in voltage switching mode and each DAC has an output resistance ( 0 kω) independent of the digital input code. The output amplifiers act as buffers to avoid loading the DACs. The 00 kω resistors ensure that the outputs swing below 0.8 V when required. 5V 4 REFERENCE VOLTAGE.5V 4 I OUTA DAC A V REF A 3 A R 00kΩ V OUT A 5 I OUTA/B 6 6 I OUTB DAC B V REF B 8 5 B 7 R 00kΩ V OUT B 3 5 I OUTC DAC C V REF C 7 C 4 R3 00kΩ V OUT C 4 3 I OUTC/D I OUTD DAC D V REF D 9 0 D 8 R4 00kΩ V OUT D DAC DATA BUS PIN 9 (LSB) TO PIN 6 (MSB) 7 A/B DIGITAL CONTROL SIGNALS R/W DS DS DGND Figure 3. Micropower Single-Supply Quad Voltage Output 8-Bit DAC Rev. D Page of 6

12 R5 5kΩ 5V R 9kΩ R6 5kΩ V IN R kω 4 3 A R3 50Ω R7 50Ω 8 C 9 0 5V HIGH OUTPUT AMPLIFIER The amplifier shown in Figure 4 is capable of driving 5 V p-p into a kω load. Design of the amplifier is based on a bridge configuration. A amplifies the input signal and drives the load with the help of B. Amplifier C is a unity-gain inverter which drives the load with help from D. Gain of the high output amplifier with the component values shown is 0, but can easily be changed by varying R or R. SINGLE-SUPPLY MICROPOWER QUAD PROGRAMMABLE GAIN AMPLIFIER The combination of a quad and the quad 8-bit CMOS DAC creates a quad programmable-gain amplifier with a quiescent supply drain of only 40 μa. The digital code present at the DAC, which is easily set by a microprocessor, 6 3 R4 R8 50Ω R 7 L 50Ω 4 5 B D Figure 4. High Output Amplifier determines the ratio between the fixed DAC feedback resistor and the resistance of the DAC ladder seen by the op amp feedback loop. The gain of each amplifier is: VOUT 56 = V n IN where n equals the decimal equivalent of the 8-bit digital code present at the DAC. If the digital code present at the DAC consists of all zeros, the feedback loop opens causing the op amp output to saturate. The 0 MΩ resistors placed in parallel with the DAC feedback loop eliminate this problem with a very small reduction in gain accuracy. The.5 V reference biases the amplifiers to the center of the linear region providing maximum output swing Rev. D Page of 6

13 V IN A C 0.µF 3 R FB A V DD V REF A 4 5V DAC A I OUTA 4 R 0MΩ 3 A V OUT A I OUTA/B 5 V IN B C 0.µF 7 R FB B V REF B 8 DAC B I OUTB 6 R 0MΩ 6 5 B 7 V OUT B V IN C C3 0.µF 5 R FB C V REF C 7 DAC C I OUTC 5 R3 0MΩ 9 0 C 8 V OUT C I OUTC/D 4 V IN D C4 0.µF R FB D V REF D DAC DATA BUS PIN 9 (LSB) TO PIN 6 (MSB) DAC D I OUTD 3 R4 0MΩ 3 D 4 V OUT D DIGITAL CONTROL SIGNALS A/B R/W DS DS DGND.5V REFERENCE VOLTAGE Figure 5. Single-Supply Micropower Quad Programmable Gain Amplifier Rev. D Page 3 of 6

14 OUTLINE DIMENSIONS (9.69) (9.05) (8.67) 0.0 (5.33) MAX 0.50 (3.8) 0.30 (3.30) 0.0 (.79) 0.0 (0.56) 0.08 (0.46) 0.04 (0.36) (.54) BSC (.78) (.7) (.4) (7.) 0.50 (6.35) 0.40 (6.0) 0.05 (0.38) MIN SEATING PLANE (0.3) MIN (.5) MAX 0.05 (0.38) GAUGE PLANE 0.35 (8.6) 0.30 (7.87) (7.6) (0.9) MAX 0.95 (4.95) 0.30 (3.30) 0.5 (.9) 0.04 (0.36) 0.00 (0.5) (0.0) COMPLIANT TO JEDEC STANDARDS MS-00 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 6. 4-Lead Plastic Dual In-Line Package [PDIP] Narrow Body P-Suffix (N-4) Dimensions shown in inches and (millimeters) A 0.50 (0.434) 0.0 (0.3976) (0.99) 7.40 (0.93) (0.493) 0.00 (0.3937) 0.30 (0.08) 0.0 (0.0039) COPLANARITY.7 (0.0500) BSC.65 (0.043).35 (0.095) (0.00) SEATING PLANE 0.33 (0.030) 0.3 (0.0) 0.0 (0.0079) (0.095) 0.5 (0.0098) 45.7 (0.0500) 0.40 (0.057) COMPLIANT TO JEDEC STANDARDS MS-03-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 7. 6-Lead Standard Small Outline Package [SOIC_W] Wide Body S-Suffix (RW-6) Dimensions shown in millimeters and (inches) B Rev. D Page 4 of 6

15 ORDERING GUIDE Model Temperature Range Package Description Package Option GP 40 C to 85 C 4-Lead PDIP_N N-4 (P-Suffix) GPZ 40 C to 85 C 4-Lead PDIP_N N-4 (P-Suffix) GS 40 C to 85 C 6-Lead SOIC_W RW-6 (S-Suffix) GSZ 40 C to 85 C 6-Lead SOIC_W RW-6 (S-Suffix) GSZ-REEL 40 C to 85 C 6-Lead SOIC_W RW-6 (S-Suffix) Z = RoHS Compliant Part. Rev. D Page 5 of 6

16 NOTES Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D /09(D) Rev. D Page 6 of 6