250 MHz, General Purpose Voltage Feedback Op Amps AD8047/AD8048

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1 5 MHz, General Purpose Voltage Feedback Op Amps AD8/AD88 FEATURES Wide Bandwidth AD8, G = + AD88, G = + Small Signal 5 MHz 6 MHz Large Signal ( V p-p) MHz 6 MHz 5.8 ma Typical Supply Current Low Distortion, (SFDR) Low Noise 66 dbc 5 MHz 5 dbc MHz 5. nv/ Hz (AD8),.8 nv/ Hz (AD88) Noise Drives 5 pf Capacitive Load High Speed Slew Rate 5 V/ s (AD8), V/ s (AD88) Settling ns to.%, V Step V to 6 V Supply Operation APPLICATIONS Low Power ADC Input Driver Differential Amplifiers IF/RF Amplifiers Pulse Amplifiers Professional Video DAC Current to Voltage Conversion Baseband and Video Communications Pin Diode Receivers Active Filters/Integrators PRODUCT DESCRIPTION The AD8 and AD88 are very high speed and wide bandwidth amplifiers. The AD8 is unity gain stable. The AD88 is stable at gains of two or greater. The AD8 and AD88, which utilize a voltage feedback architecture, meet the requirements of many applications that previously depended on current feedback amplifiers. A proprietary circuit has produced an amplifier that combines many of the best characteristics of both current feedback and voltage feedback amplifiers. For the power (6.6 ma max), the AD8 and AD88 exhibit fast and accurate pulse response ( ns to.%) as well as extremely wide small signal and large signal bandwidth and low distortion. The AD8 achieves 5 dbc distortion at MHz, 5 MHz small signal, and MHz large signal bandwidths. FUNCTIONAL BLOCK DIAGRAM 8-Pin Plastic PDIP (N) and SOIC (R) Packages NC INPUT +INPUT The AD8 and AD88 s low distortion and cap load drive make the AD8/AD88 ideal for buffering high speed ADCs. They are suitable for -bit/ MSPS or 8-bit/6 MSPS ADCs. Additionally, the balanced high impedance inputs of the voltage feedback architecture allow maximum flexibility when designing active filters. The AD8 and AD88 are offered in industrial ( C to +85 C) temperature ranges and are available in 8-lead PDIP and SOIC packages. V AD8/ AD88 (TOP VIEW) NC = NO CONNECT Figure. AD8 Large Signal Transient Response, V O = V p-p, G = NC OUTPUT NC Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 96, Norwood, MA 6-96, U.S.A. Tel: 8/9- Fax: 8/6-8 Analog Devices, Inc. All rights reserved.

2 AD8/AD88 SPECIFICATIONS ELECTRICAL CHARACTERISTICS AD8A AD88A Parameter Conditions Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE Bandwidth ( db) Small Signal. V p-p MHz Large Signal = V p-p 5 6 MHz Bandwidth for. db Flatness = mv p-p AD8, = Ω; AD88, = Ω 5 5 MHz Slew Rate, Average +/ = V Step 5 5 V/µs Rise/Fall Time =.5 V Step.. ns = V Step.. ns Settling Time To.% = V Step ns To.% = V Step ns HARMONIC/NOISE PERFORMANCE Second Harmonic Distortion V p-p; MHz 5 8 dbc R L = kω 6 6 dbc Third Harmonic Distortion V p-p; MHz 6 56 dbc R L = kω 6 65 dbc Input Voltage Noise f = khz 5..8 nv/ Hz Input Current Noise f = khz.. pa/ Hz Average Equivalent Integrated Input Noise Voltage. MHz to MHz 6 µv rms Differential Gain Error (.58 MHz) R L = 5 Ω, G = +.. % Differential Phase Error (.58 MHz) R L = 5 Ω, G = +.. Degree DC PERFORMANCE, R L = 5 Ω Input Offset Voltage mv T MIN to T MAX mv Offset Voltage Drift ± 5 ± 5 µv/ C Input Bias Current.5.5 µa T MIN to T MAX µa Input Offset Current.5.5 µa T MIN to T MAX µa Common-Mode Rejection Ratio V CM = ±.5 V 8 8 db Open-Loop Gain = ±.5 V db T MIN to T MAX 5 56 db INPUT CHARACTERISTICS Input Resistance 5 5 kω Input Capacitance.5.5 pf Input Common-Mode Voltage Range ±. ±. V OUTPUT CHARACTERISTICS Output Voltage Range, R L = 5 Ω ±.8 ±. ±.8 ±. V Output Current 5 5 ma Output Resistance.. Ω Short-Circuit Current ma POWER SUPPLY Operating Range ±. ±5. ±6. ±. ±5. ±6. V Quiescent Current ma T MIN to T MAX.5.5 ma Power Supply Rejection Ratio 8 8 db NOTES See Absolute Maximum Ratings and Theory of Operation sections. Measured at A V = 5. Measured with respect to the inverting input. Specifications subject to change without notice. ( V S = 5 V, R LOAD =, A V = (AD8), A V = (AD88), unless otherwise noted.)

3 AD8/AD88 ABSOLUTE MAXIMUM RATINGS Supply Voltage, ( ) ( ) V Voltage Swing Bandwidth Product AD V-MHz AD V-MHz Internal Power Dissipation Plastic Package (N) W Small Outline Package (R) W Input Voltage (Common Mode) ±V S Differential Input Voltage ±. V Output Short-Circuit Duration Observe Power Derating Curves Storage Temperature Range (N, R) C to +5 C Operating Temperature Range (A Grade)... C to +85 C Lead Temperature Range (Soldering sec) C NOTES Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Specification is for device in free air: 8-Lead PDIP Package, JA = 9 C/W; 8-Lead SOIC Package, JA = C/W METALLIZATION PHOTOS Dimensions shown in inches and (mm) Connect Substrate to. AD8.5 (.) MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by these devices is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 5 C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 5 C for an extended period can result in device failure. While the AD8 and AD88 are internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (5 C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves. MAXIMUM POWER DISSIPATION (W) PIN PDIP PACKAGE 8-PIN SOIC PACKAGE T J = +5 C AMBIENT TEMPERATURE ( C) Figure. Plot of Maximum Power Dissipation vs. Temperature IN ORDERING GUIDE +IN. (.) AD88.5 (.) Temperature Package Package Model Range Description Option* AD8AN C to +85 C PDIP N-8 AD8AR C to +85 C SOIC R-8 AD8AR-REEL C to +85 C SOIC R-8 AD8AR-REEL C to +85 C SOIC R-8 AD88AN C to +85 C PDIP N-8 AD88AR C to +85 C SOIC R-8 AD88AR-REEL C to +85 C SOIC R-8 AD88AR-REEL C to +85 C SOIC R-8 *N = PDIP, R= SOIC IN +IN. (.) CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8/AD88 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

4 AD8/AD88 Typical Performance Characteristics PULSE GENERATOR T R /T F = 5ps PULSE GENERATOR T R /T F = 5ps V IN R T = 9.9 AD8 6 V IN R IN R T = 66.5 AD8 6 TPC. AD8 Noninverting Configuration, G = + TPC. AD8 Inverting Configuration, G = V V TPC. AD8 Large Signal Transient Response; V O = V p-p, G = + TPC 5. AD8 Large Signal Transient Response; V O = V p-p, G =, = R IN = Ω mv mv TPC. AD8 Small Signal Transient Response; V O = mv p-p, G = + TPC 6. AD8 Small Signal Transient Response; V O = mv p-p, G =, = R IN = Ω

5 AD8/AD88 PULSE GENERATOR PULSE GENERATOR T R /T F = 5ps T R /T F = 5ps V IN R IN R T = 9.9 AD88 6 V IN R IN R S = R T = 66.5 AD88 6 TPC. AD88 Noninverting Configuration, G = + TPC. AD88 Inverting Configuration, G= V V TPC 8. AD88 Large Signal Transient Response; V O = V p-p, G = +, = R IN = Ω TPC. AD88 Large Signal Transient Response; V O = V p-p, G =, = R IN = Ω mv mv TPC 9. AD88 Small Signal Transient Response; V O = mv p-p, G = +, = R IN = Ω TPC. AD88 Small Signal Transient Response; V O = mv p-p, G =, = R IN = Ω 5

6 AD8/AD88 5 = FOR DIP = 66.5 FOR SOIC = mv p-p 5 = FOR DIP = 66.5 FOR SOIC = V p-p TPC. AD8 Small Signal Frequency Response, G = + 9 TPC 6. AD8 Large Signal Frequency Response, G = = FOR DIP = 66.5 FOR SOIC = mv p-p 5 6 = = = mv p-p TPC. AD8. db Flatness, G = + 9 TPC. AD8 Small Signal Frequency Response, G = GAIN (db) 6 5 k k GAIN k PHASE MARGIN TPC 5. AD8 Open-Loop Gain and Phase Margin vs. Frequency PHASE MARGIN (Degrees) k R L = k = V p-p k SECOND HARMONIC THIRD HARMONIC TPC 8. AD8 Harmonic Distortion vs. Frequency, G = + 6

7 AD8/AD88.5 HARMONIC DISTORTION (dbc) = V p-p SECOND HARMONIC THIRD HARMONIC ERROR (%) = = V STEP. k k TPC 9. AD8 Harmonic Distortion vs. Frequency, G = SETTLING TIME (ns) TPC. AD8 Short-Term Settling Time, G = HARMONIC DISTORTION (dbc) f = MHz R L = k = FOR SOIC THIRD HARMONIC SECOND HARMONIC ERROR (%) = = V STEP OUTPUT SWING (V p-p) TPC. AD8 Harmonic Distortion vs. Output Swing, G = SETTLING TIME ( s) TPC. AD8 Long-Term Settling Time, G = +. DIFF GAIN (%) DIFF PHASE (Degrees) st nd rd th 5th 6th th 8th 9th th th st nd rd th 5th 6th th 8th 9th th th TPC. AD8 Differential Gain and Phase Error, G = +, R L = 5 Ω, = Ω, R IN = Ω INPUT NOISE VOLTAGE (nv/ Hz) k k k TPC. AD8 Noise vs. Frequency

8 AD8/AD = R IN = = mv p-p 5 = R IN = = V p-p TPC 5. AD88 Small Signal Frequency Response, G = + TPC 8. AD88 Large Signal Frequency Response, G = = R IN = = mv p-p 5 = R IN = = mv p-p TPC 6. AD88. db Flatness, G = + 9 TPC 9. AD88 Small Signal Frequency Response, G = 9 GAIN (db) k PHASE k k TPC. AD88 Open-Loop Gain and Phase Margin vs. Frequency PHASE (Degrees) HARMONIC DISTORTION (dbc) k R L = k = V p-p k SECOND HARMONIC THIRD HARMONIC TPC. AD88 Harmonic Distortion vs. Frequency, G = + 8

9 AD8/AD88.5 HARMONIC DISTORTION (dbc) = V p-p SECOND HARMONIC THIRD HARMONIC ERROR (%) = = V STEP. k k TPC. AD88 Harmonic Distortion vs. Frequency, G = SETTLING TIME (ns) TPC. AD88 Short-Term Settling Time, G = + HARMONIC DISTORTION (dbc) f = MHz R L = k = SECOND HARMONIC THIRD HARMONIC OUTPUT SWING (V p-p) TPC. AD88 Harmonic Distortion vs. Output Swing, G = + ERROR (%) = = V STEP SETTLING TIME ( s) TPC 5. AD88 Long-Term Settling Time V Step, G = +. DIFF GAIN (%) DIFF PHASE (Degrees) st nd rd th 5th 6th th 8th 9th th th st nd rd th 5th 6th th 8th 9th th th TPC. AD88 Differential Gain and Phase Error, G = +, R L = 5 Ω, = Ω, R IN = Ω INPUT NOISE VOLTAGE (nv/ Hz) k k k TPC 6. AD88 Noise vs. Frequency 9

10 AD8/AD88 9 V CM = V 9 V CM = V 8 8 CMRR (db) 6 5 CMRR (db) 6 5 k k TPC. AD8 CMRR vs. Frequency TPC. AD88 CMRR vs. Frequency R OUT ( ) R OUT ( )... k k TPC 8. AD8 Output Resistance vs. Frequency, G = +. k k TPC. AD88 Output Resistance vs. Frequency, G = PSRR +PSRR 8 6 +PSRR PSRR PSRR (db) 5 PSRR (db) 5 k k k k k 5M TPC 9. AD8 PSRR vs. Frequency TPC. AD88 PSRR vs. Frequency, G = +

11 AD8/AD88 OUTPUT SWING (V) R L = k R L = 5 R L = JUNCTION TEMPERATURE ( C) TPC. AD8/AD88 Output Swing vs. Temperature CMRR ( db) AD8 AD JUNCTION TEMPERATURE ( C) TPC 6. AD8/AD88 CMRR vs. Temperature 6 8. OPEN-LOOP GAIN (V/V) 8 6 AD88 AD8 SUPPLY CURRENT (ma) V 6V 5V 5V AD88 AD8 AD88 AD JUNCTION TEMPERATURE ( C) TPC. AD8/AD88 Open-Loop Gain vs. Temperature JUNCTION TEMPERATURE ( C) TPC. AD8/AD88 Supply Current vs. Temperature PSRR ( db) PSRR PSRR +PSRR AD88 AD88 AD8 INPUT OFFSET VOLTAGE ( V) 6 5 AD88 AD8 8 AD8 PSRR JUNCTION TEMPERATURE ( C) TPC 5. AD8/AD88 PSRR vs. Temperature JUNCTION TEMPERATURE ( C) TPC 8. AD8/AD88 Input Offset Voltage vs. Temperature

12 AD8/AD88 THEORY OF OPERATION General The AD8 and AD88 are wide bandwidth, voltage feedback amplifiers. Since their open-loop frequency response follows the conventional 6 db/octave roll-off, their gain bandwidth product is basically constant. Increasing their closed-loop gain results in a corresponding decrease in small signal bandwidth. This can be observed by noting the bandwidth specification between the AD8 (gain of ) and AD88 (gain of ). Feedback Resistor Choice The value of the feedback resistor is critical for optimum performance on the AD8 and AD88. For maximum flatness at a gain of, and R G should be set to Ω for the AD88. When the AD8 is configured as a unity gain follower, should be set to Ω (no feedback resistor should be used) for the plastic DIP and 66.5 Ω for the SOIC. For general voltage gain applications, the amplifier bandwidth can be closely estimated as f db π + ω O R G This estimation loses accuracy for gains of +/ or lower due to the amplifier s damping factor. For these low gain cases, the bandwidth will actually extend beyond the calculated value (see Closed-Loop BW plots, TPCs and 5). As a general rule, capacitor C F will not be required if ( R G ) C I NG ω O where NG is the Noise Gain ( + /R G ) of the circuit. For most voltage gain applications, this should be the case. G = + R G V IN R TERM AD8/ AD88 6 VOUT I I C I C F AD8 R G V IN R TERM Figure. Noninverting Operation G = R G R G AD8/ AD88 6 Figure. Inverting Operation When the AD8 is used in the transimpedance (I to V) mode, such as in photodiode detection, the values of and diode capacitance (C I ) are usually known. Generally, the value of selected will be in the kω range, and a shunt capacitor (C F ) across will be required to maintain good amplifier stability. The value of C F required to maintain optimal flatness (< db peaking) and settling time can be estimated as [ ] / C F ( ω O C I )/ω O where O is equal to the unity gain bandwidth product of the amplifier in rad/sec, and C I is the equivalent total input capacitance at the inverting input. Typically, O = 8 6 rad/sec (see Open-Loop Frequency Response curve, TPC 5). As an example, choosing = kω and C I = 5 pf requires C F to be. pf (Note: C I includes both source and parasitic circuit capacitance). The bandwidth of the amplifier can be estimated using the C F calculated as f db.6 π C F Figure 5. Transimpedance Configuration Pulse Response Unlike a traditional voltage feedback amplifier, where the slew speed is dictated by its front end dc quiescent current and gain bandwidth product, the AD8 and AD88 provide on demand current that increases proportionally to the input step signal amplitude. This results in slew rates ( V/µs) comparable to wideband current feedback designs. This, combined with relatively low input noise current (. pa/ Hz), gives the AD8 and AD88 the best attributes of both voltage and current feedback amplifiers. Large Signal Performance The outstanding large signal operation of the AD8 and AD88 is due to a unique, proprietary design architecture. In order to maintain this level of performance, the maximum 8 V-MHz product must be observed MHz, V O.8 V p-p) on the AD8 and the 5 V-MHz product must be observed on the AD88. Power Supply Bypassing Adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. Inductance in the power supply leads can form resonant circuits that produce peaking in the amplifier s response. In addition, if large current transients must be delivered to the load, then bypass capacitors (typically greater than µf) will be required to provide the best settling time and lowest distortion. A parallel combination of at least. µf, and between. µf and. µf, is recommended. Some brands of electrolytic capacitors will require a small series damping resistor. Ω for optimum results. Driving Capacitive Loads The AD8/AD88 have excellent cap load drive capability for high speed op amps, as shown in Figures and 9. However, when driving cap loads greater than 5 pf, the best frequency response is obtained by the addition of a small series resistance.

13 AD8/AD88 It is worth noting that the frequency response of the circuit when driving large capacitive loads will be dominated by the passive roll-off of R SERIES and C L. AD8 R SERIES R L k Figure 6. Driving Capacitive Loads C L margin (65 ), low noise current (. pa/ Hz), and slew rate ( V/µs) give higher performance capabilities to these applications over previous voltage feedback designs. With a settling time of ns to.% and ns to.%, the devices are an excellent choice for DAC I/V conversion. The same characteristics along with low harmonic distortion make them a good choice for ADC buffering/amplification. With superb linearity at relatively high signal frequencies, the AD8 and AD88 are ideal drivers for ADCs up to bits. Operation as a Video Line Driver The AD8 and AD88 have been designed to offer outstanding performance as video line drivers. The important specifications of differential gain (.%) and differential phase (. ) meet the most exacting HDTV demands for driving video loads. 5mV V IN 5 CABLE 5 AD8/ AD CABLE 5 5 Figure. AD8 Large Signal Transient Response; V O = V p-p, G = +, = Ω, R SERIES = Ω, C L = pf R IN AD88 R SERIES R L k Figure 8. Driving Capacitive Loads C L Figure. Video Line Driver Active Filters The wide bandwidth and low distortion of the AD8 and AD88 are ideal for the realization of higher bandwidth active filters. These characteristics, while being more common in many current feedback op amps, are offered in the AD8 and AD88 in a voltage feedback configuration. Many active filter configurations are not realizable with current feedback amplifiers. A multiple feedback active filter requires a voltage feedback amplifier and is more demanding of op amp performance than other active filter configurations such as the Sallen-Key. In general, the amplifier should have a bandwidth that is at least times the bandwidth of the filter if problems due to phase shift of the amplifier are to be avoided. Figure is an example of a MHz low-pass multiple feedback active filter using an AD88. 5mV Figure 9. AD88 Large Signal Transient Response; V O = V p-p, G = +, = R IN = Ω, R SERIES = Ω, C L = pf V IN R 5 R 5 R 8. C pf C 5pF 5V +5V AD APPLICATIONS The AD8 and AD88 are voltage feedback amplifiers well suited for such applications as photodetectors, active filters, and log amplifiers. The devices wide bandwidth (6 MHz), phase Figure. Active Filter Circuit

14 AD8/AD88 Choose F O = Cutoff Frequency = MHz = Damping Ratio = /Q = H = Absolute Value of Circuit Gain = R R = Then, k = π F O C C(H +) C = R = R = α HK α α K (H +) R = H(R) A/D Converter Driver As A/D converters move toward higher speeds with higher resolutions, there becomes a need for high performance drivers that will not degrade the analog signal to the converter. It is desirable from a system s standpoint that the A/D be the element in the signal chain that ultimately limits overall distortion. This places new demands on the amplifiers used to drive fast, high resolution A/Ds. With high bandwidth, low distortion, and fast settling time, the AD8 and AD88 make high performance A/D drivers for advanced converters. Figure is an example of an AD8 used as an input driver for an AD8A, a -bit, MSPS A/D converter. Layout Considerations The specified high speed performance of the AD8 and AD88 requires careful attention to board layout and component selection. Proper RF design techniques and low-pass parasitic component selection are mandatory. The PCB should have a ground plane covering all unused portions of the component side of the board to provide a low impedance path. The ground plane should be removed from the area near the input pins to reduce stray capacitance. Chip capacitors should be used for the supply bypassing (see Figure ). One end should be connected to the ground plane and the other within /8 inch of each power pin. An additional large (. µf to µf) tantalum electrolytic capacitor should be connected in parallel, though not necessarily so close, to the supply current for fast, large signal changes at the output. The feedback resistor should be located close to the inverting input pin in order to keep the stray capacitance at this node to a minimum. Capacitance variations of less than pf at the inverting input will significantly affect high speed performance. Stripline design techniques should be used for long signal traces (greater than about inch). These should be designed with a characteristic impedance of 5 Ω or 5 Ω and be properly terminated at each end. +5V DIGITAL +5V ANALOG +5V ANALOG 5 AV DD AGND AD8A DV DD DGND DRV DD DRGND CLK OTR 6 +5V DIGITAL CLOCK INPUT 9.9 ANALOG IN AD8 5V ANALOG 6 F 8 6 V INA V INB REF GND REF IN REF OUT AV SS MSB BIT BIT BIT BIT5 BIT6 BIT BIT8 BIT9 BIT BIT BIT AGND AV SS DIGITAL OUTPUT 5 5V ANALOG Figure. AD8 Used as Driver for an AD8A, a -Bit, MSPS A/D Converter

15 AD8/AD88 OUTLINE DIMENSIONS 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters).5 (9.5).65 (9.).55 (9.).8 (.5) MAX (.9).85 (.).5 (6.98). (.5) BSC.5 (.8) MIN.5 (.8). (.) SEATING PLANE. (.9).6 (.5). (.56).5 (.).8 (.6).5 (.). (.6).5 (8.6). (.8). (.6).5 (.8).5 (.). (.5).5 (.8). (.5).8 (.) COMPLIANT TO JEDEC STANDARDS MO-95AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 8-Lead Standard Small Outline Package [SOIC] (R-8) Dimensions shown in millimeters and (inches) 5. (.968).8 (.89). (.5).8 (.9) (.) 5.8 (.8).5 (.98). (.) COPLANARITY.. (.5) BSC SEATING PLANE.5 (.688).5 (.5).5 (.). (.).5 (.98). (.6) 8.5 (.96) 5.5 (.99). (.5). (.5) COMPLIANT TO JEDEC STANDARDS MS-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 5

16 AD8/AD88 Revision History Location Page / Data Sheet changed from REV. to. Renumbered Figures Universal Deleted Evaluation Board Information Universal Updated ORDERING GUIDE Updated OUTLINE DIMENSIONS C6 /(A) 6

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