ECE145a / 218a: Notes Set 5 device models & device characteristics:

Transcription

1 ECE145a / 218a: Notes Set 5 device models & device characteristics: Mark odwell University of California, Santa Barbara rodwell@ece.ucsb.edu , fax

2 Content: Bipolar Transistor M odels MOSFET Models HEM T(JFET) models Cutoff frequencies.

3 Active Devices: Bipolar Transistors

4 HBT Physical Structure

5 Increasin total emitter area J E I E /( totalemitter area) Increasin the emitter area (increasin LE, or multiple finers) increases the maximum current. Emitter area enerally selected to reach peak bandwidth at some specified current.

6 I c, I b (A) Bipolar Transistor: DC characteristics: common-emitter I c ma/m V ce,sat V be (V) I b c I b V ce I Approximately : qvbe/ nkt I I e and I I c s / These relationships are approximate, and fail at hiher current densities b c V br,ceo

7 HBT hybrid-pi equivalent-circuit model be / m f f b base c collector B bb C cbx C cbi c C mo I V C BE IC ( nkt / q) be V be m V be e -j c m mo e j c 0 1 (typically~ 0.8) C be,diff = m f C je ex E C C, C, : carrier transit times in base and collector b be, diff b je c, e cbi : diffusion capacitance,, C c cbx : depletion capacitances : parasitic resitances The term j c e, thouh often nelected, can be sinifican t in some circuits.

8 Bipolar Transistor T-model ) ( exp 1 1 ) ( c b c b c b j j j j j The approximations above, if taken to first order in, produce the hybrid pi model. The T model is more convenient for common-base amplifier analysis.

9 How model varies as emitter area is increased C cbx B bb C cbi c C be V be m V be e -j c C be,diff = m f C je ex E Increasin the emitter area by N :1 same as wirin N HBTsin parallel. All capacitances increase N :1, all resistances decrease 1: N. C be, be and m are iven by theformulas on the previous paes.

10 Active Devices: Silicon MOSFETs

11 Planar Bulk MOSFET Cross-Section Layout (multi-finer) ate oxide ate metal (silicide) N+ poly ate dielectric sidewall W G S D S D S D S source contact (silicide) drain contact (silicide) G N+ source N+ drain P substrate ate dielectric inversion layer P substrate N+ polysilicon ate

12 MOSFET DC Characteristics I D I d mobility-limited increasin V GS velocity-limited For drain V DS voltaes V th larer than theknee voltae : V s mobility limited current 2 I V ) / 2L D, coxw ( Vs velocity limited current I c W v ( V th V D, v ox sat s th ) Generalized Expression I I D D, v 2 I I D D, 1

13 Ohmic Knee Voltae: Mobility-Limited Case The knee voltae defines the boundary between the Ohmic and constant - current reions I D constant-current increasin V GS In the mobility - limited reime, the knee in curve occurs when V d V ds V s V th V GD =V th V DS The Knee Voltae is further increased by voltae drops across the parasitic source & drain resistances. V GD =V th I D D I D S

14 Knee Voltae: Velocity-Limited Case In the velocity - limited reime, occurs when V v ds sat L / the knee in curve V DS =v sat L / Aain, the Knee Voltae is further increased by voltae drops across the parasitic source & drain resistances. I D D V DS =v sat L / I D S

15 DC Characteristics---Far Above Threshold I d V V th V s I D c ox W v sat ( V s V th V ) for ( V s V th ) / V 1 where V v sat L /

16 MOSFET Transconductance mobility limited I D, c m ox W I V D GS ( V s c V ox th W ) 2 ( V / 2L s V th ) / L I d V V th V s mobility-limited velocity limited I D, v m c ox W v I V D GS sat ( V c s ox V W v th ) sat m V velocity-limited V th V s

17 Linear vs. Square-Law Characteristics: 90 nm

18 90 nm MOSFET DC Characteristics N - channel V m th / W c ox v sat 0.6 V 1/ ~ 3V 1.4 ms/μm 1.4 S / mm P - channel m V th / W c ox v sat 0.7 ms/μm 0.6 V 1/ ~ 3V 0.7 S / mm

19 Device Structure and Model: multi-finer device G S D S D S D S G C d m V s G ds d D i W C s V s C db G C sb s S C k m o C G d s ds i v T eq k o eq NW ~ 1/ W m eff NW or NW V V ( )fF/ m L T NW k T o eq W C C d s sb db s 1/ NW NW NW th ~ s W 12L N 1/ NW 2N end G i C s Increase f max usin - short ate finers - ample substratecontacts C d V s s S m V s C sb G ds D C db

20 Oversimplified Model For rouh hand analysis, etc C G mx sx dsx in ~ 1 ~ s m m C ~ 1 s G ~ 1 m ds m s s s i G i C s C d V s s S m V s C sb G ds D C db G in C d mx V s G dsx D Approximate cutoff frequencie s 1/ 2f f max ~ 2 ~ C s ( / s m C d f ) G i / m ds ( s 2 C d d ) C d C sx V s C sb C db S

21 Active Devices: III-V Field-Effect Transistors

22 FET with Heterojunction for Gate Barrier HEMT drawin : B. Brar. Gate Source Drain N+ InGaAs contact layer InAlAs ate barrier layer undoped InGaAs channel drawin: K. Shinohara, HL HEMT: FET with semiconductor heterojunction for barrier between channel and ate.

23 HEMTs: Typical interdiitated structure ate source Note multiple ate finers. drain

24 HEMT: approximate equivalent circuit model Idss. Cs, Cd, m, Gds all scale proportionally with ate periphery i, s scale proportionally with (1/ ate periphery) scales proportionally to (ate finer lenth)/(number finers)

25 HEMT DC-IV characteristics Data: K.Shinohara, TeledyneScientific Schottky diode between ate and channel; ate will draw current for V s more positive than c.a. 0.6 V

26 Fiures of Merit

27 Transistor fiures of Merit Transistor small-sinal bandwidth is typically stated in terms of the fiures of merit f and f max In order to understand these fiures of merit, we must introduce device power ain. These power ains will be studied in more detail later in the course.

28 Definition of short-circuit current ain G D S G i C s V 's m V 's ds D example: FET small-sinal model S I in i C s V 's m V 's ds Iout short-circuit current ain: drive input with AC current, short output, measure I out /I in V s I in / jc s I I out in m I V in s m jc s f jf

29 Variation of H21 with frequency: Bipolar Transistors Gains (db) h 21 U V CE = 1 V, J C = 1.5 ma/um 2 f = 295 GHz H21 is plotted in db. because H21 is a current ain: db( H 21 ) 20*lo10( H21) 10 0 f MAX = 295 GHz Frequency (GHz) B C m bb mo diff mo 48 C diff C cbx 172 ff exp( j f 6.9 ff C je 34 ff c ) V b ' e r 7000 cb C cbi ff ex E V m b ' e 4. 7 C r ce 500 Because of effect of H 21 ( f ) 1 1/ f / jf / m : m

30 Current-ain cutoff frequency: Bipolar Transistors W eb W e W b,cont C cbx emitter contact EB rade base BC rade collector base contact emitter N- drift collector base contact collector contact B bb C cbi c C T c T b N+ sub collector semi-insulatin InP substrate W under be V be m V be e -j c W c C be,diff = m f C je ex E 1 2f base collector C je kt qi E C bc kt qi E ex coll base T 2D 2 b n collector T 2v c sat

31 Current-ain cutoff frequency: Field-Effect Transistors ate metal (silicide) dielectric sidewall G C d m V s G ds ate oxide N+ poly ate i C s V s D C db source contact (silicide) drain contact (silicide) N+ source N+ drain P substrate s S C sb f m 2 ( Cs Cd)

32 Maximum Power Transfer Theorem enerator load Xen Ven en Xload load Maximum power is transferred from enerator toload if X P load av X V en 2 en,( MS ) 4 en and load en this is called ***conjuate impedance matchin *** The power delivered, called the available enerator power is

33 Impedance Matchin Maximum power transfer can be obtained by addin a ***lossless*** (no resistances) impedance matchin network between the enerator and the load: enerator match load Xen Ven en Xload load * Z en Z en * Z load Z load

34 Maximum Available Power Gain (if it exists) enerator load en V en lossless matchin network i C s V 's m V 's ds lossless matchin network L The transistor or amplifier is connected to enerator and load via lossless matchin networks. If it is possible to match at both input and output, then the power ain is called the *maximum available ain* (MAG) Detailed microwave circuit theory (see later notes) indicates that this procedure often produces an oscillator (if the device is potentially unstable ). In that case we must define Maximum stable ain

35 Maximum Stable Power Gain (if MAG does not exist) enerator load en V en lossless matchin network resistive loss (stabilization) i C s V 's ds lossless matchin network L m V 's If the device is potentially unstable (usually due to stron feedback throuh Cd as indicated), addition of a minimum amount of series/shunt resistance to the device input/output will prevent oscillation, and the device can then be matched. The resultin power ain is called the Maximum stable power ain.

36 Unilateral power ain shunt feedback enerator en V en lossless matchin network i C s V 's m V 's ds lossless matchin network load L series feedback If the device is potentially unstable (due to stron feedback ), addition of lossless reactive feedback as indicated can cancel the feedback and prevent oscillation. The device can then be matched. The resultin power ain is called Mason s invariant power ain **or** the Unilateral power ain, U.

37 Power-Gain Cutoff Frequency (Fmax) This is the frequency at which the device Unilateral power ain reaches unity. The maximum available ain (either in the forward or reverse direction) also reaches unity at the same frequency G C d m V s G ds For Field - Effect Transistors : f max 2 ( i s f ) G ds 2f C d i C s V s s S C sb D C db For Bipolar Transistors ( f max 2 bb / ce f 2f ce bb C bein lare) : cbi f 8 bb C cbi B bb be C be,diff = m f C cbx C je C cbi V be ex E c C m V be e -j c

38 Gains, db Power ains of a typical transistor U: all MAG/MSG common collector MAG/MSG common emitter Frequency, GHz MAG/MSG common base f max The inflection in the curves is the break between unstable (MSG) at lower frequencies and stable (MAG) at hiher frequencies. MAG/MSG is directly relevant for F/microwave/mm-wave IC desin. Because U has -20 db/decade slope, it is used to extrapolate measurements to determine f max

39 End

40 Appendix (optional)

41 Bipolar Transistor Operation

42 Bipolar Transistor ~ MOSFET Below Threshold V ce Because emitter enery I c exp( qv be / kt) distribution is thermal (exponential) Almost all electrons reachin base pass throuh it I c varies little with collector voltae

43 Bipolar Transistor ~ MOSFET Below Threshold Vbe Vce I c Because emitter enery I c exp( qv be / kt) distribution is thermal (exponential) Almost all electrons reachin base pass throuh it I c varies little with collector voltae

44 HBT Equivalent Circuit Model

45 Physical structure, symbolic Device Stripe Lenth LE perpendicular to drawin W eb W e W b,cont emitter contact EB rade base BC rade base contact emitter base contact collector N- drift collector collector contact T b N+ sub collector W under T c semi-insulatin InP substrate W c

46 Bipolar Transistor DC-IV Characteristics

47 Bipolar Transistor: Carrier Transit Times

48 Base resistance & collector-base capacitance Device Stripe Lenth LE perpendicular to drawin bb bb contact term 2 L W E contact b, cont spreadin under contact spreadin under emitter 1 6 W b, contact L E base_ sheet 1 12 W L E E base_ sheet C cb bb and C semiconductor cb T c W L c e are distributed splittinof C into C and C Details beyond scope of class (see odwell IEEE EDL Nov. 2001, Proc. IEEE cb cbx cbi Feb. 2008

49 HBT C Parasitics base contact width < 2 transfer lenths simple analysis Limitin case of Pulfrey / Vaidyanathan f max model.

50 HBT C Parasitics / ex contact, emitter A emitter emitter lenth L E W / 12L spread W / 4L ap s s e ap E E W / 6L spread, contact s bc E contact contact, basew bc / A base_ contacts C A / T cb, e cb, ap emitter C A / T ap C A / T cb, contact c c base_ contacts c

51 Base-Collector Time Constant & Fmax. f cb max C C cb, e f where 8 bb C cbi bb cb, ap ( C ( cbi contact contact C cb, contact contact spread, contact spread, contact ap ap / 2) spread )

52 elationship to HBT Equivalent Circuit Model C cbx Ccbi Ccb, e Ccb, ap Ccb, contact bb spread ap contact, spread contact bb C cbi C cb, contact contact C cb, ap ( contact spread, contact ap / 2) C cb, e ( contact spread, contact ap spread )

53 Field-Effect Transistor Operation (Approximate)

54 Field-Effect Transistor Operation source ate drain Positive Gate Voltae reduced enery barrier increased drain current

55 Field-Effect Transistor Operation source ate drain Positive Gate Voltae reduced enery barrier increased drain current

56 FETs: Basic Operation C s ~ A/ D Cd ch I d Q / where L / velectron Q C s V s C d ch V ds I d m V s G ds V ds where m C s / and G d C d ch /

57 FET Characteristics I D increasin V GS C s ~ A/ D Cd ch V DS I d m V s G ds V ds C / G C / L / v m s d d ch electron

58 FET Parasitic Capacitances (Estimate) s / W ~ v / T m C d / W C / W ~ L / T ~ ox ox C s / W, f ~ C / W ~ L / T sb c sub