Indium Phosphide and Related Materials Selectively implanted subcollector DHBTs
|
|
|
- Deirdre Mosley
- 6 years ago
- Views:
Transcription
1 Indium Phosphide and Related Materials Selectively implanted subcollector DHBTs Navin Parthasarathy, Z. Griffith, C. Kadow, U. Singisetti, and M.J.W. Rodwell Dept. of Electrical and Computer Engineering, University of California, Santa Barbara, CA M. Urteaga, K. Shinohara, B. Brar Rockwell Scientific Company, Thousand Oaks, CA This work was supported under the DARPA-TFAST program
2 Outline Motivation InP HBTs: solutions towards the future 1. Implanted Subcollector HBTs 2. Pedestal-Subcollector HBTs Conclusions
3 Why are fast transistors required? Fiber Optic Communication Systems 40 Gb/s commercially available 80 and 160 Gb/s(?) long haul links High speed Instrumention mixed-signal ICs with large dynamic range mm-wave Wireless Transmission high frequency communication links, atmospheric sensing, military and commercial radar
4 Some common figures of merit f is the unity current gain frequency t 1 = τ + τ + RCs... 2πf t base collector f max is the power gain cut-off frequency f max f τ 8πR bb C cbi Digital delay not well correlated with τ F (V LOGIC /I c ) (C cb ) is a major delay C I cb C A A COLLECTOR EMITTER T c Collector Base capacitance must be reduced
5 InP vs Si/SiGe HBTs InP system has inherent material advantages over Si/SiGe but 20x lower base sheet resistance, 5x higher electron velocity, 4x higher breakdown-at same f t. today s SiGe HBTs are fast catching up due to 5x smaller scaling and offer much higher levels of integration due to the Si platform Scaling Laws for HBTs Reduce vertical dimensions to decrease transit times Reduce lateral dimensions to decrease RC time constants Increase current density to decrease charging time
6 InP HBTs today and tomorrow? Key Challenges for InP HBTs E B C Scaling of collector-base junction Planar, manufacturable process for high levels of integration Narrow base-emitter junction formation and also low R ex Parasitic base collector capacitance under base contacts Base ohmic transfer length limits collector scaling Non-planar device A Radical approach is necessary
7 The end goal: SiGe-like highly scaled InP HBT Objectives: Extreme parasitic reduction: speed Planar Geometry: yield Extrinsic base thick extrinsic base: low R bb, speed Collector contact N ++ pedestal Extrinsic base Intrinsic base Base contact Regrown submicron emitter submicron emitter scaling: speed large emitter contact: low R ex, speed N- collector Emitter contact Emitter Pedestal collector submicron collector scaling: speed One sided collector : integration Isolated subcollector MODULE 2 Isolated subcollector large base pad: yield zero base pad capacitance: speed MODULE 1
8 The end goal: SiGe-like highly scaled InP HBT Collector contact Extrinsic base Intrinsic base Base contact Emitter contact Emitter N ++ pedestal N- collector Isolated subcollector Isolated subcollector zero base pad capacitance: speed MODULE 1
9 Module 1: Access Pad Capacitance in InP HBTs 0.6μm DHBT fabricated at UCSB Subcollector boundary Parasitic Base access pad C cb, pad ~30% of overall C cb Increasingly significant for short emitter lengths IMPORTANT FOR FAST, LOW POWER LOGIC
10 Implanted subcollector InP DHBTs Approach Selectively implanted N ++ subcollector Growth of drift collector, base & emitter Device formation Emitter contact Collector contact N - collector Implanted N ++ InP subcollector SI substrate Side View Interface charge compensation N ++ charge present on exposed InP surface Fe implant suppresses interface charge
11 Implanted subcollector DHBT with Fe : The Process Anneal Device formation Anneal and MBE growth
12 J e (ma/μm 2 ) Implanted subcollector DHBTs with Fe DC results DC characteristics - Gain, Ideality factors, Leakage currents are similar to fully epitaxial device Common Emitter curves A = 0.65 x 4.3 μm 2 I = 100 μa b step je V CB = 0.3 V Gummel characteristics V = 0 V η = 1.1 cb c 60 pa I c η b = I 10-6 b I b, I c (A) V ce (V) V (V) be Peak β 35, BV CBO = 5.31V (I c =50 μa) Base (from TLM) : R sheet = 1050 Ω/sq, R cont = 50 Ω μm 2 Collector (from TLM) : R sheet ~ 25.0 Ω/sq, R cont ~ 110 Ω μm
13 Implanted subcollector DHBTs with Fe RF results f τ = 363 GHz, f max = 410 GHz standard triple mesa DHBT Gains (db) h 21 A jbe = 0.65 x 4.3 μm 2 U I c = 19.1 ma, V ce = 1.97 V J e = 6.8 ma/μm 2 f t = 363 GHz, f max = 410 GHz C cb (ff) Frequency (Hz) implanted sub-collector DHBT without Fe implant implanted sub-collector DHBT with Fe implant V cb (V) C cb reduced by ~ 25 %
14 Module 2: Submicron collector scaling Collector contact N ++ pedestal Pedestal collector submicron collector scaling: speed Extrinsic base Intrinsic base Base contact Isolated subcollector N- collector Emitter contact Emitter MODULE 2 Isolated subcollector large base pad: yield zero base pad capacitance: speed MODULE 1
15 Approach An elegant approach to collector scaling The triple implanted subcollector-pedestal HBT 1. deep N ++ InP subcollector by selective Si implant N + pedestal N -- collector Fe implanted current block Collector contact isolate base pad (Module 1) 2. SI layer ~0.2μm, by Fe implant decrease extrinsic C cb N + InP sub-collector SI InP substrate 3. Second Si implant creates N ++ pedestal for current flow 4. Growth of drift collector, base & emitter and device formation N. Parthasarathy et al., Electron Device Letters, Vol. 27(5), May 06 Subcollector boundary Pedestal implant
16 An elegant approach to collector scaling The triple implanted subcollector-pedestal HBT Advantages over standard mesa device 1. Collector Base junction can be independently scaled 2. Pad capacitance eliminated 3. Increased Breakdown voltages N + pedestal N - collector N + InP sub-collector Fe implanted current block SI InP substrate More benefits. 4. Highly planar, fully implanted process, no regrowth required manufacturability 5. Implants before growth endless variations in subcollector-pedestal layers without compromising device planarity 6. Fe compensates interface charge reliability and repeatability
17 f τ = 352 GHz, f max = 403 GHz Gains (db) RF performance: fully implanted subcollector-pedestal HBT h 21 U C cb (ff) standard mesa DHBT implanted sub-collector + pedestal V (V) 10 cb f = 352 GHz, f = 403 GHz t max Frequency (Hz) C cb reduced by ~ 50% N. Parthasarathy et al., Electron Device Letters, May 06
18 Conclusion Implanted collector InP HBTs at 500 nm scaling generation ~ 400 GHz f t & f max Implanted subcollector DHBTs eliminate pad capacitance Implanted pedestal-subcollector DHBTs independent collector scaling InP HBT future: 125 nm scaling generation with implanted pedestalsubcollectors ~1 THz f t & f max, 400 GHz digital latches & 600 GHz amplifiers? Applications 160+ Gb/s fiber ICs, 300 GHz MMICs for communications, radar, & imaging & applications unforeseen & unanticipated The principal applications of any sufficiently new and innovative technology always have been and will continue to be applications created by that technology. -Kroemer s Lemma of New Technology
Frequency Limits of Bipolar Integrated Circuits
IEEE MTT-S Symposium, June 13, 2006 Frequency Limits of Bipolar Integrated Circuits Mark Rodwell University of California, Santa Barbara Collaborators Z. Griffith, E. Lind, V. Paidi, N. Parthasarathy,
High-Frequency Transistors High-Frequency ICs. Technologies & Applications
High-Frequency Transistors High-Frequency ICs Technologies & Applications Mark Rodwell University of California, Santa Barbara rodwell@ece.ucsb.edu 805-893-3244, 805-893-2362 fax Report Documentation Page
100+ GHz Transistor Electronics: Present and Projected Capabilities
21 IEEE International Topical Meeting on Microwave Photonics, October 5-6, 21, Montreal 1+ GHz Transistor Electronics: Present and Projected Capabilities Mark Rodwell University of California, Santa Barbara
Developing Bipolar Transistors for Sub-mm-Wave Amplifiers and Next-Generation (300 GHz) Digital Circuits
Plenary, Device Research Conerence, State College, PA, June 26, 26 Developing Bipolar Transistors or Sub-mm-Wave Ampliiers and Next-Generation (3 GHz) Digital Circuits Mark Rodwell University o Caliornia,
30% PAE W-band InP Power Amplifiers using Sub-quarter-wavelength Baluns for Series-connected Power-combining
2013 IEEE Compound Semiconductor IC Symposium, October 13-15, Monterey, C 30% PAE W-band InP Power Amplifiers using Sub-quarter-wavelength Baluns for Series-connected Power-combining 1 H.C. Park, 1 S.
TU3B-1. An 81 GHz, 470 mw, 1.1 mm 2 InP HBT Power Amplifier with 4:1 Series Power Combining using Sub-quarter-wavelength Baluns
TU3B-1 Student Paper Finalist An 81 GHz, 470 mw, 1.1 mm 2 InP HBT Power Amplifier with 4:1 Series Power Combining using Sub-quarter-wavelength Baluns H. Park 1, S. Daneshgar 1, J. C. Rode 1, Z. Griffith
InP HBT technology development at IEMN
InP HBT technology development at IEMN Advanced NanOmetric Devices Group, Institut d Electronique de Microelectronique et de Nanotechnology, Lille, FRANCE Date Outline Which applications for THz GaAsSb/InP
Frequency Limits of InP-based Integrated Circuits
Plenary, Indium Phosphide and Related Materials Conference, May 15-18, Matsue, Japan Frequency Limits of InP-based Integrated Circuits Mark Rodwell, E. Lind, Z. Griffith, S. R. Bank, A. M. Crook U. Singisetti,
A 3-Stage Shunt-Feedback Op-Amp having 19.2dB Gain, 54.1dBm OIP3 (2GHz), and 252 OIP3/P DC Ratio
International Microwave Symposium 2011 Chart 1 A 3-Stage Shunt-Feedback Op-Amp having 19.2dB Gain, 54.1dBm OIP3 (2GHz), and 252 OIP3/P DC Ratio Zach Griffith, M. Urteaga, R. Pierson, P. Rowell, M. Rodwell,
UNIVERSITY OF CALIFORNIA. Santa Barbara. Submicron InP-based Heterojunction Bipolar Transistors
UNIVERSITY OF CALIFORNIA Santa Barbara Submicron InP-based Heterojunction Bipolar Transistors A Dissertation submitted in partial satisfaction of the requirements for the degree Doctor of Philosophy in
Single-stage G-band HBT Amplifier with 6.3 db Gain at 175 GHz
Single-stage G-band HBT Amplifier with 6.3 db Gain at 175 GHz M. Urteaga, D. Scott, T. Mathew, S. Krishnan, Y. Wei, M.J.W. Rodwell Department of Electrical and Computer Engineering, University of California,
G-band ( GHz) and W-band ( GHz) InP DHBT Power Amplifiers
G-band (1--GHz) and W-band (7--GHz) InP DHBT Amplifiers Vamsi K. Paidi, Zach Griffith, Yun Wei, Mattias Dahlstrom, Miguel Urteaga, Navin Parthasarathy, Munkyo eo, Lorene amoska, Andy Fung, Mark J. W. Rodwell,
High Power Performance InP/InGaAs Single HBTs
High Power Performance InP/InGaAs Single HBTs D Sawdai, K Hong, A Samelis, and D Pavlidis Solid-State Electronics Laboratory, Department of Electrical Engineering and Computer Science, The University of
sub-mm-wave ICs, University of California, Santa Barbara
20th Annual Workshop on Interconnections within High Speed Digital Systems, Santa Fe, New Mexico, 3 6 May 2009 THz Transistors, sub-mm-wave ICs, mm-wave Systems Mark Rodwell University of California, Santa
techniques, and gold metalization in the fabrication of this device.
Up to 6 GHz Medium Power Silicon Bipolar Transistor Chip Technical Data AT-42 Features High Output Power: 21. dbm Typical P 1 db at 2. GHz 2.5 dbm Typical P 1 db at 4. GHz High Gain at 1 db Compression:
DC Analysis of InP/GaAsSb DHBT Device Er. Ankit Sharma 1, Dr. Sukhwinder Singh 2
IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) e-issn: 2278-2834,p- ISSN: 2278-8735.Volume 10, Issue 5, Ver. I (Sep - Oct.2015), PP 48-52 www.iosrjournals.org DC Analysis of InP/GaAsSb
Up to 6 GHz Low Noise Silicon Bipolar Transistor Chip. Technical Data AT-41400
Up to 6 GHz Low Noise Silicon Bipolar Transistor Chip Technical Data AT-1 Features Low Noise Figure: 1.6 db Typical at 3. db Typical at. GHz High Associated Gain: 1.5 db Typical at 1.5 db Typical at. GHz
Galileo, Elephants, & Fast Nano-Devices
Presentation to NNIN REU interns, July 29, 2008 Galileo, Elephants, & Fast Nano-Devices Mark Rodwell University of California, Santa Barbara rodwell@ece.ucsb.edu 805-893-3244, 805-893-5705 fax Scaling:
THz Indium Phosphide Bipolar Transistor Technology
IEEE Compound Semiconductor IC Symposium, October 4-7, La Jolla, California THz Indium Phosphide Bipolar Transistor Technology Mark Rodwell University of California, Santa Barbara Coauthors: J. Rode, H.W.
Capacitive-Division Traveling-Wave Amplifier with 340 GHz Gain-Bandwidth Product
Hughes Presented at the 1995 IEEE MTT-S Symposium UCSB Capacitive-Division Traveling-Wave Amplifier with 340 GHz Gain-Bandwidth Product J. Pusl 1,2, B. Agarwal1, R. Pullela1, L. D. Nguyen 3, M. V. Le 3,
Record I on (0.50 ma/μm at V DD = 0.5 V and I off = 100 na/μm) 25 nm-gate-length ZrO 2 /InAs/InAlAs MOSFETs
Record I on (0.50 ma/μm at V DD = 0.5 V and I off = 100 na/μm) 25 nm-gate-length ZrO 2 /InAs/InAlAs MOSFETs Sanghoon Lee 1*, V. Chobpattana 2,C.-Y. Huang 1, B. J. Thibeault 1, W. Mitchell 1, S. Stemmer
DEFENSE TECHNICAL INFORMATION CENTER
DEFENSE TECHNICAL INFORMATION CENTER [nformiiioitforthe Deffrtse Couutauuty Month Day Year DTI'C has determined on LL j that this Technical Document has the Distribution Statement checked below. The current
R a) Draw and explain VI characteristics of Si & Ge diode. (8M) b) Explain the operation of SCR & its characteristics (8M)
SET - 1 1. a) Define i) transient capacitance ii) Diffusion capacitance (4M) b) Explain Fermi level in intrinsic and extrinsic semiconductor (4M) c) Derive the expression for ripple factor of Half wave
G-Band ( GHz) InP-Based HBT Amplifiers
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 9, SEPTEMBER 2003 1451 G-Band (140 220-GHz) InP-Based HBT Amplifiers Miguel Urteaga, Dennis Scott, Sundararajan Krishnan, Yun Wei, Mattias Dahlström,
Optical Phase-Locking and Wavelength Synthesis
2014 IEEE Compound Semiconductor Integrated Circuits Symposium, October 21-23, La Jolla, CA. Optical Phase-Locking and Wavelength Synthesis M.J.W. Rodwell, H.C. Park, M. Piels, M. Lu, A. Sivananthan, E.
Equivalent circuit modeling of InP/InGaAs Heterojunction Phototransistor for application of Radio-on-fiber systems
Equivalent circuit modeling of InP/InGaAs Heterojunction Phototransistor for application of Radio-on-fiber systems Jae-Young Kim The Graduate School Yonsei University Department of Electrical and Electronic
Device Research Conference 2007
Devie Researh Conerene 2007 560 GHz t, max InGaAs/InP DHBT in a novel dry-ethed emitter proess Erik Lind, Adam M. Crook, Zah Griith, and Mark J.W. Rodwell Department o Eletrial and Computer Engineering
Modeling of the SiGe power HBT IM Distortion
Modeling of the SiGe power HBT IM Distortion P.Sakalas %,$, M.Schröter %, L.Kornau &, W.Kraus & % Dresden University of Technology, Mommsenstrasse 13, 01062 Dresden, Germany & Atmel Germany GmbH, Theresienstrasse
An Inductor-Based 52-GHz 0.18 µm SiGe HBT Cascode LNA with 22 db Gain
An Inductor-Based 52-GHz 0.18 µm SiGe HBT Cascode LNA with 22 db Gain Michael Gordon, Sorin P. Voinigescu University of Toronto Toronto, Ontario, Canada ESSCIRC 2004, Leuven, Belgium Outline Motivation
Lecture 020 ECE4430 Review II (1/5/04) Page 020-1
Lecture 020 ECE4430 Review II (1/5/04) Page 020-1 LECTURE 020 ECE 4430 REVIEW II (READING: GHLM - Chap. 2) Objective The objective of this presentation is: 1.) Identify the prerequisite material as taught
Lecture 020 ECE4430 Review II (1/5/04) Page 020-1
Lecture 020 ECE4430 Review II (1/5/04) Page 020-1 LECTURE 020 ECE 4430 REVIEW II (READING: GHLM - Chap. 2) Objective The objective of this presentation is: 1.) Identify the prerequisite material as taught
Planarization and Regrowth of Self-Aligned Ohmic Contacts on InGaAs
MBE 2008, Vancouver, B.C. Planarization and Regrowth of Self-Aligned Ohmic Contacts on InGaAs Mark Wistey, Greg Burek, Uttam Singisetti, Austin Nelson, Brian Thibeault, Joël Cagnon, Susanne Stemmer, Arthur
Features TEMP. RANGE ( C)
DATASHEET HFA0, HFA09, HFA27, HFA28 Ultra High Frequency Transistor Arrays The HFA0, HFA09, HFA27 and the HFA28 are Ultra High Frequency Transistor Arrays that are fabricated from Intersil Corporation
ESE319 Introduction to Microelectronics High Frequency BJT Model & Cascode BJT Amplifier
High Frequency BJT Model & Cascode BJT Amplifier 1 Gain of 10 Amplifier Non-ideal Transistor C in R 1 V CC R 2 v s Gain starts dropping at > 1MHz. Why! Because of internal transistor capacitances that
Sub-mm-Wave Technologies: Systems, ICs, THz Transistors
2013 Asia-Pacific Microwave Conference, November 8th, Seoul Sub-mm-Wave Technologies: Systems, ICs, THz Transistors Mark Rodwell University of California, Santa Barbara Coauthors: J. Rode, H.W. Chiang,
Silicon Bipolar High f T Low Noise Medium Power 12 Volt Transistors
Silicon Bipolar High f T Low Noise Medium Power 1 Volt Transistors Features Low Phase Noise Oscillator Transistor mw Driver Amplifier Transistor Operation to GHz Available as Available in Hermetic Surface
ECE 145A / 218 C, notes set xx: Class A power amplifiers
ECE 145A / 218 C, notes set xx: Class A power amplifiers Mark Rodwell University of California, Santa Barbara rodwell@ece.ucsb.edu 805-893-3244, 805-893-3262 fax Class A power amplifier: what do we mean?
Silicon Bipolar Low Noise Microwave Transistors
Silicon Bipolar Low Noise Microwave Transistors MP42141 Features Case Styles Low Intrinsic Noise Figure (2.3dB Typical @ 1.0 GHz) High Power Gain At 1.0 GHz 18.0 db Typical Gold Metalization Hermetic and
Midium Power Transistors (±50V / ±3A)
Midium Power Transistors (±50V / ±3A) MP6Z3 Structure NPN/PNP Silicon epitaxial planar transistor Dimensions (Unit : mm) MPT6 (Dual) Features ) Low saturation voltage, typically V CE (sat) = 0.35V (Max.)
Fundamentals of Power Semiconductor Devices
В. Jayant Baliga Fundamentals of Power Semiconductor Devices 4y Spri ringer Contents Preface vii Chapter 1 Introduction 1 1.1 Ideal and Typical Power Switching Waveforms 3 1.2 Ideal and Typical Power Device
Data Sheet. AT Up to 6 GHz Medium Power Silicon Bipolar Transistor. Description. Features. 85 Plastic Package
AT-85 Up to 6 GHz Medium Power Silicon Bipolar Transistor Data Sheet Description Avago s AT-85 is a general purpose NPN bipolar transistor that offers excellent high frequency performance. The AT-85 is
SEMICONDUCTOR ELECTRONICS: MATERIALS, DEVICES AND SIMPLE CIRCUITS. Class XII : PHYSICS WORKSHEET
SEMICONDUCT ELECTRONICS: MATERIALS, DEVICES AND SIMPLE CIRCUITS Class XII : PHYSICS WKSHEET 1. How is a n-p-n transistor represented symbolically? (1) 2. How does conductivity of a semiconductor change
High Performance Lateral Schottky Collector Bipolar Transistors on SOI for VLSI Applications
High Performance Lateral Schottky Collector Bipolar Transistors on SOI for VLSI Applications A dissertation submitted in partial fulfillment of the requirement for the degree of Master of Science (Research)
AT Up to 6 GHz Medium Power Silicon Bipolar Transistor. Data Sheet
AT-86 Up to 6 GHz Medium Power Silicon Bipolar Transistor Data Sheet Description Avago s AT-86 is a general purpose NPN bipolar transistor that offers excellent high frequency performance. The AT-86 is
HOT ELECTRON INJECTION EFFECT AND IMPROVED LINEARITY IN TYPE-I/II DHBT FOR MILLIMETER-WAVE MIXED SIGNAL CIRCUIT APPLICATIONS KUANG-YU CHENG
HOT ELECTRON INJECTION EFFECT AND IMPROVED LINEARITY IN TYPE-I/II DHBT FOR MILLIMETER-WAVE MIXED SIGNAL CIRCUIT APPLICATIONS BY KUANG-YU CHENG DISSERTATION Submitted in partial fulfillment of the requirements
Chapter 6. Silicon-Germanium Technologies
Chapter 6 licon-germanium Technologies 6.0 Introduction The design of bipolar transistors requires trade-offs between a number of parameters. To achieve a fast base transit time, hence achieving a high
Design Methodology and Applications of SiGe BiCMOS Cascode Opamps with up to 37-GHz Unity Gain Bandwidth
Design Methodology and Applications of SiGe BiCMOS Cascode Opamps with up to 37-GHz Unity Gain Bandwidth S.P. Voinigescu, R. Beerkens*, T.O. Dickson, and T. Chalvatzis University of Toronto *STMicroelectronics,
Scaling Mesa InP DHBTs to Record Bandwidths
University of California Santa Barbara Scaling Mesa InP DHBTs to Record Bandwidths A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Electrical
CA3018, CA3018A. General Purpose Transistor Arrays. Features. Applications. Part Number Information. Pinout. [ /Title () /Autho.
[ /Title /Subject /Autho /Keyords ) /Cretor /DOCI FO dfark /Pageode /Useutines /DOC- IEW dfark Semiconductor General Purpose Transistor Arrays The CA8 and CA8A consist of four general purpose silicon NPN
A Static Frequency Divider in InP-DHBT Technology for Process Control
Diploma Thesis A Static Frequency Divider in InP-DHBT Technology for Process Control March 2002 Stefan Bleuler Urs Hammer Supervisors: Iwan Schnyder Volker Schwarz Prof. Dr. H. Jäckel Electronics Laboratory
BFR91. Silicon NPN Planar RF Transistor. Vishay Semiconductors
Silicon NPN Planar RF Transistor Features High power gain Low noise figure High transition frequency Lead (Pb)-free component Component in accordance to RoHS 22/95/EC and WEEE 22/96/EC e3 3 2 1 2 E 3 1
A 7ns, 6mA, Single-Supply Comparator Fabricated on Linear s 6GHz Complementary Bipolar Process
A 7ns, 6mA, Single-Supply Comparator Fabricated on Linear s 6GHz Complementary Bipolar Process Introduction The is an ultrafast (7ns), low power (6mA), single-supply comparator designed to operate on either
Up to 6 GHz Medium Power Silicon Bipolar Transistor. Technical Data AT Plastic Package
Up to 6 GHz Medium Power Silicon Bipolar Transistor Technical Data AT-286 Features High Output Power: 2.5 dbm Typical P 1 db at 2. GHz High Gain at 1 db Compression: 13.5 db Typical G 1 db at 2. GHz Low
In0.53Ga0.47As MOSFETs with 5 nm channel and self-aligned source/drain by MBE regrowth
UNIVERSITY OF CALIFORNIA Santa Barbara In0.53Ga0.47As MOSFETs with 5 nm channel and self-aligned source/drain by MBE regrowth A Dissertation submitted in partial satisfaction of the requirements for the
Heinrich-Hertz-Institut Berlin
NOVEMBER 24-26, ECOLE POLYTECHNIQUE, PALAISEAU OPTICAL COUPLING OF SOI WAVEGUIDES AND III-V PHOTODETECTORS Ludwig Moerl Heinrich-Hertz-Institut Berlin Photonic Components Dept. Institute for Telecommunications,,
SRM INSTITUTE OF SCIENCE AND TECHNOLOGY (DEEMED UNIVERSITY)
SRM INSTITUTE OF SCIENCE AND TECHNOLOGY (DEEMED UNIVERSITY) QUESTION BANK I YEAR B.Tech (II Semester) ELECTRONIC DEVICES (COMMON FOR EC102, EE104, IC108, BM106) UNIT-I PART-A 1. What are intrinsic and
The Design of E-band MMIC Amplifiers
The Design of E-band MMIC Amplifiers Liam Devlin, Stuart Glynn, Graham Pearson, Andy Dearn * Plextek Ltd, London Road, Great Chesterford, Essex, CB10 1NY, UK; (lmd@plextek.co.uk) Abstract The worldwide
ECE145a/218a: Exercise in Running the Simulation Tools and Introductory Circuits
ECE145a/218a: Exercise in Running the Simulation Tools and Introductory Circuits The exercises below are designed to **complement* your running the ADS tutorials (in ADS documentation), which are highly
Process Technologies and Integrated Circuits
InP HBTs: Process Technologies and Integrated Circuits Mark Rodwell University of California, Santa Barbara rodwell@ece.ucsb.edu 805-893-3244, 805-893-3262 fax Acknowledgments Collaborators Prof. A. Gossard,
SiGe HBT Technology Development in the DOTSEVEN Project
SiGe HBT Technology Development in the DOTSEVEN Project Alexander Fox 1, Bernd Heinemann 1, Josef Böck 2, Klaus Aufinger 2 1 IHP, 2 Infineon Technologies AG Open Bipolar Workshop 3 October 2013, Bordeaux
AC Analysis of InP/GaAsSb DHBT Device 1 Er. Ankit Sharma, 2 Dr. Sukhwinder Singh 1
American International Journal of Research in Science, Technology, Engineering & Mathematics Available online at http://www.iasir.net ISSN (Print): 2328-3491, ISSN (Online): 2328-3580, ISSN (CD-ROM): 2328-3629
A high performance differential amplifier through the direct monolithic integration of InP HBTs and Si CMOS on silicon substrates
A high performance differential amplifier through the direct monolithic integration of InP HBTs and Si CMOS on silicon substrates The MIT Faculty has made this article openly available. Please share how
Gallium nitride (GaN)
80 Technology focus: GaN power electronics Vertical, CMOS and dual-gate approaches to gallium nitride power electronics US research company HRL Laboratories has published a number of papers concerning
Power Gain Singularities in Transferred-Substrate InAlAs InGaAs-HBTs
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 7, JULY 2003 1589 Power Gain Singularities in Transferred-Substrate InAlAs InGaAs-HBTs Miguel Urteaga and Mark J. W. Rodwell, Fellow, IEEE Abstract Deep
A New SiGe Base Lateral PNM Schottky Collector. Bipolar Transistor on SOI for Non Saturating. VLSI Logic Design
A ew SiGe Base Lateral PM Schottky Collector Bipolar Transistor on SOI for on Saturating VLSI Logic Design Abstract A novel bipolar transistor structure, namely, SiGe base lateral PM Schottky collector
50-500GHz Wireless Technologies: Transistors, ICs, and Systems
Plenary, Asia-Pacific Microwave Conference, December 6, 2015, Nanjing, China 50-500GHz Wireless Technologies: Transistors, ICs, and Systems Mark Rodwell, UCSB J. Rode*, P. Choudhary, B. Thibeault, W. Mitchell,
LM3046 Transistor Array
Transistor Array General Description The LM3046 consists of five general purpose silicon NPN transistors on a common monolithic substrate. Two of the transistors are internally connected to form a differentiallyconnected
GHz Bipolar ICs: Device and Circuit Design Principles
Short Course, IEEE Bipolar / BiCMOS Circuits and Technology Meeting, 9 October 2011, Atlanta, Georgia 100-1000 GHz Bipolar ICs: Device and Circuit Design Principles Mark Rodwell, UCSB Munkyo Seo, Teledyne
Technology Overview. MM-Wave SiGe IC Design
Sheet Code RFi0606 Technology Overview MM-Wave SiGe IC Design Increasing consumer demand for high data-rate wireless applications has resulted in development activity to exploit the mm-wave frequency range
Part Ordering code Marking Remarks Package BFR91A BFR91AGELB-GS08 BFR91A Packed in Bulk TO-50(3)
Silicon NPN Planar RF Transistor Features High power gain Low noise figure High transition frequency Lead (Pb)-free component Component in accordance to RoHS 22/95/EC and WEEE 22/96/EC e3 3 2 1 2 E 3 1
InP-based Complementary HBT Amplifiers for use in Communication Systems
InP-based Complementary HBT Amplifiers for use in Communication Systems Donald Sawdai and Dimitris Pavlidis Solid-State Electronics Laboratory Department of Electrical Engineering and Computer Science
Integrated Circuit Amplifiers. Comparison of MOSFETs and BJTs
Integrated Circuit Amplifiers Comparison of MOSFETs and BJTs 17 Typical CMOS Device Parameters 0.8 µm 0.25 µm 0.13 µm Parameter NMOS PMOS NMOS PMOS NMOS PMOS t ox (nm) 15 15 6 6 2.7 2.7 C ox (ff/µm 2 )
DISCRETE SEMICONDUCTORS DATA SHEET. BFG97 NPN 5 GHz wideband transistor. Product specification File under Discrete Semiconductors, SC14
DISCRETE SEMICONDUCTORS DATA SHEET File under Discrete Semiconductors, SC14 September 1995 DESCRIPTION NPN planar epitaxial transistor mounted in a plastic SOT223 envelope. It features excellent output
Record Extrinsic Transconductance (2.45 ms/μm at V DS = 0.5 V) InAs/In 0.53 Ga 0.47 As Channel MOSFETs Using MOCVD Source-Drain Regrowth
Record Extrinsic Transconductance (2.45 ms/μm at = 0.5 V) InAs/In 0.53 Ga 7 As Channel MOSFETs Using MOCVD Source-Drain Regrowth Sanghoon Lee 1*, C.-Y. Huang 1, A. D. Carter 1, D. C. Elias 1, J. J. M.
Integrated diodes. The forward voltage drop only slightly depends on the forward current. ELEKTRONIKOS ĮTAISAI
1 Integrated diodes pn junctions of transistor structures can be used as integrated diodes. The choice of the junction is limited by the considerations of switching speed and breakdown voltage. The forward
RF and Microwave Semiconductor Technologies
RF and Microwave Semiconductor Technologies Muhammad Fahim Ul Haque, Department of Electrical Engineering, Linköping University muhha@isy.liu.se Note: 1. This presentation is for the course of State of
Submicron InP DHBT technology for high-speed high-swing mixed-signal ICs
Downloaded from orbit.dtu.dk on: Sep 15, 2018 Submicron InP DHBT technology for high-speed high-swing mixed-signal ICs Godin, Jean; Nodjiadjim, V.; Riet, Muriel; Berdaguer, Pierre; Drisse, O.; Derouin,
DISCRETE SEMICONDUCTORS DATA SHEET. BFR520 NPN 9 GHz wideband transistor. Product specification File under Discrete Semiconductors, SC14
DISCRETE SEMICONDUCTORS DATA SHEET BFR File under Discrete Semiconductors, SC4 September 99 BFR FEATURES High power gain Low noise figure High transition frequency Gold metallization ensures excellent
OMMIC Innovating with III-V s OMMIC OMMIC
Innovating with III-V s Innovating with III-V s Mixed D/A ED02AH process for radar control functions and new GaN/Si for hyper-frequency power applications Innovating with III-V s Europe s Independant IIIV
Lecture 190 CMOS Technology, Compatible Devices (10/28/01) Page 190-1
Lecture 190 CMOS Technology, Compatible Devices (10/28/01) Page 190-1 LECTURE 190 CMOS TECHNOLOGY-COMPATIBLE DEVICES (READING: Text-Sec. 2.9) INTRODUCTION Objective The objective of this presentation is
ECE145a / 218a: Notes Set 5 device models & device characteristics:
ECE145a / 218a: Notes Set 5 device models & device characteristics: Mark odwell University of California, Santa Barbara rodwell@ece.ucsb.edu 805-893-3244, 805-893-3262 fax Content: Bipolar Transistor M
Chapter 3: Bipolar Junction Transistors
Chapter 3: Bipolar Junction Transistors Transistor Construction There are two types of transistors: pnp npn pnp The terminals are labeled: E - Emitter B - Base C - Collector npn 2 Transistor Operation
A New High Performance Complementary Bipolar Technology Featuring 45GHz NPN and 20GHz PNP Devices.
A New High Performance Complementary Bipolar Technology Featuring 45GHz NPN and 20GHz PNP Devices. M C Wilson, P H Osborne, S Thomas and T Cook Mitel Semiconductor Cheney Manor, Swindon, Wiltshire, SN2
ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.4
ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.4 26.4 40Gb/s CMOS Distributed Amplifier for Fiber-Optic Communication Systems H. Shigematsu 1, M. Sato 1, T. Hirose 1, F. Brewer 2, M. Rodwell 2 1 Fujitsu,
Varactor Loaded Transmission Lines for Linear Applications
Varactor Loaded Transmission Lines for Linear Applications Amit S. Nagra ECE Dept. University of California Santa Barbara Acknowledgements Ph.D. Committee Professor Robert York Professor Nadir Dagli Professor
Self-Aligned-Gate GaN-HEMTs with Heavily-Doped n + -GaN Ohmic Contacts to 2DEG
Self-Aligned-Gate GaN-HEMTs with Heavily-Doped n + -GaN Ohmic Contacts to 2DEG K. Shinohara, D. Regan, A. Corrion, D. Brown, Y. Tang, J. Wong, G. Candia, A. Schmitz, H. Fung, S. Kim, and M. Micovic HRL
OBSOLETE. Low Noise, Matched Dual Monolithic Transistor MAT02
a FEATURES Low Offset Voltage: 50 V max Low Noise Voltage at 100 Hz, 1 ma: 1.0 nv/ Hz max High Gain (h FE ): 500 min at I C = 1 ma 300 min at I C = 1 A Excellent Log Conformance: r BE 0.3 Low Offset Voltage
TO-92 SOT-23 Mark: 3B. TA = 25 C unless otherwise noted. Symbol Parameter Value Units
PN98 Discrete POWER & Signal Technologies MMBT98 C C B E TO-92 SOT-23 Mark: 3B B E This device is designed for use as RF amplifiers, oscillators and multipliers with collector currents in the.0 ma to 30
Detectors for Optical Communications
Optical Communications: Circuits, Systems and Devices Chapter 3: Optical Devices for Optical Communications lecturer: Dr. Ali Fotowat Ahmady Sep 2012 Sharif University of Technology 1 Photo All detectors
NAME: Last First Signature
UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE 130: IC Devices Spring 2003 FINAL EXAMINATION NAME: Last First Signature STUDENT
Data Sheet. AT Up to 6 GHz Medium Power Silicon Bipolar Transistor. Features. Description. 100 mil Package. High Output Power:
AT-1 Up to 6 GHz Medium Power Silicon Bipolar Transistor Data Sheet Description Avago s AT-1 is a general purpose NPN bipolar transistor that offers excellent high frequency performance. The AT-1 is housed
Quantum-effect Resonant Tunneling Device Technology for Practical Ultra Low-power High-speed Applications
Quantum-effect Resonant Tunneling Device Technology for Practical Ultra Low-power High-speed Applications SEMATECH Symposium October 23 rd, 2012 Prof. Kyounghoon Yang High Speed Nanoelectronics Laboratory
Matched Monolithic Quad Transistor MAT14
Matched Monolithic Quad Transistor MAT4 FEATUES Low offset voltage: 400 µv maximum High current gain: 300 minimum Excellent current gain match: 4% maximum Low voltage noise density at 00 Hz, ma 3 nv/ Hz
NPN Silicon Planar High Voltage Transistor
NPN Silicon Planar High Voltage Transistor FEATURES High BV CEO, BV CBO High current gain Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC Halogen-Free according to IEC 61249-2-21
Millimeter-Wave Amplifiers for E- and V-band Wireless Backhaul Erik Öjefors Sivers IMA AB
Millimeter-Wave Amplifiers for E- and V-band Wireless Backhaul Erik Öjefors Sivers IMA AB THz-Workshop: Millimeter- and Sub-Millimeter-Wave circuit design and characterization 26 September 2014, Venice
Layout-based Modeling Methodology for Millimeter-Wave MOSFETs
Layout-based Modeling Methodology for Millimeter-Wave MOSFETs Yan Wang Institute of Microelectronics, Tsinghua University, Beijing, P. R. China, 184 wangy46@tsinghua.edu.cn Outline of Presentation Motivation
Matched Monolithic Quad Transistor MAT04
a FEATURES Low Offset Voltage: 200 V max High Current Gain: 400 min Excellent Current Gain Match: 2% max Low Noise Voltage at 100 Hz, 1 ma: 2.5 nv/ Hz max Excellent Log Conformance: rbe = 0.6 max Matching
Full H-band Waveguide-to-Coupled Microstrip Transition Using Dipole Antenna with Directors
IEICE Electronics Express, Vol.* No.*,*-* Full H-band Waveguide-to-Coupled Microstrip Transition Using Dipole Antenna with Directors Wonseok Choe, Jungsik Kim, and Jinho Jeong a) Department of Electronic
ESE 372 / Spring 2011 / Lecture 19 Common Base Biased by current source
ESE 372 / Spring 2011 / Lecture 19 Common Base Biased by current source Output from Collector Start with bias DC analysis make sure BJT is in FA, then calculate small signal parameters for AC analysis.
Lecture 24: Bipolar Junction Transistors (1) Bipolar Junction Structure, Operating Regions, Biasing
Lecture 24: Bipolar Junction Transistors (1) Bipolar Junction Structure, Operating Regions, Biasing BJT Structure the BJT is formed by doping three semiconductor regions (emitter, base, and collector)