sub-mm-wave ICs, University of California, Santa Barbara

Transcription

1 20th Annual Workshop on Interconnections within High Speed Digital Systems, Santa Fe, New Mexico, 3 6 May 2009 THz Transistors, sub-mm-wave ICs, mm-wave Systems Mark Rodwell University of California, Santa Barbara rodwell@ece.ucsb.edu , fax

2 The End (of Moore's Law) is Near (?) It's a great time to be working on electronics! Things to work on: InP transistors: extend to 3-4 THz GHz & low-thz ICs GaN HEMTs: powerful transmitters from GHz Si MOSFETs: scale them past 16 nm III-V MOSFETs: help keep VLSI scaling (maybe) VLSI transistors: subvert Boltzmann solve power crisis mm-wave VLSI: massively complex ICs to re-invent radio Our focus today: THz transistors - how and why

3 Why THz Transistors?

4 Why Build THz Transistors? 500 GHz digital logic fiber optics THz amplifiers THz radios imaging, sensing, communications precision analog design at microwave frequencies high-performance receivers Higher-Resolution Microwave ADCs, DACs, DDSs

5 What Would You Do With a THz Transistor? 640 Gb/s ETDM optical fiber links GHz imaging systems mm-wave mm wave communication links

6 At High Frequencies The Atmosphere Is Opaque Mark Rosker IEEE IMS 2007

7 What Else Would You Do With a THz Transistor? precision, high-performance analog microwave circuits higher resolution microwave higher-resolution microwave ADCs, DACs, DDSs

8 How to Make THz Transistors

9 Simple Device Physics: Resistance bulk resistance contact t resistance contact t resistance -perpendicular - parallel bulk T R ρ ρ R A A contact R ρcontact + ρ A sheet W ' 3L Good approximation for contact widths less than 2 transfer lengths.

10 Simple Device Physics: Depletion Layers capacitance transit time space-charge limited current C ε A T T I 2εv τ max ( V + 2φ ) 2 2v + applied Vdepletion A T I C Δ V ΔT where C I τ max V applied + V depletion + 2φ

11 Simple Device Physics: Thermal Resistance Exact Carslaw & Jaeger 1959 Long, Narrow Stripe HBT Emitter, FET Gate R th 1 πk th L ln L W + 1 πk th L cylindrical heat flow near junction spherical heat flow far from junction R th + 1 πk th 1 πk th W sinh L 1 sinh 1 L W W L Square ( L by L ) IC on heat sink R th 1 4K th L 1 + πk th L planar heat flow spherical heat flow near surface far from surface

12 Simple Device Physics: Fringing Capacitance C L W ε εε T parallel - plate fringing C L slowly - varying function ε of W1 / G and W2 / G (1 to 3) ε wiring capacitance FET parasitic capacitances C / L > ε C parasitic / L ~ ε VLSI power-delay limits FET scaling constraints

13 Frequency Limits and Scaling Laws of (most) Electron Devices τ thickness C area / thickness R / area R I PIN photodiode top ρ bottom contact Δ T bottom ρ area contact max, space-charge-limit power length + ρ 4 sheet area / width length length egt log width ( thickness) 2 R Rtop To double bandwidth, reduce thicknesses 2:1 Improve contacts 4:1 reduce width 4:1, keep constant length increase current density 4:1

14 Bipolar Transistor Scaling Laws W e T b W bc T c Changes required to double transistor bandwidth: ( ) emitter length L E parameter change collector depletion layer thickness decrease 2:1 base thickness decrease 1.414:1 emitter junction width decrease 4:1 collector junction width decrease 4:1 emitter contact resistance decrease 4:1 current density increase 4:1 base contact resistivity decrease 4:1 Linewidths scale as the inverse square of bandwidth because thermal constraints dominate.

15 FET Scaling Laws LG Changes required to double transistor bandwidth: ( ) gate width W G parameter change gate length decrease 2:1 gate dielectric capacitance density increase 2:1 gate dielectric equivalent thickness decrease 2:1 channel electron density increase 2:1 source & drain contact resistance decrease 4:1 current density (ma/μm) increase 2:1 Linewidths scale as the inverse of bandwidth because fringing capacitance does not scale.

16 Thermal Resistance Scaling : Transistor, Substrate, Package cylindricall heat flow near junction spherical flow for r > L e planar flow for r > D HBT / 2 P L e P P Tsub D / 2 ΔTsubstrate ln 2 π K InPLE We πk InP LE D K InP D increases logarithmically insignificant variation increases quadratically if T sub is constant ΔT package π K P Cu chip W chip junctio on temperature ris se, Kelvin 140 Tsub 40 μm (150 GHz / f clock ) HBT CML IC total substrate: cylindrical+spherical regions package 20 substrate: planar region master-slave D-Flip-Flop clock frequency, GHz Wiring lenghts scale as 1/bandwidth. Power density, scales as (bandwidth) 2.

17 Thermal Resistance Scaling : Transistor, Substrate, Package cylindricall heat flow near junction spherical flow for r > L e planar flow for r > D HBT / 2 P L e P P Tsub D / 2 ΔTsubstrate ln 2 π K InPLE We πk InP LE D K InP D increases logarithmically insignificant variation increases quadratically if T sub is constant ΔT package π K P Cu chip W chip junctio on temperature ris se, Kelvin 140 T sub 40 μm (150 GHz / f clock ) 120 total HBT CML IC 100 Probable best solution: 80 substrate: cylindrical+spherical regions package 20 substrate: planar region Wiring lenghts scale as Thermal Vias ~500 nm below InP subcollector 1/bandwidth. Power density,...over full active IC area. master-slave D-Flip-Flop clock frequency, GHz scales as (bandwidth) 2.

18 Electron Plasma Resonance: Not a Dominant Limit T 1 L kinetic 2 * A q nm T 1 Rbulk 2 * A q nm τ m C displacement εa T dielectric relaxation frequency f f dielecic C 1 σ 2π ε 1/ 2π displacement R bulk scattering frequency f dielecicl i 1 R π L 1 2πτ m bulk 2 kinetic plasma frequency f plasma 1/ 2π L C kinetic displacement n - InGaAs / cm p - InGaAs / cm THz 7 THz 74 THz 80 THz 12 THz 31THz

19 Electron Plasma Resonance: Not a Dominant Limit T 1 L kinetic 2 * A q nm T 1 Rbulk 2 * A q nm τ m C displacement εa T dielectric relaxation frequency f dielecic C 1 σ 2π ε 1/ 2π displacement R bulk scattering frequency f dielecic i 1 R π L 1 2πτ m bulk 2 kinetic plasma frequency f plasma 1/ 2π L C kinetic displacement n - InGaAs / cm p - InGaAs / cm THz 7 THz 74 THz 80 THz 12 THz 31THz

20 Electron Plasma Resonance: Not a Dominant Limit T 1 L kinetic 2 * A q nm T 1 Rbulk 2 * A q nm τ m C displacement εa T dielectric relaxation frequency f dielecic C 1 σ 2π ε 1/ 2π displacement R bulk scattering frequency f dielecic i 1 R π L 1 2πτ m bulk 2 kinetic plasma frequency f plasma 1/ 2π L C kinetic displacement n - InGaAs / cm p - InGaAs / cm THz 7 THz 74 THz 80 THz 12 THz 31THz

21 Electron Plasma Resonance: Not a Dominant Limit T 1 L kinetic 2 * A q nm T 1 Rbulk 2 * A q nm τ m C displacement εa T dielectric relaxation frequency f dielecic C 1 σ 2π ε 1/ 2π displacement R bulk scattering frequency f scattering 1 2πτ 1 R π L m bulk 2 kinetic plasma frequency f plasma 1/ 2π L C kinetic displacement n - InGaAs / cm p - InGaAs / cm THz 7 THz 74 THz 80 THz 12 THz 31THz

22 THz & nm Transistors: it's all about the interfaces Metal-semiconductor interfaces (Ohmic contacts): very low resistivity Dielectric-semiconductor interfaces (Gate dielectrics): very high capacitance density Transistor & IC thermal resistivity.

23 THz Bipolar Transistors

24 InP Bipolar Transistor Scaling Roadmap industry university university appears maybe industry feasible emitter nm width Ω μm 2 access ρ base nm contact width, Ω μm 2 contact ρ collector nm thick, ma/μm 2 current density V, breakdown f τ GHz W e f max GHz T b power amplifiers GHz digital 2:1 divider GHz W bc T c

25 InP DHBTs: September GHz 500 GHz 600 GHz 700 GHz 800 GHz 900 GHz f max f τ Teledyne DBHT popular f ( f τ τ or f + f max max metrics ti : alone ) / 2 f (GH Hz) max Updated Sept f t (GHz) UIUC DHBT NTT DBHT ETHZ DHBT UIUC SHBT UCSB DHBT NGST DHBT HRL DHBT IBM SiGe Vitesse DHBT (1 f τ f τ f max + 1 f max ) 1 much better metrics : power amplifiers: PAE, associated gain, mw/ μm low noise amplifiers: F min digital : f ( C ( R ( R ( τ clock b cb ex, associated gain, I, hence ΔV / I c c ), / ΔV ), Ic / Δ V ), + τ ) bb c

26 512 nm InP DHBT Laboratory Technology 500 nm mesa HBT 150 GHz M/S latches 175 GHz amplifiers UCSB / Teledyne / GCS UCSB 500 nm sidewall HBT DDS IC: 4500 HBTs GHz op-amps Production ( Teledyne ) Z. Griffith M. Urteaga P. Rowell D. Pierson B. Brar V. Paidi Teledyne f τ 405 GHz f max 392 GHz V br, ceo 4 V Teledyne / BAE 20 GHz clock Teledyne / UCSB dbm 2 GHz with 1 W dissipation

27 150 nm thick collector 256 nm Generation 40 InP DHBT GHz Amplifier 200 GHz master-slave latch design Z. Griffith, E. Lind J. Hacker, M. Jones db H 21 f τ 424 GHz U f max 780 GHz nm thick collector Hz 30 db U f τ 560 GHz H 21 f max 560 GHz Hz 60 nm thick collector db U H 21 Hz m 2 ma/μ ma/μm 2 ma/μm V ce V ce 10 f 218 GHz 10 max f 660 GHz t V ce

28 324 GHz Medium Power Amplifiers in 256 nm HBT ICs designed by Jon Hacker / Teledyne Teledyne 256 nm process flow- Hacker et al, 2008 IEEE MTT-S ~2 mw saturated output power Ga ain (db), Pow wer (dbm), PAE (%) Output Power (dbm) Gain (db) Drain Current (ma) PAE (%) Cur rrent, ma Input Power (dbm) 0

29 InP Bipolar Transistor Scaling Roadmap industry university university appears maybe industry feasible emitter nm width Ω μm 2 access ρ base nm contact width, Ω μm 2 contact ρ collector nm thick, ma/μm 2 current density V, breakdown f τ GHz W e f max GHz T b power amplifiers GHz digital 2:1 divider GHz W bc T c

30 Conventional ex-situ contacts are a mess THz transistor bandwidths: very low-resistivity contacts are required textbook contact with surface oxide with metal penetration Interface barrier resistance Further intermixing during high-current operation degradation

31 Ohmic Contacts Good Enough for 3 THz Transistors 64 nm (2.0 THz) HBT needs ~ 2 Ω - μm 2 contact t resistivities iti 32 nm (2.8 THz) HBT needs ~ 1 Ω - μm 2 Contacts to N-InGaAs*: Mo MBE in-situ 2.22 (+/- 0.5) Ω - μm 2 TiW ex-situ ~2.2 Ω - μm 2 Contacts to P-InGaAs: Mo MBE in-situ below 2.5 Ω - μm 2 Pd/... ex-situ ~1 (+/-?) Ω - μm 2 *measured emitter resistance remains higher than that of contacts.

32 Process Must Change Greatly for 128 / 64 / 32 nm Nodes control undercut thinner emitter thinner emitter thinner base metal thinner base metal excess base metal resistance Undercutting of emitter ends {101}A planes: fast {111}A planes: slow

33 128 / 64 nm process: where we are going Developing scalable self-aligned base process 0.3 Ω-μm 2 resistivity emitter contacts - in-situ, in MBE 2 Ω-μm 2 resistivity base contacts - in-situ, in MBE target ~2000 GHz device

34 THz Field-Effect Transistors (THz HEMTs)

35 FET Scaling Laws LG Changes required to double transistor bandwidth: ( ) gate width W G parameter change gate length decrease 2:1 gate dielectric capacitance density increase 2:1 gate dielectric equivalent thickness decrease 2:1 channel electron density increase 2:1 source & drain contact resistance decrease 4:1 current density (ma/μm) increase 2:1 InGaAs HEMTs are best for mm-wave low-noise receivers......but there are difficulties in improving them further.

36 Why HEMTs are Hard to Improve 1 st challenge with HEMTs: reducing access resistance low electron density under gate recess limits current gate barrier lies under S/D contacts resistance gate barrier channel Source Gate Drain K Shinohara 2 nd challenge with HEMTs: low gate barrier high tunneling currents with thin barrier high emission currents with high electron density E F E well-γ E c III-V MOSFETs do not face these scaling challenges

37 III-V MOSFETs for VLSI Also Helps HEMT Development What is it? MOSFET with an InGaAs channel Why do it? low electron effective mass higher electron velocity more current, less charge at a given insulator thickness & gate length very low access resistance What are the problems? low electron effective mass constraints on scaling! must grow high-k on InGaAs, must grow InGaAs on Si

38 III-V MOSFETs in Development Wistey Singisetti Burek Lee. Rodwell Gossard top of gate side of gate Mo S/D metal with N+ InAs underneath gate Mo S/D metal with N+ InAs underneath InAs regrowth

39 III-V MOSFETs as a Scaling Path for THz HEMTs source contact metal gate sidewall gate dielectric drain contact N+ source N+ drain quantum well / channel barrier substrate Why? Much lower access resistance in S/D regions Higher gate barrier higher feasible electron density in channel Higher gate barrier gate dielectric can be made thinner Estimated Performance (?) Estimated Performance (?) 2 THz cutoff frequencies at 32 nm gate length

40 Applications of THz III-V Transistors

41 What Else Would You Do With a THz Transistor? precision, high-performance analog microwave circuits higher resolution microwave higher-resolution microwave ADCs, DACs, DDSs

42 mm-wave Op-Amps for Linear Microwave Amplification Reduce distortion with strong negative feedback DARPA / UCSB / Teledyne FLARE: Griffith & Urteaga linear response output powe er, dbm increasing feedback 2-tone intermodulation 300 GHz / 4 V InP HBT R. Eden input power, dbm measured GHz bandwidth measured 54 dbm new designs in fabrication simulated 56 dbm 2 GHz

43 What Would You Do With a THz Transistor? 640 Gb/s ETDM optical fiber links GHz imaging systems mm-wave mm wave communication links

44 670 GHz Transceiver Simulations in 128 nm InP HBT transmitter exciter 670 GHz (128 nm HBT) receiver LNA: 9.5 db Fmin at 670 GHz nf f(2) db(s S(2,1)) f(2) SP.freq, GHz freq GHz VCO: -50 dbc (1 100 Hz offset at 620 GHz (phase 1) 128nm n PA: 9.1 dbm Pout at 670 GHz nm (1 Hz) PLL single-sideband phase noise spectral density, dbc Total PLL phase noise free-running running VCO -100 closed-loop VCO noise multiplied reference noise offset from carrier, Hz 3-layer thin-film THz interconnects thick-substrate--> high-q TMIC thin -> high-density digital Dynamic divider: novel design, simulates to 950 GHz t, Vout_bar Vou GHz Input ut, Vout_bar Vou GHz Input time, seconds time, seconds Mixer: 10.4 db noise figure 11.9 db gain n (db) Noise Figure, Conversion Gain LO Power

45 What Would You Do With a THz Transistor? 640 Gb/s ETDM optical fiber links GHz imaging systems mm-wave mm wave communication links

46 150 & 250 GHz Bands for 100 Gb/s Radio? Wiltse, 1997 IEEE APS-Symposium, P 2 2 received / Ptrans ( Dt Dr / 16 π )( λ / R) sea level 2 received ( 4QPSK ) Q ktfb ; Q 6 4 km 2 4πA eff λ P D GHz, GHz: enough bandwidth for 100 Gb/s QPSK 150 GHz carrier, 100 Gbs/s QPSK radio: 30 cm antennas, 10 dbm power, fair weather 1 km range 150 GHz band: Expect ~10-20 db/km attenuation for rain 300 GHz band: expect ~20-30 db/km from 90% humidity 9 km

47 Interconnects within high-speed ICs

48 CPW has parasitic modes, coupling from poor ground plane integrity k z 0V +V 0V +V +V +V -V 0V +V 0V CPW mode 0V Microstrip mode Substrate modes 0 V Slot mode ground straps suppress slot mode, but multiple ground breaks in complex ICs produce ground return inductance ground vias suppress microstrip mode, wafer thinning suppresses substrate modes Microstrip has high via inductance, has mode coupling unless substrate is thin. k z We prefer (credit to NTT) thin-film microstrip wiring, inverted is best for complex ICs M. Urteaga, Z. Griffith, S. Krishnan

49 mm-wave MIMO: Wireless Links at 100's of Gb/s

50 mm-wave (60-80 GHz) MIMO wireless at 40+ Gb/s rates? Rayleigh Criterion : Spatial angular separation of adjacent transmitters: δθ Receive array angular resolution lti : δθ λ /( N To resolve adjacent channels, δθ δθ r r r 1 ) D ( N 1) D t D / R λr( N 1) 70 GH 1 k 16 l t 2 l i ti t 2 5 GB d QPSK 70 GHz, 1 km, 16 elements, 2 polarizations, 3.6 x 3.6 meter array, 2.5 GBaud QPSK 160 Gb/s digital radio?

51 mm-wave MIMO: 2-channel prototype, 60 GHz, 40 meters 50mV pe er division 50mV pe er division 500ps per division 500ps per division

52 mm-wave MIMO: 4-channel prototype, 60 GHz, Indoor 4 x 622 Mb/s 60 GHz carrier

53 VSLI for mm-wave & sub-mm-wave systems

54 Billions of 700-GHz Transistors Imaging & Arrays 65 nm CMOS: ~5 db 200 GHz 150 GHz 8 db amplifier 22 nm will be much faster yet. IBM: Janagathan, Pekarik UCSB: Seo What can you do with a few billion 700-GHz transistors? Build Transmitter / Receiver Arrays 100's or 1000's of transmitters or receivers...on < 1 cm 2 IC area...operating at GHz.

55 3-stage 250GHz Amplifier Design IBM: Pekarik, Jaganathan UCSB: M. Seo Designs in Fabrication 32 nm CMOS Fcenter 260GHz Gain 9.9dB P DC 15mW m m37 m db(s(1,2)) db(s(2,1)) f req, GHz m11 freq 260.0GHz db(s(2,1))9.916 db(s(2,2)) db(s(1,1)) f req, GHz m37 m38 freq 260.0GHz freq 260.0GHz db(s(1,1)) db(s(2,2)) StabFactor freq, GHz

56 millimeter-wave spectrum: new solutions needed mm-wave Bands Lots of bandwidth P P received transmitte d 2 1 λ π R e αr short wavelength weak signal short range highly directional antenna strong signal long range 2 P received D td r λ P 2 2 transmitte d π R 16 e α R narrow beam must be aimed no good for mobile monolithic beam steering arrays strong signal, steerable Preceived N N P 16 transmit λ R 2 receive transmit 2 e αr 32 x 32 array db increased SNR vastly increased range multi-gigabit mobile communications

57 Billions of 700-GHz Transistors Imaging & Arrays Arrays for point-point i t radio links: bit rate distance 2 (# array elements) 2 wavelength 2 Arrays for (sub)-mm-wave imaging : # resovable pixels # array elements Arrays for Spatial-Division-Multiplexing i i lti l i Networks: # independen t beams # array elements 4 array area wavelength 2

58 THz Transistors

59 Why Build THz Transistors? 500 GHz digital logic fiber optics THz amplifiers THz radios imaging, sensing, communications precision analog design at microwave frequencies high-performance receivers Higher-Resolution Microwave ADCs, DACs, DDSs

60 THz Integrated Circuits Device scaling (Moore's Law) is not yet over. Scaling multi-thz transistors. Challenges in scaling: contacts, dielectrics, heat Multi-THz transistors: for systems at very high frequencies for better performance at moderate frequencies Vast #s of THz transistors complex systems new applications... imaging, radio, and more

61 end

62 MIMO Link: a Subsampled Multi-Beam Phased Array array places nulls at interfering transmitters 2 ND λr Range (m) Carrier Frequency (GHz) N Array Length (m) Data Rate 1 (Gb/s) Assuming N x N square arrays