Formal Foundation of Digital Design
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1 Chapter 2: Switching Algebra and Logic Circuits Digital Logic Department of Computer Engineering KKU. Formal Foundation of Digital Design In 854 George Boole published An investigation into the Laws of Thoughts Algebraic sstem with two values and Used to formall determine the truth or falsehood of propositions In 938 Claude Shannon showed in his MS thesis how Boolean algebra can be used for analsis of circuits Algebraic sstem with two values and At that time circuits were built from relas Hence the term switching algebra Two states hence a bit Digital Logic Department of Computer Engineering KKU. 2 Boolean Functions In arithmetic there are certain, familiar functions, such as: 2 3 = 6 In logic another set of functions is defined. Unlike arithmetic functions these have binar inputs and binar outputs Digital Logic Department of Computer Engineering KKU. 3
2 Boolean Algebra Aioms Set of two values: {,} or {false,true} or {low,high} There are 2 binar and one unar operations defined for elements in Boolean algebra Digital Logic Department of Computer Engineering KKU. 4 AND Operation: TRUE if both inputs are TRUE Smbol: AND = = = ^ often referred to as a product term Logic gate: Digital Logic Department of Computer Engineering KKU. 5 OR Operation: TRUE if either or both inputs is TRUE Smbol: OR = + = v often referred to as a sum term Logic gate: Digital Logic Department of Computer Engineering KKU
3 NOT Operation: TRUE iff the input is FALSE Smbol: NOT = ~ = = often referred to as an inverter or a complement Logic gate: Digital Logic Department of Computer Engineering KKU. 7 Basic Properties of Switching Algebra Operations can be combined using parentheses With parentheses, order of operations is from the innermost to the outermost parentheses Order: ) negation, 2) multiplication, 3) addition -variable theorems 2- and 3-variable theorems Digital Logic Department of Computer Engineering KKU. 8 -variable theorems T: + = = identities T2: + = = null elements T3: + = = idempotenc T4: ( ) = involution T5: + = = complements dualit Proofs are done b perfect induction Consider all possible combinations on the lhs and rhs, and check whether the are equal Digital Logic Department of Computer Engineering KKU. 9 3
4 Perfect Induction LHS RHS (T3) + = LHS RHS (T3) = +? + =? =? + =? = Digital Logic Department of Computer Engineering KKU. 2- and 3-variable theorems commutativit T6: + = + = associativit T7: (+)+z = +(+z) ( ) z = ( z) distributivit T8: + z = (+z) (+) (+z) = +( z) covering T9: + = (+) = combining T: + = (+) (+ ) = consensus T: +( ) = + ( +) = T2: + z+ z = + z (+) ( +z) (+z) = (+) ( +z) Swap &, AND & OR, theorems sta true Digital Logic Department of Computer Engineering KKU. Proofs (T8) (+) (+z) = +( z), distributivit Proof: use perfect induction z LHS (+) (+z) RHS + z Digital Logic Department of Computer Engineering KKU. 2 4
5 NAND Operation: TRUE if either or both inputs is FALSE Smbol: NAND = ( ) = = ^ Logic gate: Digital Logic Department of Computer Engineering KKU. 3 () b NOR Operation: TRUE if both inputs are FALSE Smbol: OR = = (+) = + = v Logic gate: + (+) Digital Logic Department of Computer Engineering KKU. 4 Algebraic epressions, Equations and Circuits z = + Given inputs and, the output is z = + z Digital Logic Department of Computer Engineering KKU. 5 5
6 Algebraic epressions, Equations and Circuits (cont.) Consensus theorem T2 LHS: + z+ z = + z :RHS X Y z X Y z z Digital Logic Department of Computer Engineering KKU. 6 DeMorgan Laws (+) = = ( ) = + = pushing the bubble Digital Logic Department of Computer Engineering KKU. 7 From AND and ORs to NORs Digital Logic Department of Computer Engineering KKU. 8 6
7 From ANDs and OR to NANDs Digital Logic Department of Computer Engineering KKU. 9 XOR (Eclusive-OR) Operation: TRUE iff either inputs is TRUE Smbol: XOR = Often referred to as an unequivalent gate Logic gate: ( ) Digital Logic Department of Computer Engineering KKU. 2 Simplifing Logic Functions Logic Minimisation: reduce compleit of the gate level implementation reduce number of literals (gate inputs) reduce number of gates reduce number of levels of gates Digital Logic Department of Computer Engineering KKU. 2 7
8 Simplifing Logic Functions (cont.) reduce number of gates fewer inputs implies faster gates in some technologies fan-ins (number of gate inputs) are limited in some technologies fewer levels of gates implies reduced signal propagation delas minimum dela configuration tpicall requires more gates number of gates (or gate packages) influences manufacturing costs Digital Logic Department of Computer Engineering KKU. 22 Alternative Logic Implementations A B C = ABC + A C + B C 2 = (AB C ) + ((AB) C) 3 = AB C Digital Logic Department of Computer Engineering KKU. 23 A B C Alternative Logic Implementations (cont.) TTL Package Counts: Two-Level Realisation (first set of INVs doesn't count) 3 packages ( 6-INVs, 3-input AND, 3-input OR) 2 Multi-Level Realisation Adv: Reduced Gate Fan-ins 3 packages ( 6-INVs, 2-input ANDs, 2-input OR) 3 Comple Gate: XOR Adv: Fewest Gates 2 packages ( 2-input AND, 2-input XOR) Digital Logic Department of Computer Engineering KKU. 24 8
9 Derivation of Epression Given:- desired truth table Problem:- to derive the boolean epression Simplest wa is to form the product terms An logic epression can alwas be epressed in one of the two standard forms:. Sum-of-Product (SOP) form Each term in the standard SOP form is known as minterm. 2. Product-of-Sum (POS) form Each term in the standard POS form is known as materm Digital Logic Department of Computer Engineering KKU. 25 Derivation of Epression (cont.) Sum-of-Product form (SOP) Procedure :-. Form product terms column 2. Complement the variables in each product if the corresponding input is 3. Form SOP epression from rows where output is Digital Logic Department of Computer Engineering KKU. 26 Derivation of Epression (cont.) X Y Product terms X Y X Y XY =X Y + XY + XY XY However, consider this circuit! X Y Y = X+Y Digital Logic Department of Computer Engineering KKU. 27 9
10 Derivation of Epression (cont.) Product-of-Sum form (POS) Procedure :-. Form sum terms column 2. Complement the variables in each sum if the corresponding input is 3. Form POS epression from rows where output is Digital Logic Department of Computer Engineering KKU. 28 Derivation of Epression (cont.) X Y Sum terms X+Y X+Y X +Y = (X+Y )(X +Y) X +Y = XX +XY+X Y +YY = XY+X Y Digital Logic Department of Computer Engineering KKU. 29
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