EXPERIMENT 12: DIGITAL LOGIC CIRCUITS

Size: px
Start display at page:

Download "EXPERIMENT 12: DIGITAL LOGIC CIRCUITS"

Transcription

1 EXPERIMENT 12: DIGITAL LOGIC CIRCUITS The purpose of this experiment is to gain some experience in the use of digital logic circuits. These circuits are used extensively in computers and all types of electronic instrumentation, including physics experiments. All of the integrated circuits (ICs) we will use are members of the Transistor-Transistor Logic (TTL) family and its improved variants. The circuits are a mixture of chips from the 74LS00 series ( Low-power Schottky, introduced 1976) and 74HCT00 series ( High-speed CMOS, TTL compatible, introduced 1982), and are in the form of 14-pin dual-inline epoxy packages (DIPs). Background on 7400-Series Digital Logic series TTL chips operate from a single DC power supply of V CC = +5 volts±5% (+5 V ± 10% for 74HCT). They can be destroyed if the supply voltage is raised above above +7.0 V or made negative even briefly (below 0.5 V for 74HCT). TTL logic levels for 7400 series ICs. Here are logic output and input levels: V: Supply voltage V CC ; also max. allowed input voltage V: V OH, min. output voltage for logical 0.4 ma V: V IH, min. input voltage for logical 0.04 ma max. I IN V: V S, threshold voltage (typical value varies) V: V IL, max. input voltage for logical -1.6 ma max. I SINK V: V OL, max. output voltage for logical -16 ma V: Ground; also min. allowed input voltage. 2. The delay in passing a signal through one NAND gate, called the propagation delay, is typically about 10 ns for 74LS and 74HCT TTL logic. 3. Unless you are not using an entire gate or section of a TTL logic chip, all of its unused inputs must be connected to low or high. (Compare with a CMOS logic chip, which must have all its inputs connected to something, or the chip might destroy itself!) series inputs source a maximum of 1.6 ma if held low or sink a maximum 0f 40 µa if held high; the outputs can sink 16 ma while maintaining their guaranteed low output voltage, and supply 0.4 ma at their guaranteed high output voltage. This allows up to ten inputs to be connected to one output, for a fanout of ten. This is not strictly true; unconnected TTL inputs will float to logical high, and a circuit designed with floating inputs might appear to work, but such designs will not operate reliably. For more on why, see Section 9.06 of Horowitz and Hill, The Art of Electronics second edition, where they describe leaving digital inputs unconnected as foolish and dangerous.

2 5. The 7400 ( commercial ) series of TTL ICs have an operating case temperature range of 0 C to +70 C; 54xx devices are military grade, with an operating temperature range of 55 C to +125 C. Many commercial CMOS logic series have a larger temperature range than the normal commercial rating, but you need to check the individual manufacturer s data sheet. Some devices are rated for an industrial temperature range of 40 C to +85 C. (Note that even this may be inadequate for some under-the-hood automotive applications.) Apparatus All of the digital circuits needed for the next two laboratories have been incorporated into prewired logic boards. The integrated circuits are mounted in DIP sockets inside the chassis of the logic board, with the inputs and outputs wired to external connectors. The volt power supply is also located inside the chassis. The ground and DC power leads are permanently wired to the DIP sockets. The ground wire is large (22 gauge) to reduce its inductance and noise. The DC power line is bypassed to ground at several points by low-inductance disc ceramic capacitors. This reduces the spikes in the supply voltage caused by the rapid switching of currents in the ICs. Each logic board contains the following circuits: 16 2-input NAND gates 3 3-input NAND gates 10 indicator LEDs 4 push-button switches 8 JK flip-flops 1 4-bit adder 1 UART 4 toggle switches (note: NOR gates with 2-8 inputs are readily available. You get NAND gates only as an exercise in DeMorgan s theorem.) Please note the following information about our logic boards: 1. Grey connectors indicate inputs. 74LS TTL inputs have a very non-linear impedance (2 kω near 0 V and 20 kω near +4 V) and may be connected to any voltage between 0 and V. 74HCT inputs are CMOS, and draw extremely small currents; they may be connected to voltages up to 1.5 V above V CC or below ground without trouble. 2. Green connectors indicate outputs. To prevent damage by accidental shorting, a 47 Ω resistor has been placed in series with each output. Each output can drive several inputs to logical one or zero; the number of inputs you can connect one output to is called the fanout of a logic circuit. Typical fanouts for modern TTL ICs are around 10; the use of protection resistors on our board limits its fanout to 4. 2

3 3. Light emitting diodes (LEDs) driven by internal buffer circuits can be used to indicate the digital voltage level at various points in the circuit: LED on indicates logical one, while LED off indicates logical zero. 4. Push-button and toggle switches can be used to provide logical one or logical zero inputs for other circuits on the board. 5. Pull-up resistors inside the board connect any floating (otherwise unconnected) inputs to high (logical one). (This means you don t have to worry about connecting floating inputs.) Laboratory Exercises Perform the exercises outlined below. As you go through the individual operations, it should become apparent how simple digital circuits can be combined to perform more complex operations. Do not introduce any external voltages into the logic board. 1. Experimentally verify the truth table for a 3-input NAND gate. 2. Use 2-input NAND gates to construct circuits that perform the following logical functions. In each case, draw the circuit diagram and experimentally verify the truth table. (a) 2-input AND gate: A AND B = A B. (b) 2-input OR gate: A OR B = A + B. (c) 2-input NOR gate: A NOR B = A + B. (d) 2-input XOR gate: A XOR B = A B. 3. Use NAND gates to construct circuits that perform the following functions. In each case, try to minimize the total number of gates, using 3-input NANDs wherever possible. Draw your circuits and write out at least a portion of the truth table (at least 8 states for each circuit; you can also use Don t Care states to simplify the table). (a) (A B) + C (b) ((A B) + C) D (c) (A B) + (C D) (d) (A B C) + D + E. 4. A comparator is a circuit that compares the values of two numbers A and B and outputs a one if A = B or a zero if A B. Consider a 2-bit comparator; such a circuit must have 4 inputs, one for each bit of each number. Let A 1 and A 0 be the most and least significant bit of A, respectively, and similarly for B 1 and B 0. (a) Write down a logical expression for C in terms of A 0, A 1, B 0, and B 1. (If you get stuck, it might help to write out a truth table.) 3

4 Inputs Outputs A 0 B 0 C 0 S Table 1: Truth table for a half adder. A 0 C 0 HA B 0 S 0 Figure 1: A block schematic symbol for a half adder. (b) Design a circuit that uses only 2- and 3-input NAND gates to perform a 2-bit comparison. Draw its schematic in your lab notebook. (c) Build the circuit you designed, and verify that it does what you designed it to do. (Hint: The XOR circuit from part 2d is pretty close to a 1-bit comparator compare the truth tables! You will need two such circuits, one for the first bit and another for the second bit.) 5. A basic circuit for adding two bits, called a half adder, has the truth table shown in Table 1. A half adder will add bits A 0 and B 0 to produce their sum S 0 and a carry bit C 0. (a) Write down logical expressions for S 0 and C 0 in terms of A 0 and B 0. (b) Design a half adder circuit using only 2- and 3-input NAND gates. (c) Build your half adder design, and verify that it produces the truth table shown in Table The circuit shown in Figure 2 is referred to as a full adder. A chain of N full adders can add two N-bit numbers A and B one bit at a time, starting from the least significant digit, giving their N-bit sum. In each full addition step it combines three inputs, A n, the nth bit from A B n, the nth bit from B C n 1, the carry bit from the previous step and generates two outputs, S n, the nth bit of the sum of A and B C n, a carry bit for the next step. The full adder is an extremely important and useful circuit found in every digital calculator and computer. (a) What should you do with the carry input to the LSB of an N-bit adder? 4

5 A n B n at least two C n C n 1 A n B n C n 1 at least one just one A n B n C n 1 all three S n Figure 2: A full adder built with NAND gates. Labels describe the functions of blocks. B 3 A 3 B 2 A 2 B 1 A 1 B 0 A 0 C 3 C 2 C 1 C 0 FA FA FA FA C in C out S 3 S 2 S 1 S 0 Figure 3: A block diagram of a 4-bit adder built from full adders. (b) For the last addition in an N-bit sum, the final carry bit C N 1 is also called the overflow bit. Why? (c) Write down the truth table for a full adder. You may reference Figure 2, or you can start from the functional definition of a full adder. 7. The 4-bit adder on the logic board is a single chip (a 74LS283 IC) that performs the function of four full-adder circuits like the one in Figure 2. A schematic diagram of four full adders connected to form a single 4-bit adder with carry is shown in Figure 3. Notice that the carry input and the carry output allow you to connect N of these chips together to obtain a 4N-bit adder. Use the 4-bit adder to add the following pairs of decimal numbers: 5

6 (a) (b) (c) Next, try using the adder to add signed numbers. Use two s complement form for negative numbers [( 3) = ], which will restrict our signed adder to the range 8 to +7 (we are using 4-bit words, so we can only represent 16 distinct numbers). Add the following pairs of decimal numbers: (d) ( 3) + 5. (e) 3 + ( 5). (f) ( 2) + ( 3). Observe what happens if you try to use just the most significant bit to indicate the sign [( 3) = ], called sign-and-magnitude representation. Why is two s complement the preferred representation for negative numbers? 8. (Optional.) Design a circuit which returns the two s complement negation of its input, a 4-bit number. You may use all of the circuits available on the logic board. If you feel like it, build and test this circuit. 9. (Optional.) A multiplexer is a very useful circuit which has two sets of inputs: address lines A and data lines D, along with a single output Q. The address lines choose which data line is copied to the output. The number d of data lines is at most 2 a. (a) Write down the truth table for a 2-input multiplexer with address line A and data lines D 0 and D 1 : Q = D 1 if A is high or Q = D 0 if A is low. (b) Design, build, and test a 2-input multiplexer circuit. (c) Design, build, and test a 4-input multiplexer circuit. 10. (Optional.) Using the oscilloscope s single-shot trigger mode, measure the propagation delay of a NAND gate. 11. (Optional.) Make a ring oscillator with 7 NAND gates connected in series as inverters. Measure the frequency with your oscilloscope and calculate the propagation delay per gate from this. References 6

4-bit counter circa bit counter circa 1990

4-bit counter circa bit counter circa 1990 Digital Logic 4-bit counter circa 1960 8-bit counter circa 1990 Logic gates Operates on logical values (TRUE = 1, FALSE = 0) NOT AND OR XOR 0-1 1-0 0 0 0 1 0 0 0 1 0 1 1 1 0 0 0 1 0 1 0 1 1 1 1 1 0 0 0

More information

4-bit counter circa bit counter circa 1990

4-bit counter circa bit counter circa 1990 Digital Logic 4-bit counter circa 1960 8-bit counter circa 1990 Logic gates Operates on logical values (TRUE = 1, FALSE = 0) NOT AND OR XOR 0-1 1-0 0 0 0 1 0 0 0 1 0 1 1 1 0 0 0 1 0 1 0 1 1 1 1 1 0 0 0

More information

Unit 1 Session - 3 TTL Parameters

Unit 1 Session - 3 TTL Parameters Objectives Understanding various TTL Parameters Floating Inputs Worst-Case Input Voltages & Output Voltages Profiles and Windows Compatibility Sourcing and Sinking Noise Immunity Standard Loading and Loading

More information

Lecture Summary Module 1 Switching Algebra and CMOS Logic Gates

Lecture Summary Module 1 Switching Algebra and CMOS Logic Gates Lecture Summary Module 1 Switching Algebra and CMOS Logic Gates Learning Outcome: an ability to analyze and design CMOS logic gates Learning Objectives: 1-1. convert numbers from one base (radix) to another:

More information

The entire range of digital ICs is fabricated using either bipolar devices or MOS devices or a combination of the two. Bipolar Family DIODE LOGIC

The entire range of digital ICs is fabricated using either bipolar devices or MOS devices or a combination of the two. Bipolar Family DIODE LOGIC Course: B.Sc. Applied Physical Science (Computer Science) Year & Sem.: IInd Year, Sem - IIIrd Subject: Computer Science Paper No.: IX Paper Title: Computer System Architecture Lecture No.: 10 Lecture Title:

More information

Classification of Digital Circuits

Classification of Digital Circuits Classification of Digital Circuits Combinational logic circuits. Output depends only on present input. Sequential circuits. Output depends on present input and present state of the circuit. Combinational

More information

Lab Project #2: Small-Scale Integration Logic Circuits

Lab Project #2: Small-Scale Integration Logic Circuits Lab Project #2: Small-Scale Integration Logic Circuits Duration: 2 weeks Weeks of 1/31/05 2/7/05 1 Objectives The objectives of this laboratory project are to design some simple logic circuits using small-scale

More information

Exercise 1: EXCLUSIVE OR/NOR Gate Functions

Exercise 1: EXCLUSIVE OR/NOR Gate Functions EXCLUSIVE-OR/NOR Gates Digital Logic Fundamentals Exercise 1: EXCLUSIVE OR/NOR Gate Functions EXERCISE OBJECTIVE When you have completed this exercise, you will be able to demonstrate the operation of

More information

Schmitt Trigger Inputs, Decoders

Schmitt Trigger Inputs, Decoders Schmitt Trigger, Decoders Page 1 Schmitt Trigger Inputs, Decoders TTL Switching In this lab we study the switching of TTL devices. To do that we begin with a source that is unusual for logic circuits,

More information

Experiment # 2 The Voting Machine

Experiment # 2 The Voting Machine Experiment # 2 The Voting Machine 1. Synopsis: In this lab we will build a simple logic circuit of a voting machine using TTL gates using integrated circuits that contain one or more gates packaged inside.

More information

Department of EECS. University of California, Berkeley. Logic gates. September 1 st 2001

Department of EECS. University of California, Berkeley. Logic gates. September 1 st 2001 Department of EECS University of California, Berkeley Logic gates Bharathwaj Muthuswamy and W. G. Oldham September 1 st 2001 1. Introduction This lab introduces digital logic. You use commercially available

More information

Practice Homework Problems for Module 1

Practice Homework Problems for Module 1 Practice Homework Problems for Module 1 1. Unsigned base conversions (LO 1-1). (a) (2C9E) 16 to base 2 (b) (1101001) 2 to base 10 (c) (1101001) 2 to base 16 (d) (8576) 10 to base 16 (e) (A27F) 16 to base

More information

Physics 335 Lab 1 Intro to Digital Logic

Physics 335 Lab 1 Intro to Digital Logic Physics 33 Lab 1 Intro to Digital Logic We ll be introducing you to digital logic this quarter. Some things will be easier for you than analog, some things more difficult. Digital is an all together different

More information

Exercise 1: DC Operation of a NOT and an OR-TIE

Exercise 1: DC Operation of a NOT and an OR-TIE Open Collector and Other TTL Gates Digital Logic Fundamentals Exercise 1: DC Operation of a NOT and an OR-TIE EXERCISE OBJECTIVE When you have completed this exercise, you will be able to demonstrate the

More information

Exercise 2: Source and Sink Current

Exercise 2: Source and Sink Current Digital Logic Fundamentals Tri-State Output Exercise 2: Source and Sink Current EXERCISE OBJECTIVE When you have completed this exercise, you will be able to demonstrate how a tri-state buffer output can

More information

Basic Logic Circuits

Basic Logic Circuits Basic Logic Circuits Required knowledge Measurement of static characteristics of nonlinear circuits. Measurement of current consumption. Measurement of dynamic properties of electrical circuits. Definitions

More information

Use the fixed 5 volt supplies for your power in digital circuits, rather than the variable outputs.

Use the fixed 5 volt supplies for your power in digital circuits, rather than the variable outputs. Physics 33 Lab 1 Intro to Digital Logic We ll be introducing you to digital logic this quarter. Some things will be easier for you than analog, some things more difficult. Digital is an all together different

More information

In this experiment you will study the characteristics of a CMOS NAND gate.

In this experiment you will study the characteristics of a CMOS NAND gate. Introduction Be sure to print a copy of Experiment #12 and bring it with you to lab. There will not be any experiment copies available in the lab. Also bring graph paper (cm cm is best). Purpose In this

More information

EECE 143 Lecture 0: Intro to Digital Laboratory

EECE 143 Lecture 0: Intro to Digital Laboratory EECE 143 Lecture 0: Intro to Digital Laboratory Syllabus * Class Notes Laboratory Equipment Experiment 0 * Experiment 1 Introduction Instructor Information: Mr. J. Christopher Perez Room: Haggerty Engineering,

More information

Exercise 1: AND/NAND Logic Functions

Exercise 1: AND/NAND Logic Functions Exercise 1: AND/NAND Logic Functions EXERCISE OBJECTIVE When you have completed this exercise, you will be able to determine the operation of an AND and a NAND logic gate. You will verify your results

More information

Electronic Circuits EE359A

Electronic Circuits EE359A Electronic Circuits EE359A Bruce McNair B206 bmcnair@stevens.edu 201-216-5549 1 Memory and Advanced Digital Circuits - 2 Chapter 11 2 Figure 11.1 (a) Basic latch. (b) The latch with the feedback loop opened.

More information

Lecture 02: Logic Families. R.J. Harris & D.G. Bailey

Lecture 02: Logic Families. R.J. Harris & D.G. Bailey Lecture 02: Logic Families R.J. Harris & D.G. Bailey Objectives Show how diodes can be used to form logic gates (Diode logic). Explain the need for introducing transistors in the output (DTL and TTL).

More information

Exercise 2: OR/NOR Logic Functions

Exercise 2: OR/NOR Logic Functions Exercise 2: OR/NOR Logic Functions EXERCISE OBJECTIVE When you have completed this exercise, you will be able to determine the operation of an OR and a NOR logic gate. You will verify your results by generating

More information

Logic Families. A-PDF Split DEMO : Purchase from to remove the watermark. 5.1 Logic Families Significance and Types. 5.1.

Logic Families. A-PDF Split DEMO : Purchase from  to remove the watermark. 5.1 Logic Families Significance and Types. 5.1. A-PDF Split DEMO : Purchase from www.a-pdf.com to remove the watermark 5 Logic Families Digital integrated circuits are produced using several different circuit configurations and production technologies.

More information

Exercise 1: Tri-State Buffer Output Control

Exercise 1: Tri-State Buffer Output Control Exercise 1: Tri-State Buffer Output Control EXERCISE OBJECTIVE When you have completed this exercise, you will be able to demonstrate how the enable and data inputs control the output state of a tri-state

More information

Module-1: Logic Families Characteristics and Types. Table of Content

Module-1: Logic Families Characteristics and Types. Table of Content 1 Module-1: Logic Families Characteristics and Types Table of Content 1.1 Introduction 1.2 Logic families 1.3 Positive and Negative logic 1.4 Types of logic families 1.5 Characteristics of logic families

More information

DC Electrical Characteristics of MM74HC High-Speed CMOS Logic

DC Electrical Characteristics of MM74HC High-Speed CMOS Logic DC Electrical Characteristics of MM74HC High-Speed CMOS Logic The input and output characteristics of the MM74HC high-speed CMOS logic family were conceived to meet several basic goals. These goals are

More information

Microcontroller Systems. ELET 3232 Topic 13: Load Analysis

Microcontroller Systems. ELET 3232 Topic 13: Load Analysis Microcontroller Systems ELET 3232 Topic 13: Load Analysis 1 Objective To understand hardware constraints on embedded systems Define: Noise Margins Load Currents and Fanout Capacitive Loads Transmission

More information

ENG 100 Electric Circuits and Systems Lab 6: Introduction to Logic Circuits

ENG 100 Electric Circuits and Systems Lab 6: Introduction to Logic Circuits ENG 100 Electric Circuits and Systems Lab 6: Introduction to Logic Circuits Professor P. Hurst Lecture 5:10p 6:00p TR, Kleiber Hall Lab 2:10p 5:00p F, 2161 Kemper Hall LM741 Operational Amplifier Courtesy

More information

Code No: R Set No. 1

Code No: R Set No. 1 Code No: R05310402 Set No. 1 1. (a) What are the parameters that are necessary to define the electrical characteristics of CMOS circuits? Mention the typical values of a CMOS NAND gate. (b) Design a CMOS

More information

Low Power Hex ECL-to-TTL Translator

Low Power Hex ECL-to-TTL Translator Low Power Hex ECL-to-TTL Translator General Description The 100325 is a hex translator for converting F100K logic levels to TTL logic levels. Differential inputs allow each circuit to be used as an inverting,

More information

Logic Families. Describes Process used to implement devices Input and output structure of the device. Four general categories.

Logic Families. Describes Process used to implement devices Input and output structure of the device. Four general categories. Logic Families Characterizing Digital ICs Digital ICs characterized several ways Circuit Complexity Gives measure of number of transistors or gates Within single package Four general categories SSI - Small

More information

Digital logic families

Digital logic families Digital logic families Digital logic families Digital integrated circuits are classified not only by their complexity or logical operation, but also by the specific circuit technology to which they belong.

More information

Due date: Sunday, November 8 (midnight) Reading: HH sections , (pgs , )

Due date: Sunday, November 8 (midnight) Reading: HH sections , (pgs , ) Logic Gates Due date: Sunday, November 8 (midnight) Reading: HH sections 8.0 8., 8.0 8. (pgs. 7 9, 7 ) The next few labs will deal with digital logic. In practice, you will probably find these circuits

More information

Microprocessor-Compatible 12-Bit D/A Converter AD667*

Microprocessor-Compatible 12-Bit D/A Converter AD667* a FEATURES Complete 12-Bit D/A Function Double-Buffered Latch On Chip Output Amplifier High Stability Buried Zener Reference Single Chip Construction Monotonicity Guaranteed Over Temperature Linearity

More information

IC Logic Families and Characteristics. Dr. Mohammad Najim Abdullah

IC Logic Families and Characteristics. Dr. Mohammad Najim Abdullah IC Logic Families and Characteristics Introduction miniature, low-cost electronics circuits whose components are fabricated on a single, continuous piece of semiconductor material to perform a high-level

More information

QS54/74FCT373T, 2373T. High-Speed CMOS Bus Interface 8-Bit Latches MDSL QUALITY SEMICONDUCTOR, INC. 1 DECEMBER 28, 1998

QS54/74FCT373T, 2373T. High-Speed CMOS Bus Interface 8-Bit Latches MDSL QUALITY SEMICONDUCTOR, INC. 1 DECEMBER 28, 1998 Q QUALITY SEMICONDUCTOR, INC. QS54/74FCT373T, 2373T High-Speed CMOS Bus Interface 8-Bit Latches QS54/74FCT373T QS54/74FCT2373T FEATURES/BENEFITS Pin and function compatible to the 74F373 74FCT373 and 74ABT373

More information

ENGINEERING TRIPOS PART II A ELECTRICAL AND INFORMATION ENGINEERING TEACHING LABORATORY EXPERIMENT 3B2-B DIGITAL INTEGRATED CIRCUITS

ENGINEERING TRIPOS PART II A ELECTRICAL AND INFORMATION ENGINEERING TEACHING LABORATORY EXPERIMENT 3B2-B DIGITAL INTEGRATED CIRCUITS ENGINEERING TRIPOS PART II A ELECTRICAL AND INFORMATION ENGINEERING TEACHING LABORATORY EXPERIMENT 3B2-B DIGITAL INTEGRATED CIRCUITS OBJECTIVES : 1. To interpret data sheets supplied by the manufacturers

More information

+15 V 10k. !15 V Op amp as a simple comparator.

+15 V 10k. !15 V Op amp as a simple comparator. INDIANA UNIVESITY, DEPT. OF PHYSICS, P400/540 LABOATOY FALL 2008 Laboratory #7: Comparators, Oscillators, and Intro. to Digital Gates Goal: Learn how to use special-purpose op amps as comparators and Schmitt

More information

Electronics. Digital Electronics

Electronics. Digital Electronics Electronics Digital Electronics Introduction Unlike a linear, or analogue circuit which contains signals that are constantly changing from one value to another, such as amplitude or frequency, digital

More information

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS TECHNICAL DATA Quad 2-Input NAND Gate High-oltage Silicon-Gate CMOS The NAND gates provide the system designer with direct emplementation of the NAND function. Operating oltage Range:.0 to 18 Maximum input

More information

8-Bit A/D Converter AD673 REV. A FUNCTIONAL BLOCK DIAGRAM

8-Bit A/D Converter AD673 REV. A FUNCTIONAL BLOCK DIAGRAM a FEATURES Complete 8-Bit A/D Converter with Reference, Clock and Comparator 30 s Maximum Conversion Time Full 8- or 16-Bit Microprocessor Bus Interface Unipolar and Bipolar Inputs No Missing Codes Over

More information

Lab 7 (Hands-On Experiment): CMOS Inverter, NAND Gate, and NOR Gate

Lab 7 (Hands-On Experiment): CMOS Inverter, NAND Gate, and NOR Gate Lab 7 (Hands-On Experiment): CMOS Inverter, NAND Gate, and NOR Gate EECS 170LB, Wed. 5:00 PM TA: Elsharkasy, Wael Ryan Morrison Buu Truong Jonathan Lam 03/05/14 Introduction The purpose of this lab is

More information

P54FCT373/74fct373 OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS FEATURES DESCRIPTION. Function, Pinout and Drive Compatible with the FCT and F Logic

P54FCT373/74fct373 OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS FEATURES DESCRIPTION. Function, Pinout and Drive Compatible with the FCT and F Logic P54FCT373/74fct373 OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS FEATURES Function, Pinout and Drive Compatible with the FCT and F Logic FCT-A speed at 5.6ns max (MIL) Output levels compatible with TTL

More information

1 IC Logic Families and Characteristics

1 IC Logic Families and Characteristics 2141 Electronics and Instrumentation IC1 1 IC Logic Families and Characteristics 1.1 Introduction miniature, low-cost electronics circuits whose components are fabricated on a single, continuous piece

More information

IC Logic Families. Wen-Hung Liao, Ph.D. 5/16/2001

IC Logic Families. Wen-Hung Liao, Ph.D. 5/16/2001 IC Logic Families Wen-Hung Liao, Ph.D. 5/16/2001 Digital IC Terminology Voltage Parameters: V IH (min): high-level input voltage, the minimum voltage level required for a logic 1 at an input. V IL (max):

More information

HIGH LOW Astable multivibrators HIGH LOW 1:1

HIGH LOW Astable multivibrators HIGH LOW 1:1 1. Multivibrators A multivibrator circuit oscillates between a HIGH state and a LOW state producing a continuous output. Astable multivibrators generally have an even 50% duty cycle, that is that 50% of

More information

FAMILIARIZATION WITH DIGITAL PULSE AND MEASUREMENTS OF THE TRANSIENT TIMES

FAMILIARIZATION WITH DIGITAL PULSE AND MEASUREMENTS OF THE TRANSIENT TIMES EXPERIMENT 1 FAMILIARIZATION WITH DIGITAL PULSE AND MEASUREMENTS OF THE TRANSIENT TIMES REFERENCES Analysis and Design of Digital Integrated Circuits, Hodges and Jackson, pages 6-7 Experiments in Microprocessors

More information

DIGITAL ELECTRONICS: LOGIC AND CLOCKS

DIGITAL ELECTRONICS: LOGIC AND CLOCKS DIGITL ELECTRONICS: LOGIC ND CLOCKS L 9 INTRO: INTRODUCTION TO DISCRETE DIGITL LOGIC, MEMORY, ND CLOCKS GOLS In this experiment, we will learn about the most basic elements of digital electronics, from

More information

DM74ALS14 Hex Inverter with Schmitt Trigger Inputs

DM74ALS14 Hex Inverter with Schmitt Trigger Inputs DM74ALS14 Hex Inverter with Schmitt Trigger Inputs General Description This device contains six independent gates, each of which performs the logic INVERT function. Each input has hysteresis which increases

More information

P54FCT240/74fct240 INVERTING OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS FEATURES DESCRIPTION

P54FCT240/74fct240 INVERTING OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS FEATURES DESCRIPTION P54FCT240/74fct240 INVERTING OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS FEATURES Function, Pinout and Drive Compatible with the FCT and F Logic FCT-A speed at 5.1ns max (MIL) Output levels compatible

More information

DIGITAL ELECTRONICS. Digital Electronics - B1 28/04/ DDC Storey 1. Group B: Digital circuits and devices

DIGITAL ELECTRONICS. Digital Electronics - B1 28/04/ DDC Storey 1. Group B: Digital circuits and devices Politecnico di Torino - ICT school Group B: Digital circuits and devices DIGITAL ELECTRONICS B DIGITAL CIRCUITS B.1 Logic devices B1 B2 B3 B4 Logic families Combinatorial circuits Basic sequential circuits

More information

Microprocessor-Compatible 12-Bit D/A Converter AD767*

Microprocessor-Compatible 12-Bit D/A Converter AD767* a FEATURES Complete 12-Bit D/A Function On-Chip Output Amplifier High Stability Buried Zener Reference Fast 40 ns Write Pulse 0.3" Skinny DIP and PLCC Packages Single Chip Construction Monotonicity Guaranteed

More information

Chapter 6 Digital Circuit 6-6 Department of Mechanical Engineering

Chapter 6 Digital Circuit 6-6 Department of Mechanical Engineering MEMS1082 Chapter 6 Digital Circuit 6-6 TTL and CMOS ICs, TTL and CMOS output circuit When the upper transistor is forward biased and the bottom transistor is off, the output is high. The resistor, transistor,

More information

MM74HC132 Quad 2-Input NAND Schmitt Trigger

MM74HC132 Quad 2-Input NAND Schmitt Trigger Quad 2-Input NAND Schmitt Trigger General Description The utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability

More information

Lab 2 Revisited Exercise

Lab 2 Revisited Exercise Lab 2 Revisited Exercise +15V 100k 1K 2N2222 Wire up led display Note the ground leads LED orientation 6.091 IAP 2008 Lecture 3 1 Comparator, Oscillator +5 +15 1k 2 V- 7 6 Vin 3 V+ 4 V o Notice that power

More information

Fan in: The number of inputs of a logic gate can handle.

Fan in: The number of inputs of a logic gate can handle. Subject Code: 17333 Model Answer Page 1/ 29 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model

More information

TC4467 TC4468 LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 GENERAL DESCRIPTION FEATURES APPLICATIONS ORDERING INFORMATION

TC4467 TC4468 LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 GENERAL DESCRIPTION FEATURES APPLICATIONS ORDERING INFORMATION TC TC LOGIC-INPUT CMOS FEATURES High Peak Output Current....A Wide Operating Range.... to V Symmetrical Rise and Fall Times... nsec Short, Equal Delay Times... nsec Latchproof! Withstands ma Inductive

More information

Digital Circuits and Operational Characteristics

Digital Circuits and Operational Characteristics Digital Circuits and Operational Characteristics 1. DC Supply Voltage TTL based devices work with a dc supply of +5 Volts. TTL offers fast switching speed, immunity from damage due to electrostatic discharges.

More information

MM74HCU04 Hex Inverter

MM74HCU04 Hex Inverter MM74HCU04 Hex Inverter General Description The MM74HCU04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard

More information

P54FCT373T/74fct373T OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS FEATURES DESCRIPTION. Function, Pinout and Drive Compatible with the FCT and F Logic

P54FCT373T/74fct373T OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS FEATURES DESCRIPTION. Function, Pinout and Drive Compatible with the FCT and F Logic P54FCT373T/74fct373T OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS FEATURES Function, Pinout and Drive Compatible with the FCT and F Logic FCT-A speed at 5.6ns max (MIL) Reduced VOH (typically = 3.3 V)

More information

LM193/LM293/LM393/LM2903 Low Power Low Offset Voltage Dual Comparators

LM193/LM293/LM393/LM2903 Low Power Low Offset Voltage Dual Comparators Low Power Low Offset Voltage Dual Comparators General Description The LM193 series consists of two independent precision voltage comparators with an offset voltage specification as low as 2.0 mv max for

More information

Logic 0 Logic To provide an output load (or two) 5 Voltage Measurement Point V CC +5 74LS00 GND

Logic 0 Logic To provide an output load (or two) 5 Voltage Measurement Point V CC +5 74LS00 GND Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6.111 - Introductory Digital Systems Laboratory Laboratory 1 Logic Analyzers, Digital Oscilloscopes, and

More information

UT54LVDS032 Quad Receiver Advanced Data Sheet

UT54LVDS032 Quad Receiver Advanced Data Sheet Standard Products UT54LVDS032 Quad Receiver Advanced Data Sheet December 22,1999 FEATURES >155.5 Mbps (77.7 MHz) switching rates +340mV differential signaling 5 V power supply Ultra low power CMOS technology

More information

MIC4421/4422. Bipolar/CMOS/DMOS Process. General Description. Features. Applications. Functional Diagram. 9A-Peak Low-Side MOSFET Driver

MIC4421/4422. Bipolar/CMOS/DMOS Process. General Description. Features. Applications. Functional Diagram. 9A-Peak Low-Side MOSFET Driver 9A-Peak Low-Side MOSFET Driver Micrel Bipolar/CMOS/DMOS Process General Description MIC4421 and MIC4422 MOSFET drivers are rugged, efficient, and easy to use. The MIC4421 is an inverting driver, while

More information

Chapter 1: Digital logic

Chapter 1: Digital logic Chapter 1: Digital logic I. Overview In PHYS 252, you learned the essentials of circuit analysis, including the concepts of impedance, amplification, feedback and frequency analysis. Most of the circuits

More information

Lab #6: Op Amps, Part 1

Lab #6: Op Amps, Part 1 Fall 2013 EELE 250 Circuits, Devices, and Motors Lab #6: Op Amps, Part 1 Scope: Study basic Op-Amp circuits: voltage follower/buffer and the inverting configuration. Home preparation: Review Hambley chapter

More information

Philips Semiconductors Programmable Logic Devices

Philips Semiconductors Programmable Logic Devices DESCRIPTION The PLD is a high speed, combinatorial Programmable Logic Array. The Philips Semiconductors state-of-the-art Oxide Isolated Bipolar fabrication process is employed to produce maximum propagation

More information

74ACTQ821 Quiet Series 10-Bit D-Type Flip-Flop with 3-STATE Outputs

74ACTQ821 Quiet Series 10-Bit D-Type Flip-Flop with 3-STATE Outputs Quiet Series 10-Bit D-Type Flip-Flop with 3-STATE Outputs General Description The ACTQ821 is a 10-bit D-type flip-flop with non-inverting 3-STATE outputs arranged in a broadside pinout. The ACTQ821 utilizes

More information

1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e.

1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e. Name: Multiple Choice 1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e.) 8 2.) The output of an OR gate with

More information

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design PH-315 COMINATIONAL and SEUENTIAL LOGIC CIRCUITS Hardware implementation and software design A La Rosa I PURPOSE: To familiarize with combinational and sequential logic circuits Combinational circuits

More information

E85: Digital Design and Computer Architecture

E85: Digital Design and Computer Architecture E85: Digital Design and Computer Architecture Lab 1: Electrical Characteristics of Logic Gates Objective The purpose of this lab is to become comfortable with logic gates as physical objects, to interpret

More information

P54FCT244/74fct244 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS FEATURES DESCRIPTION. Function, Pinout and Drive Compatible with the FCT and F Logic

P54FCT244/74fct244 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS FEATURES DESCRIPTION. Function, Pinout and Drive Compatible with the FCT and F Logic P54FCT244/74fct244 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS FEATURES Function, Pinout and Drive Compatible with the FCT and F Logic FCT-A speed at 5.1ns max (MIL) Output levels compatible with TTL

More information

Type Ordering Code Package TLE 4226 G Q67000-A9118 P-DSO-24-3 (SMD) New type

Type Ordering Code Package TLE 4226 G Q67000-A9118 P-DSO-24-3 (SMD) New type Intelligent Sixfold -Side Switch TLE 4226 G Bipolar-IC Features Quad 50 outputs Dual 500 outputs Operating range S = 5 ± 5 % Output stages with power limiting Open-collector outputs Shorted load protected

More information

MAX15070A/MAX15070B 7A Sink, 3A Source, 12ns, SOT23 MOSFET Drivers

MAX15070A/MAX15070B 7A Sink, 3A Source, 12ns, SOT23 MOSFET Drivers General Description The /MAX15070B are high-speed MOSFET drivers capable of sinking 7A and sourcing 3A peak currents. The ICs, which are an enhancement over MAX5048 devices, have inverting and noninverting

More information

Course Outline Cover Page

Course Outline Cover Page College of Micronesia FSM P.O. Box 159 Kolonia, Pohnpei Course Outline Cover Page Digital Electronics I VEE 135 Course Title Department and Number Course Description: This course provides the students

More information

DS7830 Dual Differential Line Driver

DS7830 Dual Differential Line Driver DS7830 Dual Differential Line Driver General Description The DS7830 is a dual differential line driver that also performs the dual four-input NAND or dual four-input AND function. TTL (Transistor-Transistor-Logic)

More information

P54FCT240T/74fct240T FEATURES DESCRIPTION. Function, Pinout and Drive Compatible with the FCT and F Logic. ESD protection exceeds 2000V

P54FCT240T/74fct240T FEATURES DESCRIPTION. Function, Pinout and Drive Compatible with the FCT and F Logic. ESD protection exceeds 2000V P54FCT240T/74fct240T inverting OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS FEATURES Function, Pinout and Drive Compatible with the FCT and F Logic FCT-A speed at 5.1ns max (MIL) Reduced VOH (typically

More information

CD74HC123, CD74HCT123, CD74HC423, CD74HCT423

CD74HC123, CD74HCT123, CD74HC423, CD74HCT423 Data sheet acquired from Harris Semiconductor SCHS1 September 1997 CD7HC13, CD7HCT13, CD7HC3, CD7HCT3 High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets Features Description

More information

CD54HC273, CD74HC273, CD54HCT273, CD74HCT273

CD54HC273, CD74HC273, CD54HCT273, CD74HCT273 Data sheet acquired from Harris Semiconductor SCHS174B February 1998 - Revised May 2003 CD54HC273, CD74HC273, CD54HCT273, CD74HCT273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset [ /Title (CD74

More information

Basic Characteristics of Digital ICs

Basic Characteristics of Digital ICs ECEN202 Section 2 Characteristics of Digital IC s Part 1: Specification of characteristics An introductory look at digital IC s: Logic families Basic construction and operation Operating characteristics

More information

DM74ALS169B Synchronous Four-Bit Up/Down Counters

DM74ALS169B Synchronous Four-Bit Up/Down Counters Synchronous Four-Bit Up/Down Counters General Description These synchronous presettable counters feature an internal carry look ahead for cascading in high speed counting applications. The DM74ALS169B

More information

LM193/LM293/LM393/LM2903 Low Power Low Offset Voltage Dual Comparators

LM193/LM293/LM393/LM2903 Low Power Low Offset Voltage Dual Comparators LM193/LM293/LM393/LM2903 Low Power Low Offset Voltage Dual Comparators General Description The LM193 series consists of two independent precision voltage comparators with an offset voltage specification

More information

Lecture 7: Digital Logic

Lecture 7: Digital Logic Lecture 7: Digital Logic Last time we introduced the concept of digital electronics i.e., one identifies a range of voltages with the value, and another range with the value But we didn t specify these

More information

Exercise 1: Circuit Block Familiarization

Exercise 1: Circuit Block Familiarization Exercise 1: Circuit Block Familiarization EXERCISE OBJECTIVE When you have completed this exercise, you will be able to locate and identify the circuit blocks and components on the DIGITAL LOGIC FUNDAMENTALS

More information

Output Circuit of the TTL Gate

Output Circuit of the TTL Gate JFETs, G a As DEVICES A N D CIRC UITS, A N D TTL CIRC UITS 27 28 MICR OELECTR ONIC CIRCUITS SEDRA /SMITH 14.3 TRANSISTOR TRANSISTOR LOGIC (TTL OR T 2 L) For more than two decades (late 1960s to late 1980s)

More information

CD74HC534, CD74HCT534, CD74HC564, CD74HCT564

CD74HC534, CD74HCT534, CD74HC564, CD74HCT564 Data sheet acquired from Harris Semiconductor SCHS188 January 1998 CD74HC534, CD74HCT534, CD74HC564, CD74HCT564 High Speed CMOS Logic Octal D-Type Flip-Flop, Three-State Inverting Positive-Edge Triggered

More information

Multiplexer for Capacitive sensors

Multiplexer for Capacitive sensors DATASHEET Multiplexer for Capacitive sensors Multiplexer for Capacitive Sensors page 1/7 Features Very well suited for multiple-capacitance measurement Low-cost CMOS Low output impedance Rail-to-rail digital

More information

Tel: Fax:

Tel: Fax: B Tel: 78.39.4700 Fax: 78.46.33 SPECIFICATIONS (T A = +5 C, V+ = +5 V, V = V or 5 V, all voltages measured with respect to digital common, unless otherwise noted) AD57J AD57K AD57S Model Min Typ Max Min

More information

CLK_EN CLK_SEL. Q3 THIN QFN-EP** (4mm x 4mm) Maxim Integrated Products 1

CLK_EN CLK_SEL. Q3 THIN QFN-EP** (4mm x 4mm) Maxim Integrated Products 1 19-2575; Rev 0; 10/02 One-to-Four LVCMOS-to-LVPECL General Description The low-skew, low-jitter, clock and data driver distributes one of two single-ended LVCMOS inputs to four differential LVPECL outputs.

More information

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2013 SCHEME OF VALUATION

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2013 SCHEME OF VALUATION GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-03 SCHEME OF VALUATION Subject Code: 0 Subject: PART - A 0. What does the arrow mark indicate

More information

CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423

CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423 CD5/7HC13, CD5/7HCT13, CD7HC3, CD7HCT3 Data sheet acquired from Harris Semiconductor SCHS1A September 1997 - Revised May 000 High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets

More information

DS7830/DS8830 Dual Differential Line Driver

DS7830/DS8830 Dual Differential Line Driver DS7830/DS8830 Dual Differential Line Driver General Description The DS7830/DS8830 is a dual differential line driver that also performs the dual four-input NAND or dual four-input AND function. TTL (Transistor-Transistor-Logic)

More information

Number system: the system used to count discrete units is called number. Decimal system: the number system that contains 10 distinguished

Number system: the system used to count discrete units is called number. Decimal system: the number system that contains 10 distinguished Number system: the system used to count discrete units is called number system Decimal system: the number system that contains 10 distinguished symbols that is 0-9 or digits is called decimal system. As

More information

Propagation Delay, Circuit Timing & Adder Design. ECE 152A Winter 2012

Propagation Delay, Circuit Timing & Adder Design. ECE 152A Winter 2012 Propagation Delay, Circuit Timing & Adder Design ECE 152A Winter 2012 Reading Assignment Brown and Vranesic 2 Introduction to Logic Circuits 2.9 Introduction to CAD Tools 2.9.1 Design Entry 2.9.2 Synthesis

More information

Propagation Delay, Circuit Timing & Adder Design

Propagation Delay, Circuit Timing & Adder Design Propagation Delay, Circuit Timing & Adder Design ECE 152A Winter 2012 Reading Assignment Brown and Vranesic 2 Introduction to Logic Circuits 2.9 Introduction to CAD Tools 2.9.1 Design Entry 2.9.2 Synthesis

More information

CD54HC4538, CD74HC4538, CD74HCT4538

CD54HC4538, CD74HC4538, CD74HCT4538 Data sheet acquired from Harris Semiconductor SCHS123 June 1998 CD54HC4538, CD74HC4538, CD74HCT4538 High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrator Features Description [ /Title

More information

User's Manual PFCU-4. Filter Set & Relay Control Unit

User's Manual PFCU-4. Filter Set & Relay Control Unit User's Manual PFCU- Filter Set & Relay Control Unit X-ray Instrumentation Associates 00 Mills Street Menlo Park, CA 90-0 ()--779 February, 99 Contents: I: Warranty and Registration Card... A: Our guarantee

More information

R & D Electronics DIGITAL IC TRAINER. Model : DE-150. Feature: Object: Specification:

R & D Electronics DIGITAL IC TRAINER. Model : DE-150. Feature: Object: Specification: DIGITAL IC TRAINER Model : DE-150 Object: To Study the Operation of Digital Logic ICs TTL and CMOS. To Study the All Gates, Flip-Flops, Counters etc. To Study the both the basic and advance digital electronics

More information

DM74AS169A Synchronous 4-Bit Binary Up/Down Counter

DM74AS169A Synchronous 4-Bit Binary Up/Down Counter Synchronous 4-Bit Binary Up/Down Counter General Description These synchronous presettable counters feature an internal carry look ahead for cascading in high speed counting applications. The DM74AS169

More information