IRG4BC10SD-SPbF IRG4BC10SD-LPbF

Transcription

1 INSULATED GATE BIPOLAR TRANSISTOR WITH ULTRAFAST SOFT RECOVERY DIODE Features Extremely low voltage drop 2A S-Series: Minimizes power dissipation at up to 3 KHz PWM frequency in inverter drives, up to 4 KHz in brushless DC drives. Very Tight Vce(on) distribution IGBT co-packaged with HEXFRED TM ultrafast, ultra-soft-recovery anti-parallel diodes for use in bridge configurations Industry standard D 2 Pak & TO-262 packages Lead-Free Benefits Generation 4 IGBT's offer highest efficiencies available IGBT's optimized for specific application conditions HEXFRED diodes optimized for performance with IGBT's. Minimized recovery characteristics require less/no snubbing Lower losses than MOSFET's conduction and Diode losses Absolute Maximum Ratings IRG4BCSD-SPbF IRG4BCSD-LPbF Parameter Min. Typ. Max. Units R θjc Junction-to-Case - IGBT 3.3 R θjc Junction-to-Case - Diode 7.0 C/W R θcs Case-to-Sink, flat, greased surface 0.50 R θja Junction-to-Ambient, typical socket mount 80 R θja Junction-to-Ambient (PCB Mount, steady state) 40 Wt Weight 2.0(0.07) g (oz) 1 G C E n-channel Standard Speed CoPack IGBT V CES = 600V V CE(on) typ. = GE = 15V, I C = 2.0A Parameter Max. Units V CES Collector-to-Emitter Voltage 600 V I T C = 25 C Continuous Collector Current 14 I T C = 0 C Continuous Collector Current 8.0 I CM Pulsed Collector Current 18 A I LM Clamped Inductive Load Current 18 I T C = 0 C Diode Continuous Forward Current 4.0 I FM Diode Maximum Forward Current 18 V GE Gate-to-Emitter Voltage ± 20 V P T C = 25 C Maximum Power Dissipation 38 P T C = 0 C Maximum Power Dissipation 15 W T J Operating Junction and -55 to +150 T STG Storage Temperature Range C Soldering Temperature, for sec. 300 (0.063 in. (1.6mm) from case) Thermal Resistance D 2 Pak IRG4BCSD-S PD TO-262 IRG4BCSD-L 08/27/04

2 Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)CES Collector-to-Emitter Breakdown Voltageƒ 600 V V GE = 0V, I C = 250µA V (BR)CES/ T J Temperature Coeff. of Breakdown Voltage 0.64 V/ C V GE = 0V, I C = 1.0mA V CE(on) Collector-to-Emitter Saturation Voltage I C = 8.0A V GE = 15V 2.05 V I C = 14.0A See Fig. 2, I C = 8.0A, T J = 150 C V GE(th) Gate Threshold Voltage V CE = V GE, I C = 250µA V GE(th) / T J Temperature Coeff. of Threshold Voltage -9.5 mv/ C V CE = V GE, I C = 250µA g fe Forward Transconductance S V CE = 0V, I C =8.0A I CES Zero Gate Voltage Collector Current 250 µa V GE = 0V, V CE = 600V 00 V GE = 0V, V CE = 600V, T J = 150 C V FM Diode Forward Voltage Drop V I C =4.0A See Fig I C =4.0A, T J = 150 C I GES Gate-to-Emitter Leakage Current ±0 na V GE = ±20V Switching T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions Q g Total Gate Charge (turn-on) I C = 8.0A Qge Gate - Emitter Charge (turn-on) nc V CC = 400V See Fig. 8 Q gc Gate - Collector Charge (turn-on) V GE = 15V t d(on) Turn-On Delay Time 76 T J = 25 C t r Rise Time 32 ns I C = 8.0A, V CC = 480V t d(off) Turn-Off Delay Time V GE = 15V, R G = 0Ω t f Fall Time Energy losses include "tail" and E on Turn-On Switching Loss 0.31 diode reverse recovery. E off Turn-Off Switching Loss 3.28 mj See Fig. 9,, 18 E ts Total Switching Loss E ts Total Switching Loss mj I C = 5.0A t d(on) Turn-On Delay Time 70 T J = 150 C, See Fig.,11, 18 t r Rise Time 36 ns I C = 8.0A, V CC = 480V t d(off) Turn-Off Delay Time 890 V GE = 15V, R G = 0Ω t f Fall Time 890 Energy losses include "tail" and E ts Total Switching Loss 3.83 mj diode reverse recovery. L E Internal Emitter Inductance 7.5 nh Measured 5mm from package C ies Input Capacitance 280 V GE = 0V C oes Output Capacitance 30 pf V CC = 30V See Fig. 7 C res Reverse Transfer Capacitance 4.0 ƒ = 1.0MHz t rr Diode Reverse Recovery Time ns T J = 25 C See Fig T J = 125 C 14 I F =4.0A I rr Diode Peak Reverse Recovery Current A T J = 25 C See Fig T J = 125 C 15 V R = 200V Q rr Diode Reverse Recovery Charge nc T J = 25 C See Fig T J = 125 C 16 di/dt = 200A/µs di (rec)m /dt Diode Peak Rate of Fall of Recovery 280 A/µs T J = 25 C See Fig. During t b 235 T J = 125 C 17 Details of note through are on the last page 2

3 Load Current ( A ) IRG4BCSD-S/LPbF % of rated voltage Duty cycle : 50% Tj = 125 C Tsink = 90 C Ta = 55 C Gate drive as specified Turn-on losses include effects of reverse recovery Power Dissipation = 9.2W for Heatsink Mount Power Dissipation = 1.8W for typical PCB socket Mount 4.0 Ideal diodes f, Frequency ( khz ) Fig. 1 - Typical Load Current vs. Frequency (Load Current = I RMS of fundamental) 0 0 I C, Collector Current (A) T J = 25 C T J = 150 C V GE = 15V 80µs PULSE WIDTH V CE, Collector-to-Emitter Voltage (V) I C, Collector-to-Emitter Current (A) T J = 150 C T J = 25 C V CC = 50V 5µs PULSE WIDTH V GE, Gate-to-Emitter Voltage (V) Fig. 2 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics 3

4 Maximum DC Collector Current(A) V CE, Collector-to-Emitter Voltage(V) V GE = 15V 80 us PULSE WIDTH I C = I C = I C = 16 A 8 A 4 A T C, Case Temperature ( C) T J, Junction Temperature ( C) Fig. 4 - Maximum Collector Current vs. Case Temperature Fig. 5 - Typical Collector-to-Emitter Voltage vs. Junction Temperature Thermal Response (Z thjc ) D = SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t Peak T J = PDM x Z thjc + TC t 1, Rectangular Pulse Duration (sec) PDM t1 t2 Fig. 6 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 4

5 C, Capacitance (pf) VGE = 0V, f = 1MHz Cies = Cge + Cgc, C ce Cres = Cgc Coes = Cce + Cgc C ies C oes C res SHORTED V GE, Gate-to-Emitter Voltage (V) V CC = 400V I C = 8A V CE, Collector-to-Emitter Voltage (V) Q G, Total Gate Charge (nc) Fig. 7 - Typical Capacitance vs. Collector-to-Emitter Voltage Fig. 8 - Typical Gate Charge vs. Gate-to-Emitter Voltage Total Switching Losses (mj) V CC = 480V V GE = 15V T = 25 J C I C = 8A Total Switching Losses (mj) 0 1 R G = 0Ω Ohm V GE = 15V V CC = 480V I C= I C= I C= 16A 8A 4A R GR G, Gate, Gate Resistance (Ohm) (Ω) T J, Junction Temperature ( C ) Fig. 9 - Typical Switching Losses vs. Gate Resistance Fig. - Typical Switching Losses vs. Junction Temperature 5

6 Total Switching Losses (mj) R G = 0 Ω T J = 150 C V CC = 480V V GE = 15V I C, Collector Current (A) 0 V GE = 20V o T J = 125 C I C, Collector Current (A) SAFE OPERATING AREA V CE, Collector-to-Emitter Voltage (V) Fig Typical Switching Losses vs. Collector Current 0 Fig Turn-Off SOA Instantaneous Forward Current ( A ) 1 T J = 150 C T = 125 C J T = 25 C J Forward Voltage Drop - V Forward Voltage Drop - V FM FM( V ) Fig Maximum Forward Voltage Drop vs. Instantaneous Forward Current 6 (V)

7 I F = 8.0A I F = 4.0A V R = 200V T J = 125 C T J = 25 C I F = 8.0A I F = 4.0A trr- (nc) 35 Irr- ( A) V R = 200V T J = 125 C T J = 25 C 0 00 di f /dt - (A/µs) Fig Typical Reverse Recovery vs. di f /dt di f /dt - (A/µs) Fig Typical Recovery Current vs. di f /dt 200 V R= 200V T J = 125 C T J = 25 C 00 V R = 200V T J = 125 C T J = 25 C 160 I F = 8.0A I F = 8.0A Qrr- (nc) I F = 4.0A di (rec) M/dt- (A /µs) I F = 4.0A di f /dt - (A/µs) Fig Typical Stored Charge vs. di f /dt di f /dt - (A/µs) Fig Typical di (rec)m /dt vs. di f /dt, A 7

8 Same type device as D.U.T. 80% of Vce 430µF D.U.T. 90% V ge % VC 90% t d(off) Fig. 18a - Test Circuit for Measurement of I LM, E on, E off(diode), t rr, Q rr, I rr, t d(on), t r, t d(off), t f I 5% % C t d(on) tr E on t f Eoff t=5µs E ts = (E on +E off ) Fig. 18b - Test Waveforms for Circuit of Fig. 18a, Defining E off, t d(off), t f % +Vg GATE VOLTAGE D.U.T. +Vg Ic trr trr Qrr id Ic dt dt = tx % Ic Vcc td(on) t1 Vce tr 90% Ic 5% Vce Ipk Ic t2 Eon = Vce ie Ic dt dt Vce t1 t2 DUT VOLTAGE AND CURRENT Vpk tx % Vcc Irr DIODE REVERSE RECOVERY ENERGY % Irr Vcc DIODE RECOVERY WAVEFORMS t4 Erec Vd id Ic dt dt = t3 t3 t4 Fig. 18c - Test Waveforms for Circuit of Fig. 18a, Fig. 18d - Test Waveforms for Circuit of Fig. 18a, Defining E on, t d(on), t Defining E r rec, t rr, Q rr, I rr 8

9 Vg GATE SIGNAL DEVICE UNDER TEST CURRENT D.U.T. VOLTAGE IN D.U.T. CURRENT IN D1 t0 t1 t2 Figure 18e. Macro Waveforms for Figure 18a's Test Circuit 00V L V * c D.U.T V R L = 480V 4 X I C 50V 6000µF 0V Figure 19. Clamped Inductive Load Test Circuit Figure 20. Pulsed Collector Current Test Circuit 9

10 D 2 Pak Package Outline Dimensions are shown in millimeters (inches) D 2 Pak Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" Note: "P" in assembly line position indicates "Lead-Free" OR INT ERNAT IONAL RECTIFIER LOGO ASSEMBLY LOT CODE F530S PART NUMBER DATE CODE YEAR 0 = 2000 WEEK 02 LINE L INTERNATIONAL RECTIFIER LOGO AS S E MBL Y LOT CODE F530S PART NUMBER DATE CODE P = DESIGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = AS S E MBL Y S ITE CODE

11 TO-262 Package Outline Dimensions are shown in millimeters (inches) IRG4BCSD-S/LPbF TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL33L LOT CODE 1789 AS SEMBLE D ON WW 19, 1997 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line position indicates "Lead-Free" OR INT ERNATIONAL RECT IFIER LOGO AS S EMBL Y LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE P = DES IGNATES LEAD-FREE PRODUCT (OPTIONAL) YE AR 7 = 1997 WEEK 19 A = ASSEMBLY SITE CODE 11

12 D 2 Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4. (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) (.0145) (.0135) FEED DIRECTION TRL 1.85 (.073) 1.65 (.065).90 (.429).70 (.421) (.457) (.449) 16. (.634) (.626) 1.75 (.069) 1.25 (.049) (.609) (.601) (.957) (.941) 4.72 (.136) 4.52 (.178) FEED DIRECTION (.532) (.504) (1.079) (.941) (14.173) MAX (2.362) MIN. NOTES : 1. COMFORMS TO EIA CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION HUB. 4. INCLUDES FLANGE OUTER EDGE (1.039) (.961) (1.197) MAX. 4 Notes: Repetitive rating: V GE =20V; pulse width limited by maximum junction temperature (figure 20) V CC =80%(V CES ), V GE =20V, L=µH, R G = 0W (figure 19) ƒpulse width 80µs; duty factor 0.1%. Pulse width 5.0µs, single shot. This only applies to TO-262 package. This applies to D 2 Pak, when mounted on 1" square PCB ( FR-4 or G- Material ). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) TAC Fax: (3) Visit us at for sales contact information.08/

13 Note: For the most current drawings please refer to the IR website at: