A 60GHz Sub-Sampling PLL Using A Dual-Step-Mixing ILFD
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1 A 60GHz Sub-Sampling PLL Using A Dual-Step-Mixing ILFD Teerachot Siriburanon, Tomohiro Ueno, Kento Kimura, Satoshi Kondo, Wei Deng, Kenichi Okada, and Akira Matsuzawa Tokyo Institute of Technology, Japan 2014 Asia-Pacific Microwave Conference
2 Outline 1 Background Issues and Previous Work Proposed 60GHz Frequency Synthesizer System Architecture 20GHz-to-5GHz Dual-Step-Mixing ILFD Experimental Results Conclusions
3 Requirements for 60GHz PLLs 2 RF front-end Analog/Digital BB 60GHz RX 60GHz I 60GHz Q 20GHz PLL VGA LPF VGA LPF ADC ADC Digital BB 60GHz TX 60GHz I LPF DAC Digital BB 60GHz Q LPF DAC Out-of-band phase to support 16QAM* In-band phase noise should be lowered depending on the bandwidth of carrier-recovery circuitry** *,** K. Okada, et al., JSSC 2013
4 Issues of mm-wave PLLs 3 20GHz VCO 8mW 23mW 60GHz QILO 36MHz PFD CP LPF 24.7mW 2 (27,28, 29,30) 5 2 CML 2 CML 58.32GHz, 60.48GHz, 62.64Ghz, 64.80GHz 14mW Low out-of-band phase noise by Injection Locking -96dBc/Hz at 1MHz at 61.56GHz Large power consumption (64mW for 20GHz) Does not support channel bonding and all standards Lower REF clk. required to support all standards (N )
5 PLL Noise Transfer Function 4 Φ ref,n i CP,n Φ VCO,n [Φ ref ] α 2π PFD I CP Charge Pump H(f) Loop Filter K vco jf VCO [Φ out ] 1 N For CP Noise; Divider Φ out i CP,n N K d G(s) 1+G(s) Φ out i CP,n 1 K d G(s) 1+G(s) (G(s) is open-loop transfer function) Divide ratio N is no longer contribute to CP/PFD output noise Useful in a system with large division ratio N X.Gao, et al., JSSC 2009
6 Proposed 60GHz Frequency Synthesizer 5 Sub-sampling Loop SEL 2 36MHz/ 40MHz REF 2 MUX2 Pulser SSPD CP 1 20GHz Class-C VCO LPF 60GHz QILO SEL 3 MUX 3 3 E n PFD with DZ Var CP 2 (54, ,56,57, 58,59,60) 5 MUX1 SEL 1 4 ILFD 58.32GHz, 59.40GHz, 60.48GHz, 61.56GHz, 62.64GHz, 63.72GHz, 64.80GHz Frequency Locked Loop (E n =1)/ Phase Locked Loop (E n =0) T. Siriburanon, et. al, RFIC 2014
7 20GHz PFD/CP PLL 6 SEL 2 36MHz/ 40MHz REF SEL 3 2 MUX 3 MUX2 3 E n Pulser SSPD PFD with DZ Var CP 2 (54, ,56,57, 58,59,60) 5 MUX1 SEL 1 CP 1 20GHz Class-C VCO LPF 4 ILFD 19.44GHz, 19.80GHz, 20.16GHz, 20.52GHz, 20.88GHz, 21.24GHz, 21.60GHz N CP ~1200 Frequency Locked Loop (E n =1)/ Phase Locked Loop (E n =0) PFD and CP 2 are enabled
8 20GHz Sub-sampling PLL 7 Sub-sampling Loop SEL 2 36MHz/ 40MHz REF SEL 3 2 MUX 3 MUX2 3 E n Pulser SSPD PFD with DZ Var SEL 1 CP 1 CP 2 20GHz Class-C VCO LPF 19.44GHz, 19.80GHz, 20.16GHz, 20.52GHz, 20.88GHz, 21.24GHz, 21.60GHz (54, ,56,57, 58,59,60) 5 MUX1 4 ILFD N ss ~20 Frequency Locked Loop (E n =1)/ Phase Locked Loop (E n =0) Dead zone in PFD, SSPD and CP 1 are enabled
9 Phase noise (dbc/hz) 20GHz SS-PLL Noise Modelling REF_Noise SSPD+CP+ LF noise VCO noise SSPLL PFD/CP PLL K 10K 100K 1M 10M Frequency (Hz)
10 High-speed Divider Chains 9 30GHz 60GHz 42 ILFD 15GHz 3 ILFD 5GHz Digital Dividers Large power Locking range mismatch 30GHz 20GHz 46 ILFD 5GHz Digital Dividers Narrow locking range A technique to increase locking range of highorder-division in ILFDs is necessary
11 Conv. Single-Step Injection ILFD 10 +A (f 0 o ) 0 o 180 o +INJ 45 o 225 o 90 o 270 o 135 o 315 o -A (f 180 o ) I core I core I core I core
12 Conv. Single-Step Injection ILFD 11 +A -A ILFD output (f o ) 0 2π time Input (2f o ) (direct divide-by-2) Input (4f o ) (direct divide-by-4) 0 2π 4π Disturbing injection in grey Constructive injection in black time time
13 Dual-Step Injection ILFD 12 0 o +A 45 o -B 90 o +C 135 o -D 180 o -A 225 o +B 270 o -C 315 o +D 2f 0 o 2f 90 o 2f 180 o 2f 270 o b a c -INJ I core +INJ (+4f o ) I core I core (-4f o ) I core d T. Siriburanon, et. al, ESSCIRC 2013
14 Dual-Step Injection ILFD 13 ILFD output (+f o,-f o ) Common node signal (+2f o,-2f o ) A -B +C -D a b c d π π 2π 2π 3π 4π 5π time time +INJ (+4f o ) -INJ (-4f o ) time Only constructive injections exist
15 Measured Locking Range Injection Power [dbm] 14 Can cover required range for 60GHz Applications (19-22GHz) Injection Frequency [GHz] 2.1mW 2.45mW 2.65mW
16 ILFD Performance Comparison 15 Features Div. Ratio Locking Range* (GHz) Locking Range* (%) Power (mw) Area (mm 2 ) [1] Direct mixing [2] Direct mixing [3] Direct mixing [4] LC Direct mixing (3 rd harmonic boosting) [5] CML + LC ILFD [6] Dual-Step Mixing This Work Dual-Step Mixing (with buffers) [1] A-SSCC 07 [2] RFIC 04 [3] ISSCC 06 [4] CICC 12 [5] MTT 11 [6] A-SSCC 11
17 0.8 mm 20GHz SS-PLL Measurement 16 Freq. (GHz) (15.3%) Frequencies (GHz) Ref. Spurs (dbc) 19.44, 19.80, 20.16, 20.52, 20.88, 21.24, f REF PN@1MHz(dBc/Hz) ~ -104 Ref. freq. (MHz) 36/40 (18/20) Out Power (dbm) 0 ~ -4 Total Power (mw) 20.2 Process 65nm CMOS 0.7 mm 20GHz Buffer 20GHz ILFD 20GHz Class-C LC-VCO Loop Filter Digital Circuits PFD+DZ CP1 SSPD CP2 20GHz SS-PLL
18 Schematic of 60GHz QILO 17 K. Okada, et al., JSSC GHz Quadrature Injection-Locked Oscillator
19 60GHz QILO Measurement Summary 1.0 mm mm Process Supply Voltage (V) Tuning Range (GHz) 65nm CMOS P DC (mw) 14.0 INJ+ INJ- I+ I- ILO Buffer ILO Core Output Power (dbm) ILO Buffer Q+ Q- 60GHz QILO
20 Phase Noise Characteristics At a carrier frequency of 62.64GHz 19
21 Performance Comparison 20 Ref. REF Freq. (MHz) Frequency (GHz) Phase offset Phase offset Features Power (mw) [1] dbc/hz -108 dbc/hz Direct 60GHz QPLL 78 [2] dbc/hz -112 dbc/hz 30GHz PLL + Coupler 76 [3] dbc/hz -109 dbc/hz 60GHz AD-PLL 48 [4] dbc/hz -108 dbc/hz 60GHz SS-QPLL 42 [5] dbc/hz -117 dbc/hz This Work (normal) This (SS) 18/ dbc/hz -115 dbc/hz 18/ dbc/hz -115 dbc/hz Sub-harmonic Injection 20GHz PLL + 60GHz QILO 72 Sub-harmonic Injection 20GHz PLL + 60GHz QILO 32.8 Sub-harmonic Injection 20GHz SS-PLL + 60GHz QILO [1] K. Scheir, et al., ISSCC 2009 [2] C. Marcu, et al., JSSC 2009 [3] W. Wu, et al., ISSCC 2013 [4] V. Szortyka, et al., ISSCC 2014 [5] W. Deng, et al., JSSC
22 Conclusion 21 Low in-band and out-band phase noise have been achieved through sub-sampling and sub-harmonic injection-locked techniques, respectively With an assist of a low-power Dual-Step- Mixing ILFD, the proposed 60GHz SS-PLL achieves low power consumption while maintaining good phase noise performance
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