20 GHz Low Power QVCO and De-skew Techniques in 0.13µm Digital CMOS. Masum Hossain & Tony Chan Carusone University of Toronto

Transcription

1 20 GHz Low Power QVCO and De-skew Techniques in 0.13µm Digital CMOS Masum Hossain & Tony Chan Carusone University of Toronto

2 Motivation Data Rx3 Rx2 D-FF D-FF Rx1 D-FF Clock Clock Deskew Clock Deskew Deskew Shared Clock Source f ref PD LPF 1

3 Motivation Data Rx3 Rx2 D-FF D-FF Rx1 D-FF Clock Clock Deskew Clock Deskew Deskew Jitter Filter DCC (optional) Shared Clock Source Deskew 2

4 Outline Low power clock source in Digital CMOS Review of CMOS LC VCO topology Colpitts vs Cross-coupled Proposed VCO topology Experimental Results Low power clock deskew technique CMOS Review of existing deskew techniques Proposed deskew technique Experimental Results 3

5 Cross-Coupled VCO L R P C L -1 C var M 1 (g m ) 4

6 Colpitts VCO Conventional Colpitts Modified Colpitts L R P C L [Nguyen 92] R L C L L M 1 (g m ) M 1 (g m ) C 1 R P C 1 C var C var Decouples the tank from load 5

7 Colpitts VCO R L C L L L R P Z in C 1 M 1 (g m ) C var R P R = C eq g m 2 ω C1Cvar C1C = C + C 1 var var 6

8 Proposed VCO Cross-Coupled L R P C L Colpitts R L C L L R L C L L -1 M 2 (g m2 ) M 1 (g m ) M 1 C var (g m ) R C GS -1 C var R P C 1 C var M 1 (g m1 ) Less g m required f osc depends on C L More g m required f osc independent of C L 7

9 Proposed VCO L R L C L Y x L v C g m2 v GS 1 R L C L M 2 (g m2 ) i x R C GS C var C var v x -1 M 1 (g m1 ) R P (-1/g m1 ) 8

10 VCO Summary Frequency of Oscillation Minimum Required g m Cross- Coupled f osc ( ( )) 2π L C + C 1 = var L 1 R P Colpitts f osc = 2π L C 1C C + C 1 var var 1 4 R P Proposed VCO f osc = 2π L C C GS GS C + C var var 1 1 C var g m 2 R P C GS Proposed oscillator combines the benefit of both topology! 9

11 QVCO Implementation To scope Off-chip 50-ohm term. V DD = 1.2 V On die 300 um T. Line 50-ohm V bias 50-ohm M 2 C- C+ C- C+ In+ C- C+ In- I-VCO In+ In- Q-VCO In+ In- M 1 M C 10

12 QVCO Implementation 650 um 90 o 400 um 270 o 0 o 180 o Metal Dummy Fill 11

13 QVCO Performance Frequency (GHz) V control (V) Pout (dbm) Tuning range 2.4 GHz (~12%) 12

14 QVCO Performance Frequency (GHz) V control (V) Pout (dbm) 13

15 QVCO Performance Frequency (GHz) V control (V) Pout (dbm) Cable loss was de-embedded 14

16 Phase Noise(dBc/Hz) 1 MHz offset) QVCO Performance Frequency (GHz) Pout (dbm) Phase Noise = log 10 (RBW) = dbc/hz 15

17 Phase Noise(dBc/Hz) 1 MHz offset) QVCO Performance P DC =20 mw P DC =30 mw Frequency (GHz) Phase Noise = log 10 (RBW) = dbc/hz 16

18 Performance Comparison CSICS 06 CSICS 06 JSSC 07 JSSC 04 VLSI 05 This work Technology 90-nm CMOS 90-nm CMOS 0.13-um CMOS 0.13-um CMOS 90-nm SOI 0.13-um CMOS Frequency 10 GHz 10 GHz 26 GHz 10 GHz 40 GHz 20 GHz Topology Colpitts Cross- Coupled G m Tuned Cross- Coupled Cross- Coupled Cross- Coupled Diff./Quadrature Diff. Diff. Diff. Quad. Quad. Quad. Tuning Range 12.2 % 15.8 % 23.6 % 15% 12.5 % 12 % Inductor Q Phase Noise (dbc/hz@1 MHz) MHz VCO power VCO+ Buffer 36 mw 7.5 mw 17.5 mw 43.6 mw 50 mw 14.4 mw mw mW FOM (VCO) (db) (VCO+ Buffer)

19 Deskew Techniques Mux/Interpolator 2f 0 T-FF f inj θ inj V control θ out -θ inj θ out 90 o 0 o 90 o [Maneatis 96] deskew Moderate power Supply Noise Duty Cycle Dis. All pass JTF 0 o [ Takauchi 03 Kromer 06] deskew Simple architecture Uses 2f 0 or 4 phase Non-linearity All pass JTF f osc -f inj [Zhang 06 O mahony 08] Less supply noise Less DCD Low pass JTF Low power Limited deskew (<360) Non-linearity Skew dependent JTF 18

20 Passive Injection Technique V INJ V INJ L R L R

21 ILO based deskew I INJ θ inj L M 2 V OUT (g m2 ) θ out R -1 I OSC θ osc M 1 (g m1 ) 20

22 ILO based deskew (K=0.1) 100 Deskew (deg.) Deskewed clock mv 0-50 Simulated [k=0.1] Measured [k=0.1] f osc (GHz) 4.5 X Clock amplification Less than 10% amplitude variation 12 mw power consumption Deskew << 180 o 50 mv 21

23 ILO based deskew (K=0.2) Deskew (deg.) K=0.2 K=0.1 Sim. Sim. Meas. Meas f osc (GHz) 2.25 X Clock amplification More than 30% amplitude variation 12 mw power consumption Deskew range increases but non-linear 100 mv 22

24 Jitter Transfer Function Input clock Spectrum Analyzer Output clock VCO Jitter TF Input Jitter TF V control f highpass Freq. f lowpass Freq RBW = 100 khz 10 db 5 MHz K=0.02 K=0.1 Output clock Input clock 19 GHz 23

25 Jitter Transfer Function Input clock Spectrum Analyzer Output clock VCO Jitter TF Higher K Input Jitter TF Higher K V control Freq. Freq RBW = 100 khz 10 db 5 MHz K=0.02 K=0.2 Output clock Input clock 19 GHz 24

26 Jitter of Deskewed Clock Sim. Meas dbc/hz (Ref. VCO) -107 dbc/hz (20 o ) -110 dbc/hz (0 o ) 25

27 Jitter of Deskewed Clock Sim. Meas dbc/hz (Ref. VCO) -99 dbc/hz (90 o ) -110 dbc/hz (0 o ) 26

28 Summary: ILO Based Deskew Deskew (deg.) Nonlinear Region Linear Region Sim. Meas f osc (GHz) Nonlinear Region Linear Region (deskew< 50 o ) Amplitude variation <10% Linear phase steps 12 db jitter 0 o 9 +/- 25 o Nonlinear Region (deskew> 50 o ) Amplitude variation >20% Non-linear phase steps No jitter reduction at 90 o Motivation: Achieve o deskew range using only the linear region 27

29 Proposed Deskew Technique θ out I-VCO V control Q-VCO θ out VCO V control θ inj Binary Selection [1/0] θ inj θ out -θ inj A θ out -θ inj f osc -f inj f osc -f inj B 28

30 Proposed Deskew Technique θ out I-VCO V control Q-VCO θ out VCO V control θ inj Binary Selection [1/0] θ inj θ out -θ inj A θ out -θ inj C 90 o B f osc -f inj f osc -f inj D 29

31 Proposed Deskew Technique θ out I-VCO V control Q-VCO K=.125 Clock Amp=11.48 db θ inj Binary Selection [1/0] Deskew (deg.) Sim. Meas f osc (GHz) 30

32 Proposed Deskew Technique θ out I-VCO V control Q-VCO K=.125 Clock Amp=11.48 db Less Amplitude variation 200 θ inj Binary Selection [1/0] Deskew (deg.) I-VCO Q-VCO f osc (GHz) 31

33 Proposed Deskew Technique θ out V control I-VCO Q-VCO 200 θ inj Binary Selection [1/0] Deskew (deg.) B I-VCO Q-VCO A f osc (GHz) 32

34 Proposed Deskew Technique θ out V control I-VCO Q-VCO DCB A 200 θ inj Binary Selection [1/0] Deskew (deg.) B D I-VCO Q-VCO A C f osc (GHz) 33

35 Proposed Deskew Technique Deskew (deg.) 200 I-VCO 100 E B 0 F D -100 Q-VCO A C -98 dbc/hz (Ref. VCO) F (-109 dbc/hz) E(-108 dbc/hz) f osc (GHz) 34

36 Proposed Deskew Technique Deskew (deg.) 200 I-VCO 100 E B 0 F D -100 Q-VCO A C -98 dbc/hz (Ref. VCO) D (-104 dbc/hz) B (-105 dbc/hz) f osc (GHz) 35

37 Comparison and Summary Phase Noise(dBc/Hz) 1 MHz offset) Using Q VCO Using Diff VCO Deskew (deg.) We have introduced: Low power Q-VCO topology for high-speed applications Utilize the QVCO based Deskew technique with inherent clock amplification and jitter filtering 36

38 Acknowledgements Intel Circuit Research Lab: F. O Mahony, M. Mansuri & B. Casper for their contribution in clock deskew technique presented in this work Gennum Corporation: For providing design & fabrication facilities 37

39 Backup Slide: Calibration Trigger Source Channel 3 Channel 3 Delay Channel 4 Delay Channel 4 30 mv 10 ps 39

40 Backup Slide: Additional Verification The same technique is also applicable with quadrature ring oscillator 40