A 20GHz Class-C VCO Using Noise Sensitivity Mitigation Technique

Transcription

1 Matsuzawa Lab. Matsuzawa & Okada Lab. Tokyo Institute of Technology A 20GHz Class-C VCO Using Noise Sensitivity Mitigation Technique Kento Kimura, Kenichi Okada and Akira Matsuzawa (WE2C-2) Matsuzawa & Okada Lab. Tokyo Institute of Technology, Japan Slide 1

2 Outline Background Class-C VCO PN Degradation on Class-C VCO AM-PM Conversion Parasitic Cap Variation Proposed AM-PM Conversion Cancellation C GS curve C SB curve Conclusion Slide 2

3 Background 60GHz CMOS Transceiver IC Local Oscillator using Injection-Locking Lower phase noise than direct 60GHz generation 20GHz VCO Requirement 1. Quite low noise 2. High power efficiency ref. PFD CP LPF Divider 20GHz PLL 60GHz QILO [1]K. Okada, et al., ISSCC 2011 Slide 3

4 VCO Performance Phase Noise Theory in LC-Tank Oscillator PN = 10log 10 P noise P sig 2Fk B T ω 0 = 10log 10 ( ) 2 P sig 2Qω offset PE = P sig P DC = I sig I DC V sig V DC should maximize Power Efficiency in LC-Tank Oscillator should be close to 1 Slide 4

5 LC-based VCO High Spectral Purity High Q-factor Low Power Efficiency V ds V gs Square current waveform I sig I DC = 2 π Slide 5

6 Class-C VCO[2] [2] A. Mazzanti, et al., JSSC 2008 High Current Efficiency Sinusoidal waveform Tr keeps in saturation region I sig I DC = 1 Slide 6

7 W [um] Class-C VCO[2] Maximum Amplitude is limited V sig < V DD + V TH V GBIAS 2 V sig V DC should be close to 1 Maximize V sig smaller V GBIAS larger Tr is necessary for robust oscillation Vgbias [V] Slide 7

8 Parasitic C [ff] Cross-Coupled Pair Non-Negligible Parasitic Capacitances Cgs Cgd 50 Cgb Cdb C CCTr V GS C GS V GS Vgs [V] C GS causes random frequency variation AM-PM Conversion like a varactor Slide 8

9 V GBIAS noise Noise Sources - Resistors for DC-bias - Adaptive Bias Circuits[3] ensure robust start-up large V GBIAS variation f = f V GBIAS V GBIAS [3] W.Deng, et al., JSSC 2013 Slide 9

10 Phase Noise [dbc/hz] K VGBIAS = AM-PM Conversion ω 0 V GBIAS = ω 0 C PN AM PM = 10log C V GBIAS = ω 0 C 1 4 V noise K VGBIAS 2ω offset C GS V GBIAS 2 with AM-PM without AM-PM Simulation Vgbias [V] Slide 10

11 C of X-Couple Pair [ff] Design Concept Is it possible to mitigate K VGBIAS around V TH? Large KVgbias Small Kvgbias Large Variation Small Variation Vgbias [V] Slide 11

12 Proposed Circuit Resistive Joint on 2 legs of Cross-Coupled Pair Enable to Mitigate K VGBIAS Slide 12

13 Mechanism Conventional Proposed Shorted here Z, C SB and C TAIL have to be taken in consideration Slide 13

14 Mechanism Independent of Z C GD, C DB, C GB dependent on Z C GS, C SB C GS, C SB contribution should be re-considered Slide 14

15 Coefficient Cgs [ff] Mechanism-C GS C GS_prop = 1 g m 2 + ω 2 C GS (C GS + C TAIL ) C 2 GS_conv 1 + ω Z 2 (C GS + C TAIL ) R=0 R=30 R=60 R= Z [Ohm] Vgbias [V] C GS steep can be more moderate Slide 15

16 Csb [ff] Mechanism-C SB C SB can be seen as negative cap[4] Inversion from gate to drain cross connection 1 Z + g m g m ω 2 (C GS + C TAIL ) 2 C SB R=0 R=30 R=60 R= Vgbias [V] [4] L. Fanori, et al., JSSC 2010 Slide 16

17 Cross-Coupled Capacitance [ff] Dependence to V GBIAS Z make C GS steep more moderate C SB generate negative steep Frequency Sensitivity Zero point Conventional R=30 R=60 R= Vgbias [V] Slide 17

18 Measured Phase Noise Phase Noise improves 3dB when Z = 60Ω. Slide 18

19 Chip Die Photo 65nm CMOS Process VCO Core : 0.057[mm 2 ] Tail Impedance Slide 19

20 20GHz band Comparison Ref [dbc/hz] Freq [GHz] Power [mw] FoM [dbc/hz] Topology (LC-only) [5] push-push [6] PMOS [7] Colpitts [8] This Work Tail Capacitive Feedback Class-C with NSM FoM = PN 20 log 10 f center f offset + 10 log 10 P DC 1mW Slide 20

21 Conclusion AM-PM Conversion on the cross-coupled pair can be cancelled in proposed circuit. It improve phase noise performance by 3dB and achieve best Figure of Merit among 20GHz Oscillators. Slide 21

22 References-1 [1] K. Okada, et al., A 60 GHz 6QAM/8PSK/QPSK/BPSK directconversion transceiver for IEEE c, in 2011 IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2011, pp [2] A. Mazzanti, et al., Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise, IEEE Journal of Solid-State Circuits, vol.43, No.12, pp , Dec [3] W. Deng, et al., Class-C VCO With Amplitude Feedback Loop for Robust Start-Up and Enhanced Oscillation Swing, IEEE Journal of Solid-State Circuits, vol.48, No.2, pp , Feb [4] L. Fanori, et al., Capacitive Degeneration in LC-Tank Oscillator for DCO Fine-Frequency Tuning, IEEE Journal of Solid-State Circuits, vol.45, no.12, pp , Dec Slide 22

23 References-2 [5] R. Molave, et al., A 27-GHz Low-Power Push-Push LC VCO with Wide Tuning Range in 65nm CMOS, IEEE Int. Symp. Circuits and Systems, May 2011, pp [6] G. Zhu, et al., A Low-Power Wide-Band 20GHz VCO in 65nm CMOS, 5th Global Symposium on Millimeter Waves, May 2012, pp [7] W. Wang, et al., A 20GHz VCO and Frequency Doubler for W-band FMCW Radar Applications, IEEE Silicon Monolithic Integrated Circuits in RF Systems, Jan. 2014, pp [8] A. Musa, et al., A Low Phase Noise Quadrature Injection Locked Frequency Synthesizer for MM-Wave Applications, IEEE Journal of Solid-State Circuits, vol.46, no.11, pp , Nov Slide 23

24 Acknowledgement This work is partially supported by MIC, SCOPE, MEXT, STARC, STAR and VDEC in collaboration with Cadence Design Systems, Inc., Mentor Graphics, Inc., and Agilent Technologies Japan, Ltd. Slide 24