Michael S. McCorquodale, Ph.D. Founder and CTO, Mobius Microsystems, Inc.
|
|
- Randall Crawford
- 5 years ago
- Views:
Transcription
1 Self-Referenced, Trimmed and Compensated RF CMOS Harmonic Oscillators as Monolithic Frequency Generators Integrating Time Michael S. McCorquodale, Ph.D. Founder and CTO, Mobius Microsystems, Inc IEEE International Frequency Control Symposium Honolulu, HI Session B3L-A: Novel Oscillators and Modeling Tuesday, May 20, 2008
2 Outline A brief history of frequency synthesis Emerging integration technologies Self-referenced, trimmed and compensated RF CMOS harmonic (LC) oscillators (CHOs) Motivation and concepts Simplified architecture Published implementations Performance benchmarking Total frequency error Single sideband phase noise power spectral density Period and cycle-to-cycle timing jitter Conclusions Slide 2 of 41
3 A brief history of frequency synthesis Slide 3 of 41
4 A brief history of frequency synthesis Crystal oscillators (past present) 1880: piezoelectricity discovered by the Curies 1917: XTAL resonance explored by Langevin for SONAR 1919: frequency control using XTALs by Nicholson and Cady 1919 present: XOs proliferate Phase-locked frequency synthesizers (present) 1980s present: PLLs developed to allow for multiple and rational frequencies to be synthesized from one XTAL reference Degraded phase noise and jitter relative to fundamental mode XOs, but silicon integration becomes paramount Integrated frequency references (future?) Significant work toward realizing integrated frequency references begins a race to replace quartz 1990 s present: MEMS microresonators 2000 s present: CMOS harmonic oscillators (this work) Slide 4 of 41
5 Emerging integration technologies Slide 5 of 41
6 Emerging integration technologies Surface and bulk MEMS microresonators have emerged as possible replacement for quartz technology as a frequency reference Objective is integration: smaller form-factor, lower cost, etc. Integration may enable advanced timing or carrier synthesis architectures as references become free [Discera] [SiTime] Slide 6 of 41
7 Emerging integration technologies Fundamental challenges New process technology Hermetic packaging Relatively high freq. temperature coefficient (f TC ) Scaling resonator frequency Power handling High motional resistance complicates circuit design Nonlinear transduction incurs noise penalty Current MEMS-referenced implementations Low frequency MEMS resonator with fractional-n PLL where divider is dithered based on input of a temperature sensor for compensation of f TC Synthesizes frequencies in the 10 s of MHz band Slide 7 of 41
8 Self-referenced, trimmed and compensated RF CMOS harmonic (LC) oscillators (CHOs) Slide 8 of 41
9 CHOs: Motivation and concepts Achieve integration with a solid-state technology to realize monolithic timing references Leverage advances in RF CMOS Explore performance limits of CMOS oscillators Conceive an architecture to achieve: Low frequency error, low phase noise and low timing jitter Develop with an eye toward consumer timing Clock references for serial wire interfaces such as USB (±500ppm), S-ATA (±350ppm) and PCI (±300ppm) Here bit error rate (BER) is paramount and dominated by eye closure due to total frequency error and timing jitter Slide 9 of 41
10 CHOs: Motivation and concepts Measured eye-opening Specification template Period jitter determines the eye-opening and eye-opening determines the BER Commercial serial-wire interfaces have eye-opening specifications (USB test shown here) Slide 10 of 41
11 CHOs: Motivation and concepts Key concepts Far-from-carrier phase noise is the most significant contributor to timing jitter Linear frequency multiplication/division increases/decreases phase noise power quadratically Total timing error is dominated by jitter, not frequency error With these concepts is it possible to develop a monolithic low-q RF LC oscillator and achieve low timing jitter as well as low frequency error? Slide 11 of 41
12 CHOs: Motivation and concepts SSB phase noise PSD (dbc/hz) σ p = 8 N o sin 2 ω 0 o Po f m 2 πf m T o df m How does phase noise manifest into period jitter? σ p = RMS period jitter ω o = fundamental radian frequency T o = fundamental period f m = offset frequency from fundamental (N o /P o ) fm = phase noise at offset f m from fundamental sine square Offset from fundamental (Hz) Slide 12 of 41
13 CHOs: Motivation and concepts Consider 10MHz reference Peak at f m = ½ f o -50dB at 10kHz Period Jitter sin 2 (πf T o ) Integration Mask Offset Frequency (Hz) Linear to log x 10 6 Period Jitter sin 2 (πf T o ) Integration Mask Offset Frequency (Hz) Null at f o (f m = 0) Null at 2f o (f m = f o ) Close-to-carrier phase noise (<10kHz) is significantly attenuated when converting to period jitter Slide 13 of 41
14 CHOs: Motivation and concepts Visualizing frequency multiplication and division effects and the typical net performance degradation in a phase-locked loop relative to the reference Phase noise PSD (dbc/hz) Reference N N Close-to-carrier phase noise is attenuated and far-from carrier phase noise is amplified +20log 10 (N) -20log 10 (N) Phase noise PSD (dbc/hz) f m (Hz) XO/MEMS reference +10log 10 (N 2 ) PLL loop BW PLL VCO (unlocked) PLL output path Period jitter integration mask sin 2 (πf m T o ) f m (Hz) Slide 14 of 41
15 CHOs: Simplified architecture Free-run a CMOS RF LC oscillator near 1GHz Frequency divide by a large ratio Implement high-resolution process trimming Implement open-loop temperature compensation Implement closed-loop long-term drift stabilization Actively regulate the power supply Slide 15 of 41
16 2.5 High-swing pmos cascode bias CHOs: Simplified architecture v ac + _ C v (v ctrl (T)) compensates LCO over T C f [12:0] v bias Fixed thin film caps trim nominal frequency C f [12:0] Control loops mitigate drift Amplitude detector TR[12:0] MR[12:0] MR[12:0] TR[12:0] C v [5:0] C v [5:0] Common mode detector TC[5:0] TC[5:0] TC[5:0] TC[5:0] + _ v ctrl (T) v ctrl (T) v cmc Slide 16 of 41
17 CHOs: Simplified architecture 3.3 v BG v BG _ 3.3 Regulated supply via bandgap-referenced LDO Differential to single-ended converter, programmable divider and configurable output CHO D2S CLK I CTAT I PTAT + _ v ctrl (T) To trimming switches and programmable logic 96-bit MTP NVM I 2 C FLL SSCG NVM Control SDL SDA Programmable T-dependent compensating analog voltage Logic for I 2 C interface, trimming, spread-spectrum clock generation and NVM Slide 17 of 41
18 Recently published implementations 1500µm 400µm Config. Dividers Test Structures vctrl(t) Generator I2C, FLL, SSCG, NVM Control LDO I/O + ESD 2.5-to-3.3V Level Shift Bias 96-bit MTP NVM Michael S. McCorquodale, et al., A MHz Self-Referenced CMOS Clock Generator with 90ppm Total Frequency Error and Spread Spectrum Capability, IEEE Int. Solid State Circuits Conf. Dig. of Tech. Papers, San Francisco, CA History Emerging CHOs gm amplifier ftc cal. bus Bias POR ½ fo discrete calibration array CB<7:0> ftc open-loop temp. comp. A-MOS varactors D2S ½ fo discrete calibration array Cf [12:0] and M[12:0] 2 x Cv [5:0] and TC[5:0] Bias Generation & Distribution ftc open-loop temp. comp. A-MOS varactors I/O + ESD gm Amplifier, Amplitude and Common Mode Control Loops Band-Gap Reference 550µm 1500µm Cf [12:0] and M[12:0] Process Control Structures Frequency dividers Michael S. McCorquodale, et al., A Monolithic and Self-Referenced RF LC Clock Generator Compliant with USB 2.0, IEEE J. of Solid State Circuits, vol. 42, no. 2, Feb. 2007, pp Benchmarking Conclusions Slide 18 of 41
19 Performance benchmarking Slide 19 of 41
20 Performance benchmarking Existing (XO/XO-PLL) 24MHz 4-pin can crystal oscillator (XO) 24MHz 2-pin passive crystal-referenced phase-locked loop (XO-PLL) 12MHz 2-pin passive ceramic resonator + sustaining circuit Emerging (MEMS-PLL) 20MHz MEMS-referenced PLL (vendor #1) 12MHz MEMS-referenced PLL (vendor #2) This work (CHO) 12MHz, 1.536GHz LC-referenced CHO 12MHz, 960MHz LC-referenced CHO Benchmarks Total frequency inaccuracy (due to trimming, power supply and temp.) SSB phase noise PSD Period and cycle-to-cycle jitter Total timing error Slide 20 of 41
21 Total frequency inaccuracy δf /f o (ppm) Normalized frequency innacuracy, Best CHO performance in Si to date shown Typical production yield is ±150ppm CHO trim occurs at 35 C 24MHz XO 20MHz MEMS-PLL 12MHz MEMS-PLL 12MHz CHO VDD + 10% 12MHz CHO nominal VDD 12MHz CHO VDD -10% 12MHz Ceramic δf /f o (ppm) Normalized frequency innacuracy, Temperature ( C) Slide 21 of 41
22 Single sideband phase noise PSD 0 24MHz XO -20 SSB phase noise PSD, (N o /P o ) fm (dbc/hz) Offset frequency (Hz), f m (Hz) Slide 22 of 41
23 Single sideband phase noise PSD SSB phase noise PSD, (N o /P o ) fm (dbc/hz) MHz XO 12MHz Ceramic Oscillator Ceramic resonator is lower Q than XO so close-to-carrier phase noise is higher Offset frequency (Hz), f m (Hz) Slide 23 of 41
24 Single sideband phase noise PSD MHz XO 12MHz Ceramic Oscillator 24MHz XO-PLL SSB phase noise PSD, (N o /P o ) fm (dbc/hz) Outside PLL loop BW, phase noise tracks VCO (note PLL loop mult. is 1) Offset frequency (Hz), f m (Hz) Slide 24 of 41
25 Single sideband phase noise PSD MHz XO 12MHz Ceramic Oscillator 24MHz XO-PLL 12MHz MEMS-PLL SSB phase noise PSD, (N o /P o ) fm (dbc/hz) Offset frequency (Hz), f m (Hz) Slide 25 of 41
26 Single sideband phase noise PSD MHz XO 12MHz Ceramic Oscillator 24MHz XO-PLL 12MHz MEMS-PLL 20MHz MEMS-PLL SSB phase noise PSD, (N o /P o ) fm (dbc/hz) MEMS-PLL frequency multiplication increases phase noise inside PLL loop BW Outside PLL loop BW, phase noise tracks VCO Offset frequency (Hz), f m (Hz) Slide 26 of 41
27 Single sideband phase noise PSD SSB phase noise PSD, (N o /P o ) fm (dbc/hz) MHz XO 12MHz Ceramic Oscillator 24MHz XO-PLL 12MHz MEMS-PLL 20MHz MEMS-PLL 12MHz CHO Offset frequency (Hz), f m (Hz) Slide 27 of 41
28 Single sideband phase noise PSD SSB phase noise PSD, (N o /P o ) fm (dbc/hz) MHz XO 12MHz Ceramic Oscillator 24MHz XO-PLL 12MHz MEMS-PLL 20MHz MEMS-PLL 12MHz CHO 12MHz CHO Close-to-carrier phase noise is higher in CHO but comparable to MEMS-PLL CHOs have much lower far-from-carrier phase noise than PLLs Offset frequency (Hz), f m (Hz) Slide 28 of 41
29 Single sideband phase noise PSD SSB phase noise PSD, (N o /P o ) fm (dbc/hz) MHz XO 12MHz Ceramic Oscillator 24MHz XO-PLL 12MHz MEMS-PLL 20MHz MEMS-PLL 12MHz CHO 12MHz CHO Project onto sin 2 (πf m T o ) SSB phase noise PSD sin 2 (πf m T o ) (dbc/hz) From ~30kHz all PLL implementations are noisier than CHOs 24MHz XO 12MHz Ceramic Oscillator 24MHz XO-PLL 12MHz MEMS-PLL 20MHz MEMS-PLL 12MHz CHO 12MHz CHO Offset frequency (Hz), f m (Hz) Offset frequency (Hz), f m (Hz) Slide 29 of 41
30 Single sideband phase noise PSD SSB phase noise PSD sin 2 (πf m T o ) (dbc/hz) Visualize on linear scale 24MHz XO 12MHz Ceramic Oscillator 24MHz XO-PLL 12MHz MEMS-PLL 20MHz MEMS-PLL 12MHz CHO 12MHz CHO Offset frequency (Hz), f m (Hz) SSB phase noise PSD sin 2 (πf m T o ) (dbc/hz) CHO, XO and Ceramic Oscillator all exhibit similar far-from-carrier noise >15dB Projected CHO noise approaches XO noise but XO is at twice the frequency 24MHz XO 12MHz Ceramic Oscillator 24MHz XO-PLL MHz MEMS-PLL 20MHz MEMS-PLL 12MHz CHO 12MHz CHO Offset frequency (MHz), f m (Hz) Slide 30 of 41
31 Period and cycle-to-cycle jitter Phase noise measurements show that far-from-carrier phase noise is very similar for XO, ceramic oscillator and CHO Far-from-carrier phase noise for CHO appears lower than all implementations, except XO, due to higher power in LCO (but XO at double freq.) Theory predicts that these three implementations should exhibit similar period jitter and CHO should exhibit the lowest jitter Theory also predicts that the PLL implementations should exhibit comparatively higher period jitter Slide 31 of 41
32 Period and cycle-to-cycle jitter 24MHz XO σ p = 6.52ps rms σ cc = 11.48ps rms 24MHz XO-PLL σ p = 10.38ps rms σ cc = 18.89ps rms Ceramic oscillator and XO have similar jitter; 1x multiplier in PLL degraded jitter in XO-PLL 12MHz Ceramic σ p = 6.52ps rms σ cc = 11.01ps rms Slide 32 of 41
33 Period and cycle-to-cycle jitter Jitter for both implementations is much higher than XO and XO-PLL as expected 20MHz MEMS-PLL σ p = 12.16ps rms σ cc = 17.60ps rms 12MHz MEMS-PLL σ p = 36.40ps rms σ cc = 46.99ps rms Slide 33 of 41
34 Period and cycle-to-cycle jitter CHO has lowest jitter and is directly comparable to high-q XO because CHO has low far-from-carrier phase noise 12MHz CHO σ p = 6.41ps rms σ cc = 11.25ps rms 12MHz CHO σ p = 5.73ps rms σ cc = 9.32ps rms Slide 34 of 41
35 Period and cycle-to-cycle jitter MEMS-PLL is >6x higher CHO has the lowest jitter Slide 35 of 41
36 v Fractional total timing error Introduce the concept of the fractional total timing error, or the maximum error in any period due to frequency inaccuracy and jitter δt max To Maximum period error = T o δt max T o ( T ( ) ) o max δf fo + ασ p To Maximum jitter for a bounding cycle count Basically, consider the sum of the total frequency error AND the maximum period jitter as a metric which is relevant to eye closure t Ideal period Slide 36 of 41
37 This is the worst-case fractional period error and determines eye opening and BER Total timing error f o (MHz) max(δf/f o ) (ppm) max( f -1 ) (ps) σ p (ps) ασ p α = 14.1 (ps) max(δt/t o ) (ppm) ασ p /max(δt/t o ) (%) XO XO + PLL MEMS + PLL α = 14.1 is for cycles (a common specification) MEMS + PLL CHO CHO Slide 37 of 41
38 Period jitter summary A low-q LCO can achieve period jitter much lower than high-q implementations (including XOs and MEMS) by: Exploiting frequency division Exhibiting low far-from-carrier phase noise High-Q MEMS oscillators do not achieve low jitter and phase noise due to loop multiplication and PLL VCO A low-q LCO can be implemented in a standard solid state process technology and achieve period jitter performance directly comparable high-q oscillators Power dissipation in the CHO is comparable to the XO-PLL and MEMS-PLL implementations Slide 38 of 41
39 Conclusions Slide 39 of 41
40 Conclusions Self-referenced, trimmed and compensated RF CMOS harmonic oscillators (CHOs) were introduced as monolithic frequency generators realized entirely in a solid-state process technology CHO implementations were benchmarked against incumbent XOs/XO-PLLs and emerging MEMS-PLLs where it was shown that frequency error was comparable and period jitter was superior for the CHO CHOs are now entering the production phase Slide 40 of 41
41 Questions are welcome Slide 41 of 41
Self-Referenced, Trimmed and Compensated RF CMOS Harmonic Oscillators as Monolithic Frequency Generators
Self-Referenced, Trimmed and Compensated RF CMOS Harmonic Oscillators as Monolithic Frequency Generators Michael S. McCorquodale Mobius Microsystems, Inc. Sunnyvale, CA USA 9486 mccorquodale@mobiusmicro.com
More informationThe Race to Replace Quartz
The Race to Replace Quartz Michael S. McCorquodale, Ph.D. Founder and Chief Technical Officer, Mobius Microsystems, Inc. Berkeley Wireless Research Center, Berkeley, CA 12:30PM February 2, 2007 Overview
More informationThe Race to Replace Quartz
The Race to Replace Quartz Michael S. McCorquodale, Ph.D. Founder and Chief Technical Officer, Mobius Microsystems, Inc. University of Michigan, WIMS ERC Seminar Series 12:00PM ET April 5, 2007 Overview
More informationA History of the Development of CMOS Oscillators: The Dark Horse in Frequency Control
A History of the Development of CMOS Oscillators: The Dark Horse in Frequency Control M. S. McCorquodale and V. Gupta Silicon Frequency Control, Integrated Device Technology, Inc., Sunnyvale, CA 94085
More informationA Highly Stable CMOS Self-Compensated Oscillator (SCO) Based on an LC Tank Temperature Null Concept
A Highly Stable CMOS Self-Compensated Oscillator (SCO) Based on an LC Tank Null Concept A. Ahmed, B. Hanafi, S. Hosny, N. Sinoussi, A. Hamed, M. Samir, M. Essam, A. El-Kholy, M. Weheiba, A. Helmy Timing
More informationOn Modern and Historical Short-Term Frequency Stability Metrics for Frequency Sources
On Modern and Historical Short-Term Frequency Stability Metrics for Frequency Sources Michael S. McCorquodale Mobius Microsystems, Inc. Sunnyvale, CA USA 9486 mccorquodale@mobiusmicro.com Richard B. Brown
More informationA Low Area, Switched-Resistor Loop Filter Technique for Fractional-N Synthesizers Applied to a MEMS-based Programmable Oscillator
A Low Area, Switched-Resistor Loop Filter Technique for Fractional-N Synthesizers Applied to a MEMS-based Programmable Oscillator ISSCC 00, Session 3. M.H. Perrott, S. Pamarti, E. Hoffman, F.S. Lee, S.
More informationAdvances in Silicon Technology Enables Replacement of Quartz-Based Oscillators
Advances in Silicon Technology Enables Replacement of Quartz-Based Oscillators I. Introduction With a market size estimated at more than $650M and more than 1.4B crystal oscillators supplied annually [1],
More informationJitter Measurements using Phase Noise Techniques
Jitter Measurements using Phase Noise Techniques Agenda Jitter Review Time-Domain and Frequency-Domain Jitter Measurements Phase Noise Concept and Measurement Techniques Deriving Random and Deterministic
More informationSiTime University Turbo Seminar Series. December 2012 Reliability & Resilience
SiTime University Turbo Seminar Series December 2012 Reliability & Resilience Agenda SiTime s Silicon MEMS Oscillator Construction Built for High Volume Mass Production Best Electro Magnetic Susceptibility
More informationINC. MICROWAVE. A Spectrum Control Business
DRO Selection Guide DIELECTRIC RESONATOR OSCILLATORS Model Number Frequency Free Running, Mechanically Tuned Mechanical Tuning BW (MHz) +10 MDR2100 2.5-6.0 +10 6.0-21.0 +20 Free Running, Mechanically Tuned,
More informationCrystals Oscillators Filters Precision Timing Magnetics Engineered Solutions
Magnetics Engineered Solutions WWW.ABRACON.COM Introduction Purpose: Objectives: Content: Learning Time: Introduce the ASG series, Fixed Frequency XO & VCXO - Explain the benefits of the ASG series of
More informationEnhancing FPGA-based Systems with Programmable Oscillators
Enhancing FPGA-based Systems with Programmable Oscillators Jehangir Parvereshi, jparvereshi@sitime.com Sassan Tabatabaei, stabatabaei@sitime.com SiTime Corporation www.sitime.com 990 Almanor Ave., Sunnyvale,
More informationRF Signal Generators. SG380 Series DC to 2 GHz, 4 GHz and 6 GHz analog signal generators. SG380 Series RF Signal Generators
RF Signal Generators SG380 Series DC to 2 GHz, 4 GHz and 6 GHz analog signal generators SG380 Series RF Signal Generators DC to 2 GHz, 4 GHz or 6 GHz 1 µhz resolution AM, FM, ΦM, PM and sweeps OCXO timebase
More informationTCMO : A VERSATILE MEMS OSCILLATOR TIMING PLATFORM
TCMO : A VERSATILE MEMS OSCILLATOR TIMING PLATFORM K. J. Schoepf Sand 9, Inc. One Kendall Square, Suite B2305 Cambridge, MA 02139 jschoepf@sand9.com R. Rebel, D. M. Chen, G. Zolfagharkhani, A. Gaidarzhy,
More informationIEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 2, FEBRUARY
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 2, FEBRUARY 2007 385 A Monolithic and Self-Referenced RF LC Clock Generator Compliant With USB 2.0 Michael S. McCorquodale, Member, IEEE, Justin D. O
More informationLow Phase Noise CMOS Ring Oscillator VCOs for Frequency Synthesis
Low Phase Noise CMOS Ring Oscillator VCOs for Frequency Synthesis July 27, 1998 Rafael J. Betancourt Zamora and Thomas H. Lee Stanford Microwave Integrated Circuits Laboratory jeihgfdcbabakl Paul G. Allen
More informationClock Tree 101. by Linda Lua
Tree 101 by Linda Lua Table of Contents I. What is a Tree? II. III. Tree Components I. Crystals and Crystal Oscillators II. Generators III. Buffers IV. Attenuators versus Crystal IV. Free-running versus
More information3 GHz to 6 GHz Frequency Synthesizer
3 GHz to 6 GHz Frequency Synthesizer Low Phase Noise in a Lower Cost Package Features API Technologies Model LCFS1063 frequency synthesizer combines a monolithic integer-n microwave synthesizer, a reference
More informationA 20GHz Class-C VCO Using Noise Sensitivity Mitigation Technique
Matsuzawa Lab. Matsuzawa & Okada Lab. Tokyo Institute of Technology A 20GHz Class-C VCO Using Noise Sensitivity Mitigation Technique Kento Kimura, Kenichi Okada and Akira Matsuzawa (WE2C-2) Matsuzawa &
More informationLecture 160 Examples of CDR Circuits in CMOS (09/04/03) Page 160-1
Lecture 160 Examples of CDR Circuits in CMOS (09/04/03) Page 160-1 LECTURE 160 CDR EXAMPLES INTRODUCTION Objective The objective of this presentation is: 1.) Show two examples of clock and data recovery
More informationLocal Oscillator Phase Noise and its effect on Receiver Performance C. John Grebenkemper
Watkins-Johnson Company Tech-notes Copyright 1981 Watkins-Johnson Company Vol. 8 No. 6 November/December 1981 Local Oscillator Phase Noise and its effect on Receiver Performance C. John Grebenkemper All
More informationLNS ultra low phase noise Synthesizer 8 MHz to 18 GHz
LNS ultra low phase noise Synthesizer 8 MHz to 18 GHz Datasheet The LNS is an easy to use 18 GHz synthesizer that exhibits outstanding phase noise and jitter performance in a 3U rack mountable chassis.
More informationGlossary of VCO terms
Glossary of VCO terms VOLTAGE CONTROLLED OSCILLATOR (VCO): This is an oscillator designed so the output frequency can be changed by applying a voltage to its control port or tuning port. FREQUENCY TUNING
More informationM bius. MEMS and CMOS Approaches to Monolithic Timing and Frequency Synthesis. University of Utah March 28, 2005
MEMS and CMOS Approaches to Monolithic Timing and Frequency Synthesis University of Utah March 28, 2005 Michael S. McCorquodale, Ph.D. Chief Executive and Technology Officer Mobius, Inc. Detroit, MI Overview
More informationAccurate Phase Noise Measurements Made Cost Effective
MTTS 2008 MicroApps Accurate Phase Noise Measurements Made Cost Effective author : Jason Breitbarth, PhD. Boulder, Colorado, USA Presentation Outline Phase Noise Intro Additive and Absolute Oscillator
More informationChoosing Loop Bandwidth for PLLs
Choosing Loop Bandwidth for PLLs Timothy Toroni SVA Signal Path Solutions April 2012 1 Phase Noise (dbc/hz) Choosing a PLL/VCO Optimized Loop Bandwidth Starting point for setting the loop bandwidth is
More informationAnalysis of Phase Noise Profile of a 1.1 GHz Phase-locked Loop
Analysis of Phase Noise Profile of a 1.1 GHz Phase-locked Loop J. Handique, Member, IAENG and T. Bezboruah, Member, IAENG 1 Abstract We analyzed the phase noise of a 1.1 GHz phaselocked loop system for
More informationSiNANO-NEREID Workshop:
SiNANO-NEREID Workshop: Towards a new NanoElectronics Roadmap for Europe Leuven, September 11 th, 2017 WP3/Task 3.2 Connectivity RF and mmw Design Outline Connectivity, what connectivity? High data rates
More informationPI6CX201A. 25MHz Jitter Attenuator. Features
Features PLL with quartz stabilized XO Optimized for MHz input/output frequency Other frequencies available Low phase jitter less than 30fs typical Free run mode ±100ppm Single ended input and outputs
More informationXR-2206 Monolithic Function Generator
...the analog plus company TM XR-0 Monolithic Function Generator FEATURES Low-Sine Wave Distortion 0.%, Typical Excellent Temperature Stability 0ppm/ C, Typical Wide Sweep Range 000:, Typical Low-Supply
More informationISSCC 2006 / SESSION 33 / MOBILE TV / 33.4
33.4 A Dual-Channel Direct-Conversion CMOS Receiver for Mobile Multimedia Broadcasting Vincenzo Peluso, Yang Xu, Peter Gazzerro, Yiwu Tang, Li Liu, Zhenbiao Li, Wei Xiong, Charles Persico Qualcomm, San
More informationRadiofrequency Measurements. Frequency Synthesizers
Radiofrequency Measurements Frequency Synthesizers The next slides material is taken from AGILENT Fundamentals of Quartz Oscillators, Application Note 200-2 AGILENT Source Basics John R. Vig Quartz Crystal
More informationA 0.18µm SiGe BiCMOS Receiver and Transmitter Chipset for SONET OC-768 Transmission Systems
A 0.18µm SiGe BiCMOS Receiver and Transmitter Chipset for SONET OC-768 Transmission Systems M. Meghelli 1, A. Rylyakov 1, S. J. Zier 2, M. Sorna 2, D. Friedman 1 1 IBM T. J. Watson Research Center 2 IBM
More informationRF Signal Generators. SG380 Series DC to 2 GHz, 4 GHz and 6 GHz analog signal generators. SG380 Series RF Signal Generators
RF Signal Generators SG380 Series DC to 2 GHz, 4 GHz and 6 GHz analog signal generators SG380 Series RF Signal Generators DC to 2 GHz, 4 GHz or 6 GHz 1 μhz resolution AM, FM, ΦM, PM and sweeps OCXO timebase
More informationDistributed by: www.jameco.com -00-3- The content and copyrights of the attached material are the property of its owner. ...the analog plus company TM XR-0 Monolithic Function Generator FEATURES Low-Sine
More informationA COMPACT, AGILE, LOW-PHASE-NOISE FREQUENCY SOURCE WITH AM, FM AND PULSE MODULATION CAPABILITIES
A COMPACT, AGILE, LOW-PHASE-NOISE FREQUENCY SOURCE WITH AM, FM AND PULSE MODULATION CAPABILITIES Alexander Chenakin Phase Matrix, Inc. 109 Bonaventura Drive San Jose, CA 95134, USA achenakin@phasematrix.com
More informationSilicon Laboratories Enters the Frequency Control Market
Silicon Laboratories Enters the Frequency Control Market Silicon Laboratories Product Portfolio Aero Transceiver Power Amplifier Broadcast Radio Tuners RF Synthesizer FM Tuners Silicon DAA ISOmodem ProSLIC
More informationA 3 TO 30 MHZ HIGH-RESOLUTION SYNTHESIZER CONSISTING OF A DDS, DIVIDE-AND-MIX MODULES, AND A M/N SYNTHESIZER. Richard K. Karlquist
A 3 TO 30 MHZ HIGH-RESOLUTION SYNTHESIZER CONSISTING OF A DDS, -AND-MIX MODULES, AND A M/N SYNTHESIZER Richard K. Karlquist Hewlett-Packard Laboratories 3500 Deer Creek Rd., MS 26M-3 Palo Alto, CA 94303-1392
More information5.5: A 3.2 to 4GHz, 0.25µm CMOS Frequency Synthesizer for IEEE a/b/g WLAN
5.5: A 3.2 to 4GHz, 0.25µm CMOS Frequency Synthesizer for IEEE 802.11a/b/g WLAN Manolis Terrovitis, Michael Mack, Kalwant Singh, and Masoud Zargari 1 Atheros Communications, Sunnyvale, California 1 Atheros
More informationA 0.2-to-1.45GHz Subsampling Fractional-N All-Digital MDLL with Zero-Offset Aperture PD-Based Spur Cancellation and In-Situ Timing Mismatch Detection
A 0.2-to-1.45GHz Subsampling Fractional-N All-Digital MDLL with Zero-Offset Aperture PD-Based Spur Cancellation and In-Situ Timing Mismatch Detection Somnath Kundu 1, Bongjin Kim 1,2, Chris H. Kim 1 1
More informationChoosing the Optimal Internal or External Clocking Solution for FPGA-Based Designs
Choosing the Optimal Internal or External Clocking Solution for FPGA-Based Designs Introduction Field programmable gate arrays (FGPAs) are used in a large variety of applications ranging from embedded
More informationMEMS Based Resonators and Oscillators are Now Replacing Quartz
MEMS Based Resonators and Oscillators Dr. Aaron Partridge SiTime Corp. ISSCC February 20, 2012 My purpose is to convince you that MEMS timing is here now. MEMS will replace quartz oscillators in most applications.
More informationMEMS Oscillators: Enabling Smaller, Lower Power IoT & Wearables
MEMS Oscillators: Enabling Smaller, Lower Power IoT & Wearables The explosive growth in Internet-connected devices, or the Internet of Things (IoT), is driven by the convergence of people, device and data
More informationCrystals Oscillators Real-Time-Clocks Filters Precision Timing Magnetics Engineered Solutions
Real-Time-Clocks Magnetics Engineered Solutions WWW.ABRACON.COM Introduction Purpose: Objectives: Content: Learning Time: Introduce the ABLNO series of Ultra Low Phase Noise, Fixed Frequency & VCXO s and
More informationAn Investigation into the Effects of Sampling on the Loop Response and Phase Noise in Phase Locked Loops
An Investigation into the Effects of Sampling on the Loop Response and Phase oise in Phase Locked Loops Peter Beeson LA Techniques, Unit 5 Chancerygate Business Centre, Surbiton, Surrey Abstract. The majority
More informationTCMO : A VERSATILE MEMS OSCILLATOR TIMING PLATFORM
TCMO : A VERSATILE MEMS OSCILLATOR TIMING PLATFORM K. J. Schoepf Sand 9, Inc. 8 St. Mary s St. 628, Boston, MA 02215, USA E-mail: jschoepf@sand9.com R. Rebel, D. M. Chen, G. Zolfagharkhani, A. Gaidarzhy,
More informationFrequency Multipliers Design Techniques and Applications
Frequency Multipliers Design Techniques and Applications Carlos E. Saavedra Associate Professor Electrical and Computer Engineering Queen s University Kingston, Ontario CANADA Outline Introduction applications
More informationSHF Communication Technologies AG
SHF Communication Technologies AG Wilhelm-von-Siemens-Str. 23D 12277 Berlin Germany Phone +49 30 772051-0 Fax +49 30 7531078 E-Mail: sales@shf.de Web: http://www.shf.de Datasheet SHF 78120 D Synthesized
More informationTHE PHS 8500 FAMILY OF VERY LOW PHASE NOISE HIGH PERFORMANCE MICROWAVE SYNTHESIZERS BENCHTOP
SUBTITLE THE PHS 8500 FAMILY OF VERY LOW PHASE NOISE HIGH PERFORMANCE MICROWAVE SYNTHESIZERS BENCHTOP MODULAR HANDHELD The PHS 8500 Family SUBTITLE Features: Standard Range : 700 MHz to 18 GHz Extendable
More informationg - Compensated, Miniature, High Performance Quartz Crystal Oscillators Frequency Electronics Inc. Hugo Fruehauf
g - Compensated, Miniature, High Performance Quartz Crystal Oscillators Frequency Electronics Inc. Hugo Fruehauf hxf@fei-zyfer.com April 2007 Discussion Outline Introduction Radar Applications GPS Navigation
More informationPhase Noise and Tuning Speed Optimization of a MHz Hybrid DDS-PLL Synthesizer with milli Hertz Resolution
Phase Noise and Tuning Speed Optimization of a 5-500 MHz Hybrid DDS-PLL Synthesizer with milli Hertz Resolution BRECHT CLAERHOUT, JAN VANDEWEGE Department of Information Technology (INTEC) University of
More informationSi500 Silicon Oscillator Product Family. September 2008
Si500 Silicon Oscillator Product Family September 2008 Introducing the Si500 Silicon Oscillator All silicon oscillator enables replacement of quartz and MEMS XOs with IC solution Supports any frequency
More informationSC5407A/SC5408A 100 khz to 6 GHz RF Upconverter. Datasheet. Rev SignalCore, Inc.
SC5407A/SC5408A 100 khz to 6 GHz RF Upconverter Datasheet Rev 1.2 2017 SignalCore, Inc. support@signalcore.com P R O D U C T S P E C I F I C A T I O N S Definition of Terms The following terms are used
More informationA CMOS Frequency Synthesizer with an Injection-Locked Frequency Divider for a 5 GHz Wireless LAN Receiver. Hamid Rategh
A CMOS Frequency Synthesizer with an Injection-Locked Frequency Divider for a 5 GHz Wireless LAN Receiver Hamid Rategh Center for Integrated Systems Stanford University OUTLINE Motivation Introduction
More informationPTX-0350 RF UPCONVERTER, MHz
PTX-0350 RF UPCONVERTER, 300 5000 MHz OPERATING MODES I/Q upconverter RF = LO + IF upconverter RF = LO - IF upconverter Synthesizer 10 MHz REFERENCE INPUT/OUTPUT EXTERNAL LOCAL OSCILLATOR INPUT I/Q BASEBAND
More informationAS EARLY as 1968, the concept of a self-referenced silicon
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 56, NO. 5, MAY 2009 943 A 25-MHz Self-Referenced Solid-State Frequency Source Suitable for XO-Replacement Michael S. McCorquodale, Member,
More information<180 fs RMS Jitter 24-bit Step Size, Resolution 3 Hz typ Exact Frequency Mode Built in Digital Self Test 40 Lead 6x6 mm SMT Package: 36 mm 2
Features RF Bandwidth: Maximum Phase Detector Rate 1 MHz Ultra Low Phase Noise -11 dbc/hz in Band Typ. Figure of Merit (FOM) -227 dbc/hz Typical Applications Cellular/4G, WiMax Infrastructure Repeaters
More informationRF205x Frequency Synthesizer User Guide
RF205x Frequency Synthesizer User Guide RFMD Multi-Market Products Group 1 of 20 REVISION HISTORY Version Date Description of change(s) Author(s) Version 0.1 March 2008 Initial Draft. CRS Version 1.0 June
More informationTechnical Introduction Crystal Oscillators. Oscillator. Figure 1 Block diagram crystal oscillator
Technical Introduction Crystal s Crystals and Crystal s are the most important components for frequency applications like telecommunication and data transmission. The reasons are high frequency stability,
More informationFMC ADC 125M 14b 1ch DAC 600M 14b 1ch Technical Specification
FMC ADC 125M 14b 1ch DAC 600M 14b 1ch Technical Specification Tony Rohlev October 5, 2011 Abstract The FMC ADC 125M 14b 1ch DAC 600M 14b 1ch is a FMC form factor card with a single ADC input and a single
More information<180 fs RMS Jitter 24-bit Step Size, Resolution 3 Hz typ Exact Frequency Mode Built in Digital Self Test 40 Lead 6x6 mm SMT Package: 36 mm 2
Features RF Bandwidth: Maximum Phase Detector Rate 1 MHz Ultra Low Phase Noise -11 dbc/hz in Band Typ. Figure of Merit (FOM) -227 dbc/hz Typical Applications Cellular/4G Infrastructure Repeaters and Femtocells
More informationA 1.9GHz Single-Chip CMOS PHS Cellphone
A 1.9GHz Single-Chip CMOS PHS Cellphone IEEE JSSC, Vol. 41, No.12, December 2006 William Si, Srenik Mehta, Hirad Samavati, Manolis Terrovitis, Michael Mack, Keith Onodera, Steve Jen, Susan Luschas, Justin
More information3.3V Dual-Output LVPECL Clock Oscillator
19-4558; Rev 1; 3/10 3.3V Dual-Output LVPECL Clock Oscillator General Description The is a dual-output, low-jitter clock oscillator capable of producing frequency output pair combinations ranging from
More informationModulation is the process of impressing a low-frequency information signal (baseband signal) onto a higher frequency carrier signal
Modulation is the process of impressing a low-frequency information signal (baseband signal) onto a higher frequency carrier signal Modulation is a process of mixing a signal with a sinusoid to produce
More informationFoundries, MMICs, systems. Rüdiger Follmann
Foundries, MMICs, systems Rüdiger Follmann Content MMIC foundries Designs and trends Examples 2 Foundries and MMICs Feb-09 IMST GmbH - All rights reserved MMIC foundries Foundries IMST is a UMS certified
More informationHS9000 SERIES. RoHS. Multi-Channel RF Synthesizers
Holzworth has refined its multi-channel platform in the form of the HS9000 Series for integration of the HSM Series Single Channel Synthesizers. The HS9000 series is designed to achieve optimal channel-to-channel
More informationEVALUATION KIT AVAILABLE 10MHz to 1050MHz Integrated RF Oscillator with Buffered Outputs. Typical Operating Circuit. 10nH 1000pF MAX2620 BIAS SUPPLY
19-1248; Rev 1; 5/98 EVALUATION KIT AVAILABLE 10MHz to 1050MHz Integrated General Description The combines a low-noise oscillator with two output buffers in a low-cost, plastic surface-mount, ultra-small
More informationFabricate a 2.4-GHz fractional-n synthesizer
University of Malaya From the SelectedWorks of Professor Mahmoud Moghavvemi Summer June, 2013 Fabricate a 2.4-GHz fractional-n synthesizer H Ameri Mahmoud Moghavvemi, University of Malaya a Attaran Available
More informationLow Power Communication Circuits for WSN
Low Power Communication Circuits for WSN Nate Pletcher, Prof. Jan Rabaey, (B. Otis, Y.H. Chee, S. Gambini, D. Guermandi) Berkeley Wireless Research Center Towards A Micropower Integrated Node power management
More informationMEMS Timing Technology: Shattering the Constraints of Quartz Timing to Improve Smartphones and Mobile Devices
MEMS Timing Technology: Shattering the Constraints of Quartz Timing to The trends toward smaller size and increased functionality continue to dominate in the mobile electronics market. As OEMs and ODMs
More informationMK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET
DATASHEET MK1714-01 Description The MK1714-01 is a low cost, high performance clock synthesizer with selectable multipliers and percentages of spread spectrum designed to generate high frequency clocks
More informationMK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET
DATASHEET MK1714-02 Description The MK1714-02 is a low cost, high performance clock synthesizer with selectable multipliers and percentages of spread designed to generate high frequency clocks with low
More informationA Sub-0.75 RMS-Phase-Error Differentially-Tuned Fractional-N Synthesizer with On-Chip LDO Regulator and Analog-Enhanced AFC Technique
A Sub-0.75 RMS-Phase-Error Differentially-Tuned Fractional-N Synthesizer with On-Chip LDO Regulator and Analog-Enhanced AFC Technique Lei Lu, Lingbu Meng, Liang Zou, Hao Min and Zhangwen Tang Fudan University,
More informationA Wide-Bandwidth 2.4GHz ISM Band Fractional-N PLL with Adaptive Phase Noise Cancellation. Outline
A Wide-Bandwidth 2.4GHz ISM Band Fractional-N PLL with Adaptive Phase Noise Cancellation Ashok Swaminathan,2, Kevin J. Wang, Ian Galton University of California, San Diego, CA 2 NextWave Broadband, San
More informationEVB /915MHz Transmitter Evaluation Board Description
General Description The TH708 antenna board is designed to optimally match the differential power amplifier output to a loop antenna. The TH708 can be populated either for FSK, ASK or FM transmission.
More informationEVB /433MHz Transmitter Evaluation Board Description
Features! Fully integrated, PLL-stabilized VCO! Frequency range from 310 MHz to 440 MHz! FSK through crystal pulling allows modulation from DC to 40 kbit/s! High FSK deviation possible for wideband data
More informationLow-Jitter I 2 C/SPI Programmable CMOS Oscillator
Datasheet General Description The DSC2110 and series of programmable, highperformance CMOS oscillators utilize a proven silicon MEMS technology to provide excellent jitter and stability while incorporating
More informationMEMS Reference Oscillators. EECS 242B Fall 2014 Prof. Ali M. Niknejad
MEMS Reference Oscillators EECS 242B Fall 2014 Prof. Ali M. Niknejad Why replace XTAL Resonators? XTAL resonators have excellent performance in terms of quality factor (Q ~ 100,000), temperature stability
More informationTaheri: A 4-4.8GHz Adaptive Bandwidth, Adaptive Jitter Phase Locked Loop
Engineering, Technology & Applied Science Research Vol. 7, No. 2, 2017, 1473-1477 1473 A 4-4.8GHz Adaptive Bandwidth, Adaptive Jitter Phase Locked Loop Hamidreza Esmaeili Taheri Department of Electronics
More informationHot Topics and Cool Ideas in Scaled CMOS Analog Design
Engineering Insights 2006 Hot Topics and Cool Ideas in Scaled CMOS Analog Design C. Patrick Yue ECE, UCSB October 27, 2006 Slide 1 Our Research Focus High-speed analog and RF circuits Device modeling,
More informationTRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER. Features
DATASHEET ICS280 Description The ICS280 field programmable spread spectrum clock synthesizer generates up to four high-quality, high-frequency clock outputs including multiple reference clocks from a low-frequency
More informationTutorial: Quartz Crystal Oscillators & Phase- Locked Loops
Tutorial: Quartz Crystal Oscillators & Phase- Locked Loops Greg Armstrong (IDT) Dominik Schneuwly (Oscilloquartz) June 13th, 2016 1 Content 1. Quartz Crystal Oscillator (XO) Technology Quartz Crystal Overview
More informationRadio-Frequency Conversion and Synthesis (for a 115mW GPS Receiver)
Radio-Frequency Conversion and Synthesis (for a 115mW GPS Receiver) Arvin Shahani Stanford University Overview GPS Overview Frequency Conversion Frequency Synthesis Conclusion GPS Overview: Signal Structure
More informationFrequency Synthesizer
Frequency Synthesizer KSN-1600A-219+ 50 1550 to 1600 MHz The Big Deal Fractional N synthesizer Low phase noise and spurious Robust design and construction Small size 0.80" x 0.58" x 0.15" CASE STYLE: DK801
More informationRF-MST Cluster Workshop, Potsdam, FP Go4TIME
RF-MST Cluster Workshop, Potsdam, 01.07.13 FP7-257444 Go4TIME Go4Time Consortium Leading Quartz and MEMS European manufacturers Three research labs Two Universities David Ruffieux Go4Time Technical Manager
More informationPhase-Locked Loop Engineering Handbook for Integrated Circuits
Phase-Locked Loop Engineering Handbook for Integrated Circuits Stanley Goldman ARTECH H O U S E BOSTON LONDON artechhouse.com Preface Acknowledgments xiii xxi CHAPTER 1 Cetting Started with PLLs 1 1.1
More information9 Hints for Making Better Measurements Using RF Signal Generators. Application Note 1390
9 Hints for Making Better Measurements Using RF Signal Generators Application Note 1390 Signal sources provide precise, highly stable test signals for a variety of component and system test applications.
More informationA Wide Tuning Range (1 GHz-to-15 GHz) Fractional-N All-Digital PLL in 45nm SOI
7- A Wide Tuning Range ( GHz-to-5 GHz) Fractional-N All-Digital PLL in 45nm SOI Alexander Rylyakov, Jose Tierno, George English 2, Michael Sperling 2, Daniel Friedman IBM T. J. Watson Research Center Yorktown
More informationICS LOW PHASE NOISE CLOCK MULTIPLIER. Features. Description. Block Diagram DATASHEET
DATASHEET ICS601-01 Description The ICS601-01 is a low-cost, low phase noise, high-performance clock synthesizer for applications which require low phase noise and low jitter. It is IDT s lowest phase
More information/$ IEEE
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 53, NO. 11, NOVEMBER 2006 1205 A Low-Phase Noise, Anti-Harmonic Programmable DLL Frequency Multiplier With Period Error Compensation for
More informationDr.-Ing. Ulrich L. Rohde
Dr.-Ing. Ulrich L. Rohde Noise in Oscillators with Active Inductors Presented to the Faculty 3 : Mechanical engineering, Electrical engineering and industrial engineering, Brandenburg University of Technology
More informationISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.5
ISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.5 20.5 A 2.4GHz CMOS Transceiver and Baseband Processor Chipset for 802.11b Wireless LAN Application George Chien, Weishi Feng, Yungping
More informationPHASE NOISE MEASUREMENT SYSTEMS
PHASE NOISE MEASUREMENT SYSTEMS Item Type text; Proceedings Authors Lance, A. L.; Seal, W. D.; Labaar, F. Publisher International Foundation for Telemetering Journal International Telemetering Conference
More informationDS4-XO Series Crystal Oscillators DS4125 DS4776
Rev 2; 6/08 DS4-XO Series Crystal Oscillators General Description The DS4125, DS4150, DS4155, DS4156, DS4160, DS4250, DS4300, DS4311, DS4312, DS4622, and DS4776 ceramic surface-mount crystal oscillators
More informationISSCC 2002 / SESSION 17 / ADVANCED RF TECHNIQUES / 17.2
ISSCC 2002 / SESSION 17 / ADVANCED RF TECHNIQUES / 17.2 17.2 A CMOS Differential Noise-Shifting Colpitts VCO Roberto Aparicio, Ali Hajimiri California Institute of Technology, Pasadena, CA Demand for higher
More informationAgile Low-Noise Frequency Synthesizer A. Ridenour R. Aurand Spectrum Microwave
Agile Low-Noise Frequency Synthesizer A. Ridenour R. Aurand Spectrum Microwave Abstract Simultaneously achieving low phase noise, fast switching speed and acceptable levels of spurious outputs in microwave
More informationAN3: Application Note
: Introduction The PE3291 fractional-n PLL is well suited for use in low data rate (narrow channel spacing) applications below 1 GHz, such as paging, remote meter reading, inventory control and RFID. It
More informationA Robust Oscillator for Embedded System without External Crystal
Appl. Math. Inf. Sci. 9, No. 1L, 73-80 (2015) 73 Applied Mathematics & Information Sciences An International Journal http://dx.doi.org/10.12785/amis/091l09 A Robust Oscillator for Embedded System without
More informationLow voltage LNA, mixer and VCO 1GHz
DESCRIPTION The is a combined RF amplifier, VCO with tracking bandpass filter and mixer designed for high-performance low-power communication systems from 800-1200MHz. The low-noise preamplifier has a
More information