RF-MST Cluster Workshop, Potsdam, FP Go4TIME

Transcription

1 RF-MST Cluster Workshop, Potsdam, FP Go4TIME Go4Time Consortium Leading Quartz and MEMS European manufacturers Three research labs Two Universities David Ruffieux Go4Time Technical Manager FP Page 0

2 Go4TIME: A Global, Flexible, On-demand and Resourceful Timing IC & MEMS Encapsulated System Generic approach for Low-cost, all-silicon, vacuum-sealed, chip-scale packaging of hybrid ultra-miniature microsystems based on MEMS & IC combination with the goal to Demonstrate the manufacturability of a leading edge European versatile & ultra-miniaturized MEMS-based timing solution 2ppm over C; 1 A 32kHz RTC; 1-200MHz programmable clock Dual VHF+LF SiRes to be benchmarked with Quartz & BAW solution VHF SiRes MF SiRes CMOS & TSV CMOS with TSV BAW Quartz A<2mm 2, t= µm FP Page 1

3 Development roadmap (I) Packaging axis TSV & double-sided RDL on thin interposer wafer COTS 32kHz XTALs as pressure sensors Wafer level vacuum sealing at low temperature Resonator development High performance miniature XTAL Co-integrated dual AlN silicon resonator (LF+HF) 3rd party BAW Resonator FP Page 2

4 Development roadmap (II) Circuit level Design a generic versatile timing ASIC in CMOS Then full mask ASIC Post-CMOS TSV & W2W bonding BAW CMOS WAFER Mini XTAL FP Page 3

5 Packaging development IZM, VTT, ST, Micro Crystal Lead: Hermann Oppermann, IZM Team: K. Zoschke, C. Manier, T. Suni, P. Dixit, G. Allegato, S. Dalla Piazza

6 Interposer process flow Front-side processing (TSV + RDL) Temporary bonding on support wafer, thinning Backside processing (RDL, seal ring, getter) FP Page 5

7 XTAL assembly and vacuum sealing XTAL assembly with flip-chip bonder Cap metallization and cavity etching W2W bonding (AuSn) in high vacuum FP Page 6

8 Packaging of XTALs (8 substrate) Slide 7 FP Page 7

9 32kHz packaged XTALs measurement DUTs (5k/wafer) 78% sealed 13% AP 4-8% NC Getter effectiveness 0.3mbar wi 1.5mbar wo FP Page 8

10 Resonator development VTT, Micro Crystal, CSEM, Polimi Lead: Tuomas Pensala, VTT Team: A. Jaakkola, J. Dekker, F. Staub, J. Baborowski, A. Frangi

11 131kHz mini-xtal design Optimization f=2^17, size/power compromise Reduced TE losses Low Rm wi grooves DFM Wet etching 3D photolitho 3D metallization 2 substrate FP Page 10

12 131kHz miniature XTALs characterization 2.0x1.2x0.6 mm 3 miniature packages ~300 DUT measured High performance devices: FOM=75 Mean Stand. Parameter value dev. Fs [khz] Rs [kohm] C1 [ff] Q FP Page 11

13 Co-integrated LF and HF silicon resonators LF Tuning fork HF square plate Same die size as 32kHz XTAL (1.48x0.66mm 2 ) Rear and lateral sides encapsulation included (no cap!) FP Page 12

14 Silicon resonators performances High Frequency Resonators Rm C0 f Q K2 FOM HF Ohm 3,47 pf 27,0 MHz ,175% 9,8 HF Ohm 3,45 pf 26,3 MHz ,149% 16,2 Low Frequency Resonators Rm C0 f Q K2 FOM IN12 59 kohm 1,64 pf 430,4 khz 17.2k 0,028% 4,8 IN14 74 kohm 1,45 pf 522,0 khz 18.4k 0,024% 4,4 FP Page 13

15 ASIC development and System level characterization CSEM, TUD Lead: David Ruffieux, CSEM Team: K. Makinwa

16 XTAL/BAW-based circuit block diagram 131kHz DTCXO RC osc T sensor (1 & 9MHz clocks) RTC with IRQs 1-50MHz on-chip RC PLL ref. by XO 2GHz BAW DCO & frac-n dividers (1-50MHz clk gen) 3 buff. clk outputs OTP NVM for all clock sources TC I2C interface RC T Sens TCP FSM BAW LF PFD CP XTAL M P N Q REG OTP R RC RTC TIMER I2C M U X M U X GPIOs SCL SDA CK2_(V)HF CK1_(V)HF CK_LF FP Page 15

17 Intermediate validation board Packaged BAW samples from third party 131kHz XTALs in standard C8 package C-QFN 44 package (2 DUTs / each) FP Page 16

18 Frequency deviation in ppm XO temperature stability measurement cal -40 to 85 C Temperature in C cal 0 to50 C FP Page 17

19 Frequency deviation in ppm BAW temperature stability measurement Temperature in C BAW XTAL cal FP Page 18

20 Phase noise in dbc/hz Phase noise measurement XTAL_131kHz RC_PLL_27MHz BAW_div_30MHz E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 Offset from carrier in Hz FP Page 19

21 Power consumption breakdown RTC mode 400nW SW BAT 1V LDO XO DIG T SENS 3% 16% 32% 16% HF clock mode 30MHz 33% 1V6 LDO DIV+MOD BAW LO BUFFER 5% 32% 26% 37% FP Page 20

22 Components photographs CMOS 0.18 m Components size IC 1.5x1.1mm 2 XTAL 1.0x0.6mm 2 BAW 0.6x0.6mm 2 Post-CMOS TSV ongoing on eng. lot FP Page 21

23 Probe card measurement on wafers XO emulated with external clock injection Statistics on e.g. temperature sensor To be used for on-wafer calibration FP Page 22

24 Conclusions and perspectives Generic hybrid approach for sealing MEMS Quartz far from obsolete, SiRes for further miniaturization High end accurate timing system shown <1 W RTC with ± 2ppm over -40 to 85 C ± 20ppm HF clocks for WSN over -40 to 85 C Ultimate miniaturization phase with CMOS as part of the package started 1.5x1.1x0.5 mm 3 single die timing unit expected FP Page 23