Low Phase Noise, LVPECL VCXO (for 150MHz to 160MHz Fundamental Crystals) FEATURES. * Internal 60KΩ pull-up resistor
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1 0.952mm VDD QB PL586-55/-58 FEATURES DIE CONFIGURATION Advanced non multiplier VCXO Design for High Performance Crystal Oscillators Input/Output Range: 150MHz to 160MHz Phase Noise Optimized for MHz: Very low Phase Jitter: <100fs RMS High Pull Range: ±100ppm Linearity: <5% Integrated Variable Capacitors Complementary LVPECL Outputs Power Supply: 3.3V ±10% Available in Die or Wafer Form XIN X 7 8 Die ID 0.952mm Q VSS DESCRIPTION The PL586-55/-58 is a non-multiplier VCXO IC specifically designed to pull fundamental mode crystals from 150MHz to 160MHz. This IC achieves a typical pull range of ±100ppm with <5% linearity. The phase noise performance is optimized for close-in performance and with <100fs phase jitter, makes this an ideal solution for all high end clocking applications such as SONET, WiMax, CPRI, OBSAI, Fiber Channel, and any application where performance and quality are required. DIE SPECIFICATIONS Name Size Reverse side Pad dimensions Thickness Value 952 micron x 952 micron GND 80 micron x 80 micron 8 mil VCON (0,0) 1 2 OE PUT ENABLE LOGIC PL OE State (Pad 4) Output Buffers State 0 Outputs Tri-Stated 1 (Default) Outputs Enabled * Internal 60KΩ pull-up resistor PUT ENABLE LOGIC PL OE State (Pad 4) Output Buffers State 0 (Default) Outputs Enabled 1 Outputs Tri-Stated * Internal 60KΩ pull-down resistor BLOCK DIAGRAM OE XIN X VCON Xtal Osc Varicap Q QB Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 3/6/13 Page 1
2 PAD ASSIGNMENT Pad # Name X ( m)* Y ( m)* Description 1 VCON Voltage Control input 2 X Crystal output connection 3 XIN Crystal input connection 4 VDD V DD connection 5 QB Complementary LVPECL output 6 Q LVPECL output 7 VSS GND connection 8 OE Output enable pin. Internal pull up (-55) or pull down (-58). * Note: Referenced to center of the die. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage V DD 4.6 V Input Voltage, DC V I V SS-0.5 V DD+0.5 V Output Voltage, DC V O V SS-0.5 V DD+0.5 V Storage Temperature T S C Ambient Operating Temperature T A C HBM ESD Protection 2,000 V Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permane nt damage to the device and affect product reliability. These condition s represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. *Operating temperature is guaranteed by design. Parts are tested to commercial grade only. Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 3/6/13 Page 2
3 2. Voltage Control Crystal Oscillator VCXO Stabilization Time * T VCXOSTB From power valid 10 ms XTAL C 1 = 6.8, C 0/C 1 = ppm 0V VCON V VCXO Pullability * DD (at 25 C) XTAL C 1 = 3.7, C 0/C 1 = ppm 0V VCON V DD (at 25 C) Varicap Control Range * VCON = 0 to V DD V Linearity * 0.0V VCON 3.3V 7 % 0.3V VCON 3.0V 2.5 % VCON Input Impedance * DC Input resistance 10 MΩ VCON Modulation BW * 0V VCON V DD, -3dB 30 khz Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. 3. Crystal Specifications Crystal Resonator Frequency F XIN Fundamental Mode, AT cut MHz Crystal Loading Rating C L (xtal) VCON = 1.65V 5 pf Shunt Capacitance C pf Motional Capacitance C 1 Recommended for at least ±100ppm Frequency Pulling 5.5 ff Recommended ESR R E C 0 2.0pF 10 Ω 4. General Electrical Specifications C 0 1.5pF 12 Ω Supply Current I DD Standard LVPECL Loading (See LVPECL Levels Test Circuit, page 4) 50 ma Operating Voltage V DD V Output Clock Duty V DD 1.3V (See LVPECL Transition Time Waveform, page 4) % Short Circuit Current 50 ma Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 3/6/13 Page 3
4 5. Jitter Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Period Jitter RMS At MHz, with capacitive 2.5 decoupling between V DD and ps Period Jitter pk-to-pk GND. Over 10,000 cycles 20 Integrated Jitter RMS at MHz Integrated 12 khz to 20 MHz 90 fs 6. Phase Noise Specifications @100kHz UNITS Phase Noise, MHz dbc/hz relative to carrier Note: Phase Noise measured at VCON = 0.3V to 3.0V. 7. LVPECL Electrical Characteristics Output High Voltage V OH R L = 50 Ω to V DD V DD V DD V Output Low Voltage V OL (V DD 2V) (see figure) V DD V DD V DD V 8. LVPECL Switching Characteristics Clock Rise Time t of output waveform ps Clock Fall Time t of output waveform ps LVPECL Levels Test Circuit LVPECL Transistion Time Waveform DUTY CYCLE VDD 45-55% 55-45% 50? 2.0V 80% 50% 50? 20% t R t F Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 3/6/13 Page 4
5 ORDERING INFORMATION For part ordering, please contact our Sales Department: 2180 Fortune Drive, San Jose, CA 95131, USA Tel: (408) Fax: (408) PART NUMBER The order number for this device is a combination of the following: Part number, Package type and Operating temperature range Part Number PL586-5X XX Packaging Option D = Die W = Wafer Temperature Range C=Commercial (0 C to 70 C) Order Number PL586-55DC PL586-58DC PL586-55WC PL586-58WC Packaging Die Waffle Pack Wafer Micrel Inc., reserves the right to make changes in its products or specifications, or both at any time without notice. The in formation furnished by Micrel is believed to be accurate and reliable. However, Micrel makes no guarantee or warranty concerning the accuracy of said info rmation and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this pr oduct. LIFE SUPPORT POLICY: Micrel s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of Micrel Inc. Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 3/6/13 Page 5
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DATASHEET MK2771-16 Description The MK2771-16 is a low-cost, low-jitter, high-performance VCXO and clock synthesizer designed for set-top boxes. The on-chip Voltage Controlled Crystal Oscillator accepts
PT7C4511. PLL Clock Multiplier. Features. Description. Pin Configuration. Pin Description
Features Zero ppm multiplication error Input crystal frequency of 5-30 MHz Input clock frequency of - 50 MHz Output clock frequencies up to 200 MHz Peak to Peak Jitter less than 200ps over 200ns interval
VX-805 Voltage Controlled Crystal Oscillator
VX-805 Voltage Controlled Crystal Oscillator VX-805 Description The VX-805 is a Voltage Control Crystal Oscillator that operates at the fundamental frequency of the internal crystal. The crystal is a high-q
NOT RECOMMENDED FOR NEW DESIGNS. Features. Applications. Markets
NOT RECOMMENDED FOR NEW DESIGNS Low Voltage 1.2V/1.8V/2.5V CML 2x2 Crosspoint Switch 6.4Gbps with Equalization General Description The is a fully-differential, low-voltage 1.2V/1.8V/2.5V CML 2x2 crosspoint
SY89847U. General Description. Functional Block Diagram. Applications. Markets
1.5GHz Precision, LVDS 1:5 Fanout with 2:1 MUX and Fail Safe Input with Internal Termination General Description The is a 2.5V, 1:5 LVDS fanout buffer with a 2:1 differential input multiplexer (MUX). A
ICS512 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET
DATASHEET ICS512 Description The ICS512 is the most cost effective way to generate a high-quality, high frequency clock output and a reference clock from a lower frequency crystal or clock input. The name
3.3V/5V 2.5GHz PECL/ECL 1:4 FANOUT BUFFER WITH 2:1 INPUT MUX
3.3V/5V 2.5GHz PECL/ECL 1:4 FANOUT BUFFER WITH 2:1 INPUT MUX FEATURES High-speed 1:4 PECL/ECL fanout buffer 2:1 multiplexer input Guaranteed AC parameters over temp/voltage: > 2.5GHz f MAX (toggle) < 225ps
ICS501 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET
DATASHEET ICS501 Description The ICS501 LOCO TM is the most cost effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. The name LOCO stands
VVC1 VVC2 Voltage Controlled Crystal Oscillator
VVC1 VVC2 Voltage Controlled Crystal Oscillator Features The VVC1 Voltage Controlled Crystal Oscillator VCXO with a CMOS output Small 5.0 X 7.0 X 1.9 mm package Output frequencies to 66 MHz 5.0 or 3.3
PI6C557-03AQ. PCIe 2.0 Clock Generator with 2 HCSL Outputs for Automotive Applications. Description. Features. Pin Configuration (16-Pin TSSOP)
PCIe.0 Clock Generator with HCSL Outputs for Automotive Applications Features ÎÎPCIe.0 compliant à à Phase jitter -.1ps RMS (typ) ÎÎLVDS compatible outputs ÎÎSupply voltage of 3.3V ±10% ÎÎ5MHz crystal
TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER. Features
DATASHEET ICS280 Description The ICS280 field programmable spread spectrum clock synthesizer generates up to four high-quality, high-frequency clock outputs including multiple reference clocks from a low-frequency
MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET
DATASHEET MK1714-01 Description The MK1714-01 is a low cost, high performance clock synthesizer with selectable multipliers and percentages of spread spectrum designed to generate high frequency clocks
MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET
DATASHEET MK1714-02 Description The MK1714-02 is a low cost, high performance clock synthesizer with selectable multipliers and percentages of spread designed to generate high frequency clocks with low
VVC4 Voltage Controlled Crystal Oscillator
C4 oltage Controlled Crystal Oscillator Features ectron s Smallest CXO, 5.0 X 3.2 X 1.2 mm High Frequencies to 77.70 MHz 5.0 or 3.3 operation Linearity 10% Tri-State Output for testing Low jitter < 1ps
FailSafe PacketClock Global Communications Clock Generator
Features FailSafe PacketClock Global Communications Clock Generator Fully integrated phase-locked loop (PLL) FailSafe output PLL driven by a crystal oscillator that is phase aligned with external reference
Features. Applications. Markets
3.2Gbps Precision, 1:2 LVPECL Fanout Buffer with Internal Termination and Fail Safe Input General Description The is a 2.5/3.3V, high-speed, fully differential 1:2 LVPECL fanout buffer optimized to provide
Features VDD. PLL Clock Synthesis and Spread Spectrum Circuitry GND
DATASHEET ICS7151 Description The ICS7151-10, -20, -40, and -50 are clock generators for EMI (Electro Magnetic Interference) reduction (see below for frequency ranges and multiplier ratios). Spectral peaks