PL High Speed Translator Buffer to LVDS FEATURES PIN CONFIGURATION
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1 FEATURES Differential output Single AC coupled input (min. 100mV swing). Input range from 0 to 1.0GHz. 2.5V to 3.3V operation. Available in 8-Pin SOP or 3x3mm QFN GREEN/RoHS compliant packaging. PIN CONFIGURATION (TOP VIEW) _BAR DESCRIPTION 4 5 The is a low cost, high performance, high speed, buffer that reproduces any input fr e- quency from 0 to 1.0GHz. It provides a pair of differential output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from sine wave, TTL, CMOS, or PECL to _BAR OE^ Note: ^ denotes internal pull up BLOCK DIAGRAM Input _BAR Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 1/5/12 Page 1
2 PIN DESCRIPTIONS Name SOP-8L 1,3,7 Pin Number QFN-16L 1,2,4,5, 9,13,14,15 Type P Ground. 5,8 7,10,11,12 P Power supply. 2 3 I 4 6 O True output. _BAR 6 8 O Complementary output. Description Reference input signal. The frequency of this signal will be reproduced at the output (after translation to level). OE N/A 16 I Output enable ( 1 for enable). Internal pull -up (default is 1 ). ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage V DD 4.6 V Input Voltage, dc V I -0.5 V DD +0.5 V Output Voltage, dc V O -0.5 V DD +0.5 V Storage Temperature T S C Ambient Operating Temperature* T A C Junction Temperature T J 125 C Lead Temperature (soldering, 10s) 260 C ESD Protection, Human Body Model 2 kv Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permane nt damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the dev ice at these or any other conditions above the operational limits noted in this specification is not implied. *Operating temperature is guaranteed by design. Parts are tested to commercial grade only. 2. General Electrical Specifications Supply Current, No Load I DD Fout = 200MHz, ma Operating Voltage V DD V Output Clock Duty 1.25V () ±5% of input % Short Circuit Current 50 ma Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 1/5/12 Page 2
3 3. AC Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Input Frequency MHz Input signal swing input 100 mv Output Frequency MHz 4. Electrical Characteristics Output Differential Voltage V OD mv V DD Magnitude Change V OD mv Output High Voltage V OH R L = V Output Low Voltage V OL (see figure) V Offset Voltage V OS V Offset Magnitude Change V OS mv Power-off Leakage I O XD V ou t = V DD or, V DD = 0V 1 10 ua Output Short Circuit Current I O SD ma 5. Switching Characteristics Differential Clock Rise Time t r R L = ns C L = 10 pf Differential Clock Fall Time t f (see figure) ns Levels Test Circuit 50? VOD VOS Transistion Time Waveform 50? Switching Test Circuit 0V (Differential) 80% 80% CL = 10pF VDIFF 0V 20% 20% VDIFF RL = 100? tr tf CL = 10pF Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 1/5/12 Page 3
4 PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT) 8 PIN SOP ( dimensions in mm ) SOP-8L Symbol Min. Max. A A B C D E H L e 1.27 BSC A 1 e B D C E H L A QFN-16L Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 1/5/12 Page 4
5 ORDERING INFORMATION (GREEN PACKAGE COMPLIANT) For part ordering, please contact our Sales Department: 2180 Fortune Drive, San Jose, CA 95131, USA Tel: (408) Fax: (408) PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PART NUMBER PL X C TEMPERATURE C=COMMERCIAL (0 C to 70 C) I=INDUSTRAL (-40 C to 85 C) Part/Order Number Marking Package Option QC-R P pin QFN-16L - (Tape and Reel) SC P pin SOP-8L - (Tube) SC-R P pin SOP-8L - (Tape and Reel) Micrel Inc., reserves the right to make changes in its products or specifications, or both at any time witho ut notice. The information furnished by Micrel is believed to be accurate and reliable. However, Micrel makes no guarantee or warranty concerning the accuracy of said info rmation and shall not be responsible for any loss or damage of whatever nature resul ting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: Micrel s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of Micrel Inc. Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 1/5/12 Page 5
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D LATCH. SuperLite SY55853U FEATURES DESCRIPTION FUNCTIONAL BLOCK DIAGRAM APPLICATIONS
D LATCH FEATURES 2.5GHz min f max 2.3V to 5.7V power supply Single bit latch Stores or flows through 1 bit of data Optimized to work with family Fully differential Source terminated CML outputs for fast
SY56216R. General Description. Features. Applications. Functional Block Diagram. Markets
Low Voltage 1.2V/1.8V/2.5V CML Dual Channel Buffer 4.5GHz/6.4Gbps with Equalization General Description The is a fully-differential, low-voltage 1.2V/1.8V/2.5V CML Dual Channel Buffer with input equalization.
DSC V Low-Power CMOS Oscillator
DSC.V LowPower CMOS Oscillator General Description The DSC is a.v fixed frequency MEMS based PureSilicon Oscillator. It can be factory programmed to any frequency from to 5MHz. The DSC incorporates an
Dual, 3 V, CMOS, LVDS Differential Line Receiver ADN4664
Dual, 3 V, CMOS, LVDS Differential Line Receiver ADN4664 FEATURES ±15 kv ESD protection on output pins 400 Mbps (200 MHz) switching rates Flow-through pinout simplifies PCB layout 100 ps channel-to-channel
TOP VIEW. Maxim Integrated Products 1
19-2213; Rev 0; 10/01 Low-Jitter, Low-Noise LVDS General Description The is a low-voltage differential signaling (LVDS) repeater, which accepts a single LVDS input and duplicates the signal at a single
IDT5V60014 LOW PHASE NOISE ZERO DELAY BUFFER. Description. Features. Block Diagram DATASHEET
DATASHEET IDT5V60014 Description The IDT5V60014 is a high speed, high output drive, low phase noise Zero Delay Buffer (ZDB) which integrates IDT s proprietary analog/digital Phase Locked Loop (PLL) techniques.
Features. Applications. Markets
Low oltage 1.2/1.8 CML 2:1 MUX 3.2Gbps, 2.5GHz General Description The is a fully differential, low voltage 1.2/1.8 CML 2:1 MUX. The can process clock signals as fast as 3.2GHz or data patterns up to 3.2Gbps.
Features. Ordering Information VCC MIC8114 RESET
MIC8114 Microprocessor Reset Circuit General Description The MIC8114 is an inexpensive microprocessor supervisory circuit that monitors the power supply in microprocessor based systems. The function of
NOT RECOMMENDED FOR NEW DESIGNS. Features. Applications. Markets
NOT RECOMMENDED FOR NEW DESIGNS Low Voltage 1.2V/1.8V/2.5V CML 2x2 Crosspoint Switch 6.4Gbps with Equalization General Description The is a fully-differential, low-voltage 1.2V/1.8V/2.5V CML 2x2 crosspoint
ULTRA PRECISION 4 4 CML SWITCH WITH INTERNAL I/O TERMINATION
ULTRA PRECISION 4 4 CML SWITCH WITH INTERNAL I/O TERMINATION Precision Edge FEATURES Provides crosspoint switching between any input pair to any output pair Ultra-low jitter design: 67fs RMS phase jitter
1.25Gbps HIGH-SPEED LIMITING POST AMPLIFIER Not recommended for new designs
1.25Gbps HIGH-SPEED LIMITING POST AMPLIFIER Not recommended for new designs FEATURES DESCRIPTION Up to 1.25Gbps operation Low noise Chatter-Free Generation Open Collector TTL Output TTL /EN Input Differential
SGM8706 Micro-Power, RRIO, 1.8V, Push-Pull Output Comparator with Integrated Voltage Reference GENERAL DESCRIPTION FEATURES APPLICATIONS
Micro-Power, RRIO, 1.V, Push-Pull Output GENERAL DESCRIPTION The is a low power comparator with a typical power supply current of 2.2µA. It features an uncommitted on-chip voltage reference, comparator
ICS LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER. Features. Description. Block Diagram INA INB SELA
BUFFER Description The ICS552-02 is a low skew, single-input to eightoutput clock buffer. The device offers a dual input with pin select for glitch-free switching between two clock sources. It is part
SY84403BL. General Description. Features. Applications. Typical Performance. Markets
Ultra Small 3.3V 4.25Gbps CML Low-Power Limiting Post Amplifier with TTL LOS General Description The is the industry s smallest limiting post amplifier ideal for compact copper and fiber optic module applications.
PO3B402A. High Bandwidth Potato Chip OE1 Y1+ Y1- GND SEL3 SEL1 D3- D3+ OE2 Y2+ Y2- Y3+ M3- M3+ OE3 SEL2 OE3 Y3+ Y3- SEL3 OE4 Y4+ Y4- SEL4
FEATURES: Patented technology High signal -3db passing bandwidth at GHz Near-Zero propagation delay CC =.65 to 3.6 Ultra-Low Quiescent Power: 0.µA typical Ideally suited for low power applications Industrial
2.5Gbps HIGH-SPEED LIMITING POST AMPLIFIER Not recommended for new designs
2.5Gbps HIGH-SPEED LIMITING POST AMPLIFIER Not recommended for new designs FEATURES DESCRIPTION Up to 2.5Gbps operation Low noise Chatter-Free generation Open Collector TTL output TTL /EN Input Differential
Single, 3 V, CMOS, LVDS Differential Line Receiver ADN4662
Data Sheet FEATURES ±15 kv ESD protection on input pins 400 Mbps (200 MHz) switching rates Flow-through pinout simplifies PCB layout 2.5 ns maximum propagation delay 3.3 V power supply High impedance outputs