PI6CX201A. 25MHz Jitter Attenuator. Features
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- Cleopatra Gallagher
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1 Features PLL with quartz stabilized XO Optimized for MHz input/output frequency Other frequencies available Low phase jitter less than 30fs typical Free run mode ±100ppm Single ended input and outputs 3.3V single supply Lock detection Industrial Temperature: 0 C to 8 C 0-pin TSSOP package Description The PI6CX01A is composed of a phase-locked loop with integrated XO oscillator for use in the clock jitter attenuation applications. It is optimized for use with a SaRonix-eCera crystal of MHz, and has typical output phase jitter less than 30fs (RMS). Block Diagram Pin Configuration External X1 1 0 X SaRonix-eCera xtal 19 AVDD Lock Detector AGND 3 18 Pre PFD Charge Pump Free_Run XO CLK_OUT1 CLK_OUT CLK_OUT1 CLK _OUT 7 1 FREE_RUN 8 13 External Connection Required
2 Pin Descriptions for 0-pin TSSOP Package Pin Name Type Pin No Description XI I 1 Crystal input pin I XO control voltage input I Loop filter pin for external loop filter connection AGND PWR 3 Analog ground,, I, 6, 7 LMOS selection pins for internal CLK_OUT divider, Pins have internal pull up resistor I 11 LMOS input clock signal to phase detector I 1 LMOS feedback clock signal to phase detector PWR 9, 13, 18 Digital ground PWR 10, 1 Digital power CLK_OUT O 1 LMOS output clock of the internal XO with divider controlled by and O 16 LMOS lock detect output, output is logic 0 when x is greater than 1MHz, and phase difference between x and is more than ns for 8 consecutive clock pulses. The clock pulse frequency is equal to the crystal frequency. CLK_OUT1 O 17 LMOS output clock of the internal XO AVDD PWR 19 Analog power X O 0 Crystal output pin FREE_RUN I 8 When FREE_RUN is logic low, chip is in "free run" mode. The output will remain fixed at a fixed frequency with up to a ±100ppm offset from the nominal MHz. Logic HIGH is normal mode, with output locked to the input. Internal pull-up. Frequency Selection Table Input Frequency Output Frequency MHz MHz 1.MHz MHz 33.33MHz MHz 66.67MHz MHz
3 Application Diagram MHz (SaRonix-eCera GC0006 commercial temp) (SaRonix-eCera GC00099 industrial temp) C C1 R1.01µF X1 AGND FREE_RUN VDD X AVDD XGND CLK _OUT1 CLK _OUT VDD.01µF VDD Ferrite bead.01µf 10µF Notes: 1. A feedback clock is required for lock. Pin 1 can be connected to pin 1 as shown above.. The network R1, C1:C comprises the external loop filter. The loop bandwidth and jitter peaking profiles are set by changing these values. Please consult factory to meet your requirement. 3. The crystal and loop filter components should be placed on the same side of the board as the IC. Components should be placed as close as possible to IC (within 300 mils).. A ground ring should enclose the loop filterr components along with pins and. 3
4 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested) Storage temperature to +10ºC Supply Voltage to Ground Potential (V DD ) to +.6V Inputs (Referenced to GND) to V DD +0.V Clock Output (Referenced to GND) to V DD +0.V Soldering Temperature (Max of 10 seconds)... 60ºC Latch up... 00mA ESD Protection (HBM) V 3.3V DC Electrical Characteristics Parameter Description Test Conditions Min. Max Units V DD 3.3V Supply Voltage V IL Input LOW Voltage 0.8 V IH Input HIGH Voltage V DD V I IL Input LOW Current V IN = 0V 0 I IH Input HIGH Current V IN = V DD 10 μa V OL Output LOW Voltage I OL = 8mA 0. V V OH Output HIGH Voltage I OL = -8mA. V T A Ambient Operatin Temperature -0 8 C Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 3.3V AC Electrical Characteristics Parameter Description Test Conditions Min. Typ Max Units F O Output Frequency CL = 1pF MHz BW Control Voltage Band Width -3 db, =1.6V KHz ΔFCLK Control Pull Range 0V V DD ±10 ppm t IDC Input Duty Cycle Measured at V DD / % t DC Output Duty Cycle Measured at V DD /, 1pF load 0 % t R, t F Rise and Fall Time CLK_OUT1 Measured from 0.V to.v, C L ns = 0pF t R, t F Rise and Fall Time CLK_OUT1 Measured from 0.V to.v, C L 3 ns = 1pF Jp Phase Jitter (RMS) 1kHz to Mhz ps F free Free Run Accuracy ±100 ppm
5 Loop Filter Selection Table Loop Band Charge Pump O Gain Feedback R1 C1 C Width Current 100Hz 3uA.KHz/V 1.1K Ohm 1uF 0.1uF Packaging Mechanicals: 0-Pin TSSOP (L) Recommended Crystal: SaRonix-eCERA Part Number: GC0006 Ordering Information (1-3) Notes: Ordering Code Package Code Package Description PI6CX01ALE L 0-pin TSSOP, Pb-free & Green GC0006 N/A Commercial temperature 9S SMD Crystal GC00099 N/A Industrial temperature 9S SMD Crystal 1. Thermal characteristics can be found on the company web site at E = Pb-free and Green 3. Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation
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DATASHEET ICS542 Description The ICS542 is cost effective way to produce a high-quality clock output divided from a clock input. The chip accepts a clock input up to 156 MHz at 3.3 V and produces a divide
More informationDescription IA 3 IA 2 IA 1 GND. Truth Table (1) H X X Hi-Z Disable S 0-1. L L L I0 S1-0 = 0 L L H I1 S1-0 = 1 Y A to Y B
Features Near-Zero propagation delay 5Ω switches connect inputs to outputs High signal passing bandwidth (300MHz) Beyond Rail-to-Rail switching 5V I/O tolerant with 3.3V supply 2.5V and 3.3V supply voltage
More informationLOCO PLL CLOCK MULTIPLIER. Features
DATASHEET ICS501A Description The ICS501A LOCO TM is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input. The name LOCO stands
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DATASHEET MK3722 Description The MK3722 is a low cost, low jitter, high performance VCXO and PLL clock synthesizer designed to replace expensive discrete VCXOs and multipliers. The patented on-chip Voltage
More informationMK3727D LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET
DATASHEET MK3727D Description The MK3727D combines the functions of a VCXO (Voltage Controlled Crystal Oscillator) and PLL (Phase Locked Loop) frequency doubler onto a single chip. Used in conjunction
More informationVCC1 VCC1. CMOS Crystal Oscillator. Description. Features. Applications. Block Diagram. Output V DD GND E/D. Crystal. Oscillator
CC1 CMOS Crystal Oscillator CC1 Description ectron s CC1 Crystal Oscillator (XO) is a quartz stabilized square wave generator with a CMOS output. The CC1 uses a fundamental or 3rd overtone crystal resulting
More informationVVC4 Voltage Controlled Crystal Oscillator
C4 oltage Controlled Crystal Oscillator Features ectron s Smallest CXO, 5.0 X 3.2 X 1.2 mm High Frequencies to 77.70 MHz 5.0 or 3.3 operation Linearity 10% Tri-State Output for testing Low jitter < 1ps
More information20MHz to 134MHz Spread-Spectrum Clock Modulator for LCD Panels DS1181L
Rev 1; /0 0MHz to 13MHz Spread-Spectrum General Description The is a spread-spectrum clock modulator IC that reduces EMI in high clock-frequency-based, digital electronic equipment. Using an integrated
More informationICS511 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET
DATASHEET ICS511 Description The ICS511 LOCO TM is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input. The name LOCO stands
More informationICS NETWORKING CLOCK SYNTHESIZER. Description. Features. Block Diagram DATASHEET
DATASHEET Description The generates four high-quality, high-frequency clock outputs. It is designed to replace multiple crystals and crystal oscillators in networking applications. Using ICS patented Phase-Locked
More informationICS2510C. 3.3V Phase-Lock Loop Clock Driver. Integrated Circuit Systems, Inc. General Description. Pin Configuration.
Integrated Circuit Systems, Inc. ICS250C 3.3V Phase-Lock Loop Clock Driver General Description The ICS250C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology
More informationFIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER. Features VDD PLL1 PLL2 GND
DATASHEET ICS252 Description The ICS252 is a low cost, dual-output, field programmable clock synthesizer. The ICS252 can generate two output frequencies from 314 khz to 200 MHz using up to two independently
More informationPI5C32X384/32X384C. 20-Bit, 2-Port Bus Switch. Features. Description. Pin Configuration. Block Diagram. Pin Description
PI5C32X384/32X384C Features Near-Zero propagation delay 5Ω switches connect inputs to outputs Direct bus connection when switches are ON Ultra-low quiescent power 32X384 (0.2µA typical) Ideally suited
More informationPI5C3384 PI5C3384C. 10-Bit, 2-Port Bus Switch
PI5C3384 PI5C3384C 0-Bit, 2-Port Bus Switch Features: Near-Zero propagation delay 5Ω switches connect inputs to outputs Direct bus connection when switches are ON Ultra-low quiescent power (0.2μA typical)
More informationOne-PLL General Purpose Clock Generator
One-PLL General Purpose Clock Generator Features Integrated phase-locked loop Low skew, low jitter, high accuracy outputs Frequency Select Pin 3.3V Operation with 2.5 V Output Option 16-TSSOP Benefits
More informationVT-802 VT-802. Temperature Compensated Crystal Oscillator. Description
T-802 Temperature Compensated Crystal Oscillator T-802 Description ectron s T-802 Temperature Compensated Crystal Oscillator (TCXO) is a quartz stabilized, CMOS output, analog temperature compensated oscillator,
More informationFeatures VDD. PLL Clock Synthesis and Spread Spectrum Circuitry GND
DATASHEET ICS7151 Description The ICS7151-10, -20, -40, and -50 are clock generators for EMI (Electro Magnetic Interference) reduction (see below for frequency ranges and multiplier ratios). Spectral peaks
More informationPI3L V Quad, 2:1 Mux/DeMux Fast Ethernet LAN Switch w/ Single Enable. Description. Features. Applications. Pin Configuration.
Features R ON is 4Ω typical Low crosstalk: 27dB @ 250 MHz Near-Zero propagation delay: 250ps Switching speed: 9ns Channel On capacitance: 9pF (typical) Operating Range: +3.0V to +3.6V >2kV ESD protection
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