12-27 MHz XO IC with 1 Pair of LVDS and 1 CMOS Outputs

Size: px
Start display at page:

Download "12-27 MHz XO IC with 1 Pair of LVDS and 1 CMOS Outputs"

Transcription

1 FETURES Low jitter XO for the 2MHz to 27MHz range. Integrated crystal load capacitor: no external load capacitor required. pair of LVDS outputs and CMOS output MHz fundamental crystal input. Low jitter (RMS): 2.5 ps period jitter ( sigma). 2.5V to 3.3V operation. vailable in 8-Pin SOIC package. VDD XIN X GND PIN CONFIGURTION (Top View) CMOS_CLK LVDSBR_CLK LVDS_CLK GND DESCRIPTION (8 pin SOIC) The is a high performance multiple output XO IC chip. It provides pair of LVDS and CMOS outputs. The chip combines a crystal oscillator (XO) with a multiple-output buffer. It accepts a low cost fundamental parallel resonant mode crystal from 2MHz to 27MHz, which is reproduced at the outputs. The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for data and telecommunication applications. BLOCK DIGRM XIN X Oscillator mplifier CMOS_CLK LVDS_CLK LVDSBR_CLK Esperanza., Rancho Santa Margarita, Ca Ph: Fax: /2/05 Page

2 PIN DESCRIPTION Name Pin Number Type Description VDD P Power Supply. XIN 2 I Crystal input. This is the input of the crystal oscillator circuitry. The crystal should be mounted as close to the IC as possible, with minimum parasitic capacitance. X 3 I Crystal output. This is the output of the crystal oscillator circuitry. The crystal should be mounted as close to the IC as possible, with minimum parasitic capacitance. GND 4,5 P Ground. LVDS_CLK 6 O LVDS output. LVDSBR_CLK 7 O LVDS complementary output. CMOS_CLK 8 O CMOS output. ELECTRICL SPECIFICTIONS. bsolute Maximum Ratings PRMETERS SYMBOL MIN. MX. UNITS Supply Voltage VDD 4.6 V Input Voltage, dc VI -0.5 VDD+0.5 V Output Voltage, dc VO -0.5 VDD+0.5 V Storage Temperature TS C mbient Operating Temperature* T C Junction Temperature TJ 25 C Lead Temperature (soldering, 0s) 260 C ESD Protection, Human Body Model 2 kv Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIL and INDUSTRIL), but tested for COMMERCIL grade only. 2. Crystal Specifications Crystal Resonator Frequency FXIN Parallel Fundamental Mode 2 27 MHz Crystal Loading Rating CL (xtal) 2.5 pf Recommended ESR RE 30 Ω Esperanza., Rancho Santa Margarita, Ca Ph: Fax: /2/05 Page 2

3 3. General Electrical Specifications Operating Voltage VDD V CMOS outputs Supply Current, Dynamic (with Loaded IDD Fout = 2 MHz 5 20 loaded with 5pF, LVDS outputs loaded Outputs) Fout = 25 MHz with 00 Ω m Short Circuit Current ±50 m 4. C Electrical Specifications Input Crystal Frequency 2 27 MHz Output Clock Rise Time tr 0.8V ~ 2.0V with 0 pf load.5 tr 0.3V ~ 3.0V with 5 pf load 2 5 Output Clock Fall Time tf 2.0V ~ 0.8V with 0 pf load.5 tf 3.0V ~ 0.3V with 5pF load 2 5 ns Output Clock Duty Cycle 5. Jitter Specifications V (LVDS) % VDD (CMOS) PRMETERS CONDITIONS FREQUENCY MIN. TYP. MX. UNITS Period jitter RMS Peak to Peak jitter With capacitive decoupling between VDD and GND. With capacitive decoupling between VDD and GND. Over 0,000 cycles. 6. CMOS Output Electrical Specifications 25MHz ps 25MHz 8 30 ps Output High Voltage VOH IOH = -2m 2.4 V Output Low Voltage VOL IOL = 2m 0.4 V Output High Voltage at CMOS level VOHC IOH = -4m VDD 0.4 V Output drive current t TTL level 0 m 7. CMOS Switching Characteristics Output Clock Rise/Fall Time 0.8V ~ 2.0V with 0 pf load.5 (Standard Drive) 0.3V ~ 3.0V with 5 pf load 2.4 Output Clock Rise/Fall Time 0.8V ~ 2.0V with 0 pf load 0.5 ns (High Drive) 0.3V ~ 3.0V with 5 pf load.5 % Esperanza., Rancho Santa Margarita, Ca Ph: Fax: /2/05 Page 3

4 8. LVDS Electrical Characteristics Output Differential Voltage VOD mv VDD Magnitude Change VOD mv Output High Voltage VOH RL = 00 Ω.4.6 V Output Low Voltage VOL (see figure) 0.9. V Offset Voltage VOS V Offset Magnitude Change VOS mv Power-off Leakage IOXD Vout = VDD or GND VDD = 0V ± ±0 u Output Short Circuit Current IOSD m 9. LVDS Switching Characteristics Differential Clock Rise Time tr RL = 00 Ω ns CL = 0 pf Differential Clock Fall Time tf (see figure) ns LVDS Levels Test Circuit LVDS Switching Test Circuit 50Ω C L = 0pF V OD V OS V DIFF R L = 00Ω 50Ω C L = 0pF LVDS Transistion Time Waveform 0V (Differential) 80% 80% V DIFF 0V 20% 20% t R t F Esperanza., Rancho Santa Margarita, Ca Ph: Fax: /2/05 Page 4

5 PCKGE INFORMTION 8 PIN SOIC (mm ) Narrow SOIC Symbol Min. Max B C D E H L e.27 BSC e B D C E H L ORDERING INFORMTION For part ordering, please contact our Sales Department: Esperanza., Rancho Santa Margarita, Ca Ph: Fax: PRT NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range S C PRT NUMBER TEMPERTURE C=COMMERCIL I=INDUSTRIL PCKGE TYPE S=SOIC Order Number Marking Package Option SC-T SC SOIC - Tape and Reel SC SC SOIC - Tube bracon Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by bracon is believed to be accurate and reliable. However, bracon makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: bracon s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of bracon Corporation Esperanza., Rancho Santa Margarita, Ca Ph: Fax: /2/05 Page 5

ABB3009. High Speed Translator Buffer to LVDS ABB3009 FEATURES PIN CONFIGURATION

ABB3009. High Speed Translator Buffer to LVDS ABB3009 FEATURES PIN CONFIGURATION FEATURES Differential output Single AC coupled input (min. 100mV swing). Input range from DC to 1.0 GHz. 2.5V to 3.3V operation. Available in 8-Pin SOIC or 3x3mm QFN. DESCRIPTION The is a low cost, high

More information

[S3,S0] REF_SEL. PLL (Phase Locked Loop)

[S3,S0] REF_SEL. PLL (Phase Locked Loop) ABX02 FEATURES Selectable multipliers (x2.5, x2.75, x3, x4.25, x5, x5.5, x5.75, x6, x6.25, x0, x, x.5, x2, x2.5). Crystal input range, 3MHz to 3MHz (see Selection Table for detailed acceptable input ranges).

More information

PL High Speed Translator Buffer to LVDS FEATURES PIN CONFIGURATION

PL High Speed Translator Buffer to LVDS FEATURES PIN CONFIGURATION FEATURES Differential output Single AC coupled input (min. 100mV swing). Input range from 0 to 1.0GHz. 2.5V to 3.3V operation. Available in 8-Pin SOP or 3x3mm QFN GREEN/RoHS compliant packaging. PIN CONFIGURATION

More information

OE CLKC CLKT PL PL PL PL602-39

OE CLKC CLKT PL PL PL PL602-39 PL602-3x XIN VDD / * SEL0^ / VDD* SEL^ FEATURES Selectable 750kHz to 800MHz range. Low phase noise output -27dBc/Hz for 55.52MHz @ 0kHz offset -5dBc/Hz for 622.08MHz @ 0kHz offset LVCMOS (PL602-37), LVPECL

More information

Phase Detector. Selectable / 1,/ 2,/4,/8. Selectable / 1,/2

Phase Detector. Selectable / 1,/ 2,/4,/8. Selectable / 1,/2 Programming Logic PL611-01 FEATURES Advanced programmable PLL design Very low Jitter and Phase Noise (30-70ps Pk-Pk typical) Up to 3 programmable outputs Output frequency up to 200MHz CMOS. Accepts Crystal

More information

PL XIN CLK XOUT VCON. Xtal Osc. Varicap. Low Phase Noise VCXO (17MHz to 36MHz) PIN CONFIGURATION FEATURES DESCRIPTION BLOCK DIAGRAM

PL XIN CLK XOUT VCON. Xtal Osc. Varicap. Low Phase Noise VCXO (17MHz to 36MHz) PIN CONFIGURATION FEATURES DESCRIPTION BLOCK DIAGRAM FEATURES PIN CONFIGURATION VCXO output for the 17MHz to 36MHz range Low phase noise (-130dBc @ 10kHz offset at 35.328MHz) LVCMOS output with OE tri-state control 17 to 36MHz fundamental crystal input Integrated

More information

ICS LOW PHASE NOISE CLOCK MULTIPLIER. Features. Description. Block Diagram DATASHEET

ICS LOW PHASE NOISE CLOCK MULTIPLIER. Features. Description. Block Diagram DATASHEET DATASHEET ICS601-01 Description The ICS601-01 is a low-cost, low phase noise, high-performance clock synthesizer for applications which require low phase noise and low jitter. It is IDT s lowest phase

More information

Analog Frequency Multiplier

Analog Frequency Multiplier Analog Frequency Multiplier DESCRIPTION Analog Frequency Multipliers TM (AFMs) are the industry s first Balanced Oscillator utilizing analog multiplication of the fundamental frequency (at double or quadruple

More information

19MHz to 800MHz Low Phase-Noise XO PIN CONFIGURATION

19MHz to 800MHz Low Phase-Noise XO PIN CONFIGURATION PL685-XX FEATURES < 0.5ps RMS phase jitter (12kHz to 20MHz) at 622.08MHz 30ps max peak to peak period jitter Ultra Low-Power Consumption о < 90 ma @622MHz PECL output о

More information

Low Phase Noise, LVPECL VCXO (for 150MHz to 160MHz Fundamental Crystals) FEATURES. * Internal 60KΩ pull-up resistor

Low Phase Noise, LVPECL VCXO (for 150MHz to 160MHz Fundamental Crystals) FEATURES. * Internal 60KΩ pull-up resistor 0.952mm VDD QB PL586-55/-58 FEATURES DIE CONFIGURATION Advanced non multiplier VCXO Design for High Performance Crystal Oscillators Input/Output Range: 150MHz to 160MHz Phase Noise Optimized for 155.52MHz:

More information

Dual, 3 V, CMOS, LVDS High Speed Differential Driver ADN4663

Dual, 3 V, CMOS, LVDS High Speed Differential Driver ADN4663 Dual, 3 V, CMOS, LVDS High Speed Differential Driver ADN4663 FEATURES ±15 kv ESD protection on output pins 600 Mbps (300 MHz) switching rates Flow-through pinout simplifies PCB layout 300 ps typical differential

More information

PCI-EXPRESS CLOCK SOURCE. Features

PCI-EXPRESS CLOCK SOURCE. Features DATASHEET ICS557-01 Description The ICS557-01 is a clock chip designed for use in PCI-Express Cards as a clock source. It provides a pair of differential outputs at 100 MHz in a small 8-pin SOIC package.

More information

ICS571 LOW PHASE NOISE ZERO DELAY BUFFER. Description. Features. Block Diagram DATASHEET

ICS571 LOW PHASE NOISE ZERO DELAY BUFFER. Description. Features. Block Diagram DATASHEET DATASHEET Description The is a high speed, high output drive, low phase noise Zero Delay Buffer (ZDB) which integrates IDT s proprietary analog/digital Phase Locked Loop (PLL) techniques. IDT introduced

More information

NETWORKING CLOCK SYNTHESIZER. Features

NETWORKING CLOCK SYNTHESIZER. Features DATASHEET ICS650-11 Description The ICS650-11 is a low cost, low jitter, high performance clock synthesizer customized for BroadCom. Using analog Phase-Locked Loop (PLL) techniques, the device accepts

More information

ICS512 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET

ICS512 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET DATASHEET ICS512 Description The ICS512 is the most cost effective way to generate a high-quality, high frequency clock output and a reference clock from a lower frequency crystal or clock input. The name

More information

ICS502 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET

ICS502 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET DATASHEET ICS502 Description The ICS502 LOCO TM is the most cost effective way to generate a high-quality, high-frequency clock output and a reference from a lower frequency crystal or clock input. The

More information

Low-Power, 1.62V to 3.63V, 1MHz To 150MHz, 1:2 Fanout Buffer IC OE CLK1. DFN-6L (2.0 x 1.3 x 0.6mm) FIN CLK1

Low-Power, 1.62V to 3.63V, 1MHz To 150MHz, 1:2 Fanout Buffer IC OE CLK1. DFN-6L (2.0 x 1.3 x 0.6mm) FIN CLK1 FEATURES 2 LVCMOS Outputs Input/Output Frequency: 1MHz to 150MHz Supports LVCMOS or Sine Wave Input Clock Extremely low additive Jitter 8 ma Output Drive Strength Low Current Consumption Single 1.8V, 2.5V,

More information

SGM7SZ04 Small Logic Inverter

SGM7SZ04 Small Logic Inverter Preliminary Datasheet SGM7SZ04 GENERL DESCRIPTION The SGM7SZ04 is a single inverter from SGMICRO s Small Logic series. The device is fabricated with advanced CMOS technology to achieve ultra-high speed

More information

Note: ^ Deno tes 60K Ω Pull-up resisto r. Phase Detector F VCO = F REF * (M/R) F OUT = F VCO / P

Note: ^ Deno tes 60K Ω Pull-up resisto r. Phase Detector F VCO = F REF * (M/R) F OUT = F VCO / P FEATURES Advanced programmable PLL with Spread Spectrum Crystal or Reference Clock input o Fundamental crystal: 10MHz to 40MHz o Reference input: 1MHz to 200MHz Accepts 0.1V reference signal input voltage

More information

PL565-37/38 VCXO Family

PL565-37/38 VCXO Family (Preliminary) Analog Frequency Multiplier PRODUCT DESCRIPTION The Analog Frequency Multiplier (AFM) is the industry s first Balanced Oscillator utilizing analog multiplication of the fundamental frequency

More information

LOW PHASE NOISE CLOCK MULTIPLIER. Features

LOW PHASE NOISE CLOCK MULTIPLIER. Features DATASHEET Description The is a low-cost, low phase noise, high performance clock synthesizer for applications which require low phase noise and low jitter. It is IDT s lowest phase noise multiplier. Using

More information

ICS511 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET

ICS511 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET DATASHEET ICS511 Description The ICS511 LOCO TM is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input. The name LOCO stands

More information

MK2705 AUDIO CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

MK2705 AUDIO CLOCK SOURCE. Description. Features. Block Diagram DATASHEET DATASHEET MK2705 Description The MK2705 provides synchronous clock generation for audio sampling clock rates derived from an MPEG stream, or can be used as a standalone clock source with a 27 MHz crystal.

More information

Phase Detector. Charge Pump. F out = F VCO / (4*P)

Phase Detector. Charge Pump. F out = F VCO / (4*P) PL611-30 FEATURES Advanced programmable PLL design Very low Jitter and Phase Noise (< 40ps Pk -Pk typ.) Supports complementary LVCMOS outputs to drive LVPECL and LVDS i nputs. Output Frequencies: o < 400MHz

More information

ICS722 LOW COST 27 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET

ICS722 LOW COST 27 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET DATASHEET ICS722 Description The ICS722 is a low cost, low-jitter, high-performance 3.3 volt designed to replace expensive discrete s modules. The on-chip Voltage Controlled Crystal Oscillator accepts

More information

ICS LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER. Description. Features. Block Diagram DATASHEET

ICS LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER. Description. Features. Block Diagram DATASHEET DATASHEET ICS670-04 Description The ICS670-04 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT s proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical

More information

19MHz to 250MHz Low Phase-Noise XO PAD CONFIGURATION

19MHz to 250MHz Low Phase-Noise XO PAD CONFIGURATION FEATURES < 0.6ps RMS phase jitter (12kHz to 20MHz) at 155.52MHz 30ps max peak to peak period jitter 8bit Switch Capacitor for ±50PPM crystal CLoad tuning о Load Capacitance Tuning Range: 8pF to 12pF Ultra

More information

LOCO PLL CLOCK MULTIPLIER. Features

LOCO PLL CLOCK MULTIPLIER. Features DATASHEET ICS501A Description The ICS501A LOCO TM is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input. The name LOCO stands

More information

ICS LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER. Description. Features. Block Diagram DATASHEET

ICS LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER. Description. Features. Block Diagram DATASHEET DATASHEET ICS670-02 Description The ICS670-02 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT s proprietary analog/digital Phase Locked Loop (PLL) techniques. Part of IDT

More information

ICS PCI-EXPRESS CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

ICS PCI-EXPRESS CLOCK SOURCE. Description. Features. Block Diagram DATASHEET DATASHEET ICS557-0 Description The ICS557-0 is a clock chip designed for use in PCI-Express Cards as a clock source. It provides a pair of differential outputs at 00 MHz in a small 8-pin SOIC package.

More information

MK2703 PLL AUDIO CLOCK SYNTHESIZER. Description. Features. Block Diagram DATASHEET

MK2703 PLL AUDIO CLOCK SYNTHESIZER. Description. Features. Block Diagram DATASHEET DATASHEET MK2703 Description The MK2703 is a low-cost, low-jitter, high-performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using IDT

More information

FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVER

FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVER IDT74FCT2245T/CT FST CMOS OCTL BIDIRECTIONL TRNSCEIVER FST CMOS OCTL BIDIRECTIONL TRNSCEIVER INDUSTRIL TEMPERTURE RNGE IDT74FCT2245T/CT FETURES: and C grades Low input and output leakage 1μ (max.) CMOS

More information

MK1413 MPEG AUDIO CLOCK SOURCE. Features. Description. Block Diagram DATASHEET

MK1413 MPEG AUDIO CLOCK SOURCE. Features. Description. Block Diagram DATASHEET DATASHEET MK1413 Description The MK1413 is the ideal way to generate clocks for MPEG audio devices in computers. The device uses IDT s proprietary mixture of analog and digital Phase-Locked Loop (PLL)

More information

Low-Power, 1.62V to 3.63V, 1MHz to 150MHz, 1:3 Fanout Buffer IC CLK2 VDD CLK0 SOT23-6L

Low-Power, 1.62V to 3.63V, 1MHz to 150MHz, 1:3 Fanout Buffer IC CLK2 VDD CLK0 SOT23-6L FEATURES 3 LVCMOS Outputs 12mA Output Drive Strength Input/Output Frequency: o Reference Clock: 1MHz to 150MHz Supports LVCMOS or Sine Wave Input Clock Very Low Jitter and Phase Noise Low Current Consumption

More information

ICS650-40A ETHERNET SWITCH CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

ICS650-40A ETHERNET SWITCH CLOCK SOURCE. Description. Features. Block Diagram DATASHEET DTSHEET ICS650-40 Description The ICS650-40 is a clock chip designed for use as a core clock in Ethernet Switch applications. Using IDT s patented Phase-Locked Loop (PLL) techniques, the device takes a

More information

Features VDD 2. 2 Clock Synthesis and Control Circuitry. Clock Buffer/ Crystal Oscillator GND

Features VDD 2. 2 Clock Synthesis and Control Circuitry. Clock Buffer/ Crystal Oscillator GND DATASHEET Description The is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a.5 MHz or 5.00

More information

ICS553 LOW SKEW 1 TO 4 CLOCK BUFFER. Description. Features. Block Diagram DATASHEET

ICS553 LOW SKEW 1 TO 4 CLOCK BUFFER. Description. Features. Block Diagram DATASHEET DATASHEET ICS553 Description The ICS553 is a low skew, single input to four output, clock buffer. Part of IDT s ClockBlocks TM family, this is our lowest skew, small clock buffer. See the ICS552-02 for

More information

Dual, 3 V, CMOS, LVDS Differential Line Receiver ADN4664

Dual, 3 V, CMOS, LVDS Differential Line Receiver ADN4664 Dual, 3 V, CMOS, LVDS Differential Line Receiver ADN4664 FEATURES ±15 kv ESD protection on output pins 400 Mbps (200 MHz) switching rates Flow-through pinout simplifies PCB layout 100 ps channel-to-channel

More information

Features. Applications. Micrel Inc Fortune Drive San Jose, CA USA tel +1 (408) fax + 1 (408)

Features. Applications. Micrel Inc Fortune Drive San Jose, CA USA tel +1 (408) fax + 1 (408) Flexible Ultra-Low Jitter Clock Synthesizer Clockworks FLEX General Description The SM802xxx series is a member of the ClockWorks family of devices from Micrel and provide an extremely low-noise timing

More information

ICS507-01/02 PECL Clock Synthesizer

ICS507-01/02 PECL Clock Synthesizer Description The ICS507-01 and ICS507-02 are inexpensive ways to generate a low jitter 155.52 MHz (or other high speed) differential PECL clock output from a low frequency crystal input. Using Phase-Locked-

More information

DIFFERENTIAL ECL-to-TTL TRANSLATOR

DIFFERENTIAL ECL-to-TTL TRANSLATOR DIFFERENTIAL ECL-to-TTL TRANSLATOR FEATURES DESCRIPTION 2.6ns typical propagation delay Differential ECL inputs 24mA TTL outputs Flow-through pinouts Available in 8-pin SOIC package The is a differential

More information

IDT5V60014 LOW PHASE NOISE ZERO DELAY BUFFER. Description. Features. Block Diagram DATASHEET

IDT5V60014 LOW PHASE NOISE ZERO DELAY BUFFER. Description. Features. Block Diagram DATASHEET DATASHEET IDT5V60014 Description The IDT5V60014 is a high speed, high output drive, low phase noise Zero Delay Buffer (ZDB) which integrates IDT s proprietary analog/digital Phase Locked Loop (PLL) techniques.

More information

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE IDT23S05 FEATURES: Phase-Lock Loop Clock Distribution 10MHz to 133MHz operating frequency Distributes one clock input to one bank of five outputs

More information

LOCO PLL CLOCK MULTIPLIER. Features

LOCO PLL CLOCK MULTIPLIER. Features DATASHEET ICS501 Description The ICS501 LOCO TM is the most cost effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. The name LOCO stands

More information

Programmable Low Voltage 1:10 LVDS Clock Driver ADN4670

Programmable Low Voltage 1:10 LVDS Clock Driver ADN4670 Data Sheet Programmable Low Voltage 1:10 LVDS Clock Driver FEATURES FUNCTIONAL BLOCK DIAGRAM Low output skew

More information

Single, 3 V, CMOS, LVDS Differential Line Receiver ADN4662

Single, 3 V, CMOS, LVDS Differential Line Receiver ADN4662 Data Sheet FEATURES ±15 kv ESD protection on input pins 400 Mbps (200 MHz) switching rates Flow-through pinout simplifies PCB layout 2.5 ns maximum propagation delay 3.3 V power supply High impedance outputs

More information

ICS NETWORKING CLOCK SYNTHESIZER. Description. Features. Block Diagram DATASHEET

ICS NETWORKING CLOCK SYNTHESIZER. Description. Features. Block Diagram DATASHEET DATASHEET Description The generates four high-quality, high-frequency clock outputs. It is designed to replace multiple crystals and crystal oscillators in networking applications. Using ICS patented Phase-Locked

More information

SERIALLY PROGRAMMABLE CLOCK SOURCE. Features

SERIALLY PROGRAMMABLE CLOCK SOURCE. Features DATASHEET ICS307-02 Description The ICS307-02 is a versatile serially programmable clock source which takes up very little board space. It can generate any frequency from 6 to 200 MHz and have a second

More information

ICS NETWORKING AND PCI CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

ICS NETWORKING AND PCI CLOCK SOURCE. Description. Features. Block Diagram DATASHEET DATASHEET Description The is a low cost frequency generator designed to support networking and PCI applications. Using analog/digital Phase Locked-Loop (PLL) techniques, the device uses a standard fundamental

More information

MK VCXO AND SET-TOP CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

MK VCXO AND SET-TOP CLOCK SOURCE. Description. Features. Block Diagram DATASHEET DATASHEET MK2771-16 Description The MK2771-16 is a low-cost, low-jitter, high-performance VCXO and clock synthesizer designed for set-top boxes. The on-chip Voltage Controlled Crystal Oscillator accepts

More information

3 V, LVDS, Quad, CMOS Differential Line Driver ADN4665

3 V, LVDS, Quad, CMOS Differential Line Driver ADN4665 3 V, LVDS, Quad, CMOS Differential Line Driver ADN4665 FEATURES ±15 kv ESD protection on output pins 400 Mbps (200 MHz) switching rates 100 ps typical differential skew 400 ps maximum differential skew

More information

ICS HDTV AUDIO/VIDEO CLOCK SOURCE. Features. Description. Block Diagram DATASHEET

ICS HDTV AUDIO/VIDEO CLOCK SOURCE. Features. Description. Block Diagram DATASHEET DATASHEET ICS662-03 Description The ICS662-03 provides synchronous clock generation for audio sampling clock rates derived from an HDTV stream. The device uses the latest PLL technology to provide superior

More information

Features. Applications

Features. Applications PCIe Fanout Buffer 267MHz, 8 HCSL Outputs with 2 Input MUX PrecisionEdge General Description The is a high-speed, fully differential 1:8 clock fanout buffer optimized to provide eight identical output

More information

ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET

ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET DATASHEET ICS180-51 Description The ICS180-51 generates a low EMI output clock from a clock or crystal input. The device uses IDT s proprietary mix of analog and digital Phase-Locked Loop (PLL) technology

More information

Features VDD. PLL Clock Synthesis and Spread Spectrum Circuitry GND

Features VDD. PLL Clock Synthesis and Spread Spectrum Circuitry GND DATASHEET ICS7151 Description The ICS7151-10, -20, -40, and -50 are clock generators for EMI (Electro Magnetic Interference) reduction (see below for frequency ranges and multiplier ratios). Spectral peaks

More information

MK74CB218 DUAL 1 TO 8 BUFFALO CLOCK DRIVER. Description. Features. Block Diagram DATASHEET. Family of IDT Parts

MK74CB218 DUAL 1 TO 8 BUFFALO CLOCK DRIVER. Description. Features. Block Diagram DATASHEET. Family of IDT Parts DTSHEET MK74CB218 Description The MK74CB218 Buffalo is a monolithic CMOS high speed clock driver. It consists of two identical single input to eight low-skew output, non-inverting clock drivers. This eliminates

More information

SiT9156 LVPECL, LVDS Oscillator (XO) with 0.3 ps Jitter for 10Gb Ethernet

SiT9156 LVPECL, LVDS Oscillator (XO) with 0.3 ps Jitter for 10Gb Ethernet Features 0.3 ps RMS phase jitter (random) for 10GbE applications Frequency stability as low as ±10 PPM 100% drop-in replacement for quartz and SAW oscillators Configurable positive frequency shift, +25,

More information

ICS663 PLL BUILDING BLOCK

ICS663 PLL BUILDING BLOCK Description The ICS663 is a low cost Phase-Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO)

More information

LOW SKEW 1 TO 4 CLOCK BUFFER. Features

LOW SKEW 1 TO 4 CLOCK BUFFER. Features DATASHEET ICS651 Description The ICS651 is a low skew, single input to four output, clock buffer. Part of IDT s ClockBlocks TM family, this is a low skew, small clock buffer. IDT makes many non-pll and

More information

3.3V ZERO DELAY CLOCK MULTIPLIER

3.3V ZERO DELAY CLOCK MULTIPLIER 3.3V ZERO DELAY CLOCK MULTIPLIER IDT2308 FEATURES: Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 1 operating frequency Distributes one clock input to two banks of four outputs

More information

CLK1 GND. Phase Detector F VCO = F REF * (2 * M/R) VCO. P-Counter (14-bit) F OUT = F VCO / (2 * P) Programming Logic

CLK1 GND. Phase Detector F VCO = F REF * (2 * M/R) VCO. P-Counter (14-bit) F OUT = F VCO / (2 * P) Programming Logic PL611s-19 PL611s-19 FEATURES Designed for Very Low-Power applications Input Frequency, AC Coupled: o Reference Input: 1MHz to 125MHz o Accepts >0.1V input signal voltage Output Frequency up to 125MHz LVCMOS

More information

NB3N502/D. 14 MHz to 190 MHz PLL Clock Multiplier

NB3N502/D. 14 MHz to 190 MHz PLL Clock Multiplier 4 MHz to 90 MHz PLL Clock Multiplier Description The NB3N502 is a clock multiplier device that generates a low jitter, TTL/CMOS level output clock which is a precise multiple of the external input reference

More information

ICS HIGH PERFORMANCE VCXO. Features. Description. Block Diagram DATASHEET

ICS HIGH PERFORMANCE VCXO. Features. Description. Block Diagram DATASHEET DATASHEET ICS3726-02 Description The ICS3726-02 is a low cost, low-jitter, high-performance designed to replace expensive discrete s modules. The ICS3726-02 offers a wid operating frequency range and high

More information

Features. Applications

Features. Applications 267MHz 1:2 3.3V HCSL/LVDS Fanout Buffer PrecisionEdge General Description The is a high-speed, fully differential 1:2 clock fanout buffer with a 2:1 input MUX optimized to provide two identical output

More information

ICS663 PLL BUILDING BLOCK. Description. Features. Block Diagram DATASHEET

ICS663 PLL BUILDING BLOCK. Description. Features. Block Diagram DATASHEET DATASHEET ICS663 Description The ICS663 is a low cost Phase-Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled

More information

MK3721 LOW COST 16.2 TO 28 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET. MK3721D is recommended for new designs.

MK3721 LOW COST 16.2 TO 28 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET. MK3721D is recommended for new designs. DATASHEET MK3721 Description The MK3721 series of devices includes the original MK3721S and the new MK3721D. The MK3721D is a drop-in replacement for the MK3721S device. Compared to the earlier device,

More information

Features. EXTERNAL PULLABLE CRYSTAL (external loop filter) FREQUENCY MULTIPLYING PLL 2

Features. EXTERNAL PULLABLE CRYSTAL (external loop filter) FREQUENCY MULTIPLYING PLL 2 DATASHEET 3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL MK2049-34A Description The MK2049-34A is a VCXO Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 khz

More information

ICS LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER. Features. Description. Block Diagram INA INB SELA

ICS LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER. Features. Description. Block Diagram INA INB SELA BUFFER Description The ICS552-02 is a low skew, single-input to eightoutput clock buffer. The device offers a dual input with pin select for glitch-free switching between two clock sources. It is part

More information

Preliminary. 2.0 FREQUENCY CHARACTERISTICS Line Parameter Test Condition Value Unit 2.1 Frequency 8 to 1500 MHz 2.2 Operating Temperature Range

Preliminary. 2.0 FREQUENCY CHARACTERISTICS Line Parameter Test Condition Value Unit 2.1 Frequency 8 to 1500 MHz 2.2 Operating Temperature Range RXO5032P SMD Clock Oscillator () High Performance XO in 5 x 3.2 mm Surface Mount package Product description The RXO5032P XO combines very low RMS phase jitter and tight frequency stability in a small

More information

The PL is an advanced Spread Spectrum clock generator (SSCG), and a member of PicoPLL Programmable Clock family.

The PL is an advanced Spread Spectrum clock generator (SSCG), and a member of PicoPLL Programmable Clock family. FEATURES Advanced programmable PLL with Spread Spectrum Reference Clock input o 1MHz to 200MHz Output Frequency o

More information

MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET

MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET DATASHEET MK1714-02 Description The MK1714-02 is a low cost, high performance clock synthesizer with selectable multipliers and percentages of spread designed to generate high frequency clocks with low

More information

PO74G2308A FEATURES: DESCRIPTION: Description. 700MHz TTL/CMOS Potato Chip. BUF_IN OUTPUT 1 to OUTPUT 8. Outputs. 1.2V - 3.6V 1:8 CMOS Clock Driver

PO74G2308A FEATURES: DESCRIPTION: Description. 700MHz TTL/CMOS Potato Chip. BUF_IN OUTPUT 1 to OUTPUT 8. Outputs. 1.2V - 3.6V 1:8 CMOS Clock Driver FEATURES:. Patented technology. Operating frequency up to 700MHz with 2pf load. Operating frequency up to 550MHz with 5pf load. Operating frequency up to 350MHz with 15pf load. Operating frequency up to

More information

MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET

MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET DATASHEET MK1714-01 Description The MK1714-01 is a low cost, high performance clock synthesizer with selectable multipliers and percentages of spread spectrum designed to generate high frequency clocks

More information

ICS QUAD PLL CLOCK SYNTHESIZER. Description. Features. Block Diagram PRELIMINARY DATASHEET

ICS QUAD PLL CLOCK SYNTHESIZER. Description. Features. Block Diagram PRELIMINARY DATASHEET PRELIMINARY DATASHEET ICS348-22 Description The ICS348-22 synthesizer generates up to 9 high-quality, high-frequency clock outputs including multiple reference clocks from a low frequency crystal or clock

More information

TOP VIEW. Maxim Integrated Products 1

TOP VIEW. Maxim Integrated Products 1 19-2213; Rev 0; 10/01 Low-Jitter, Low-Noise LVDS General Description The is a low-voltage differential signaling (LVDS) repeater, which accepts a single LVDS input and duplicates the signal at a single

More information

ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET

ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET DATASHEET ICS180-01 Description The ICS180-01 generates a low EMI output clock from a clock or crystal input. The device uses IDT s proprietary mix of analog and digital Phase Locked Loop (PLL) technology

More information

ICS Glitch-Free Clock Multiplexer

ICS Glitch-Free Clock Multiplexer Description The ICS580-01 is a clock multiplexer (mux) designed to switch between 2 clock sources with no glitches or short pulses. The operation of the mux is controlled by an input pin but the part can

More information

ICS7151A-50 SPREAD SPECTRUM CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET

ICS7151A-50 SPREAD SPECTRUM CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET DATASHEET ICS7151A-50 Description The ICS7151A-50 is a clock generator for EMI (Electromagnetic Interference) reduction. Spectral peaks are attenuated by modulating the system clock frequency. Down or

More information

ICS OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS. Description. Features (all) Features (specific) DATASHEET

ICS OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS. Description. Features (all) Features (specific) DATASHEET DATASHEET ICS552-01 Description The ICS552-01 produces 8 low-skew copies of the multiple input clock or fundamental, parallel-mode crystal. Unlike other clock drivers, these parts do not require a separate

More information

CARDINAL COMPONENTS. Operating Conditions: Description Min Max Unit

CARDINAL COMPONENTS. Operating Conditions: Description Min Max Unit Standard Package Options Series CPP Part Numbering Example: CPP C 1 L Z - A5 B6 - XXXXXX TS CPP C 1 L Z A5 SERIES CPP OUTPUT C = CMOS T = TTL Specifications: PACKAGE STYLE 1 = Full Size 4 = Half Size 5

More information

500MHz TTL/CMOS Potato Chip

500MHz TTL/CMOS Potato Chip FEATURES:. Patent pending technology. Max input frequency > 1GHz. Operating frequency up to 500MHz with 2pf load. Operating frequency up to 450MHz with 5pf load. Operating frequency up to 300MHz with 15pf

More information

Low voltage 16-bit constant current LED sink driver with auto power-saving. Description

Low voltage 16-bit constant current LED sink driver with auto power-saving. Description Low voltage 16-bit constant current LED sink driver with auto power-saving Datasheet - production data Features Low voltage power supply down to 3 V 16 constant current output channels Adjustable output

More information

ICS Low Skew PCI / PCI-X Buffer. General Description. Block Diagram. Pin Configuration. Pin Descriptions OE CLK0

ICS Low Skew PCI / PCI-X Buffer. General Description. Block Diagram. Pin Configuration. Pin Descriptions OE CLK0 Low Skew PCI / PCI-X Buffer General Description The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications

More information

M Form A Solid State Relay DESCRIPTION ABSOLUTE MAXIMUM RATINGS* OPTIONS/SUFFIXES* SCHEMATIC DIAGRAM APPROVALS PARAMETER UNIT MIN TYP MAX

M Form A Solid State Relay DESCRIPTION ABSOLUTE MAXIMUM RATINGS* OPTIONS/SUFFIXES* SCHEMATIC DIAGRAM APPROVALS PARAMETER UNIT MIN TYP MAX 1 Form DESCRIPTION The is a bi-directional, single-pole, single-throw, normally open solid-state relay in a miniature 4-pin small outline package. This device offers very low on-resistance--allowing for

More information

OSC2 Selector Guide appears at end of data sheet. Maxim Integrated Products 1

OSC2 Selector Guide appears at end of data sheet. Maxim Integrated Products 1 9-3697; Rev 0; 4/05 3-Pin Silicon Oscillator General Description The is a silicon oscillator intended as a low-cost improvement to ceramic resonators, crystals, and crystal oscillator modules as the clock

More information

PI6C49X0208. High Performance 1:8 Multi-Voltage CMOS Buffer

PI6C49X0208. High Performance 1:8 Multi-Voltage CMOS Buffer Features 8 single-ended outputs Fanout Buffer Up to 200MHz output frequency Ultra low output additive jitter = 0.01ps (typ.) Selectable reference inputs support Xtal (10~50MHz), singleended and differential

More information

Frequency Generator and Integrated Buffer for PENTIUM

Frequency Generator and Integrated Buffer for PENTIUM Integrated Circuit Systems, Inc. ICS9159C-14 Frequency Generator and Integrated Buffer for PENTIUM General Description The ICS9159C-14 generates all clocks required for high speed RISC or CISC microprocessor

More information

STP16CP05. Low voltage 16-bit constant current LED sink driver. Description. Features

STP16CP05. Low voltage 16-bit constant current LED sink driver. Description. Features Low voltage 16-bit constant current LED sink driver Datasheet - production data Features Low voltage power supply down to 3 V 16 constant current output channels Adjustable output current through external

More information

3.3V ZERO DELAY CLOCK MULTIPLIER

3.3V ZERO DELAY CLOCK MULTIPLIER 3.3V ZERO DELAY CLOCK MULTIPLIER FEATURES: Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 1 operating frequency Distributes one clock input to two banks of four outputs Separate

More information

MK3711 LOW COST 8 TO 16 MHZ 3.3 VOLT VCXO. Features. Description. Block Diagram DATASHEET

MK3711 LOW COST 8 TO 16 MHZ 3.3 VOLT VCXO. Features. Description. Block Diagram DATASHEET DATASHEET MK3711 Description The MK3711D is a drop-in replacement for the original MK3711S device. Compared to these earlier devices, the MK3711D offers a wider operating frequency range and improved power

More information

MK5811C LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET

MK5811C LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET DATASHEET MK5811C Description The MK5811C device generates a low EMI output clock from a clock or crystal input. The device is designed to dither a high emissions clock to lower EMI in consumer applications.

More information

2 TO 4 DIFFERENTIAL CLOCK MUX ICS Features

2 TO 4 DIFFERENTIAL CLOCK MUX ICS Features DATASHEET 2 TO 4 DIFFERENTIAL CLOCK MUX ICS557-06 Description The ICS557-06 is a two to four differential clock mux designed for use in PCI-Express applications. The device selects one of the two differential

More information

MK3727D LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET

MK3727D LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET DATASHEET MK3727D Description The MK3727D combines the functions of a VCXO (Voltage Controlled Crystal Oscillator) and PLL (Phase Locked Loop) frequency doubler onto a single chip. Used in conjunction

More information

ICS501 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET

ICS501 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET DATASHEET ICS501 Description The ICS501 LOCO TM is the most cost effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. The name LOCO stands

More information

ICS542 CLOCK DIVIDER. Features. Description. Block Diagram DATASHEET. NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01

ICS542 CLOCK DIVIDER. Features. Description. Block Diagram DATASHEET. NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 DATASHEET ICS542 Description The ICS542 is cost effective way to produce a high-quality clock output divided from a clock input. The chip accepts a clock input up to 156 MHz at 3.3 V and produces a divide

More information

PO74G139A. Pin Configuration. Logic Block Diagram. Pin Description. 74 Series Noise Cancellation GHz Logic FEATURES: DESCRIPTION:

PO74G139A. Pin Configuration. Logic Block Diagram. Pin Description. 74 Series Noise Cancellation GHz Logic FEATURES: DESCRIPTION: FEATURES:. Patented technology. Operating frequency up to 1.125GHz with 2pf load. Operating frequency up to 800MHz with 5pf load. Operating frequency up to 350MHz with 15pf load. VCC Operates from 1.65V

More information

PCS3P73U00/D. USB 2.0 Peak EMI reduction IC. General Features. Application. Product Description. Block Diagram

PCS3P73U00/D. USB 2.0 Peak EMI reduction IC. General Features. Application. Product Description. Block Diagram USB 2.0 Peak EMI reduction IC General Features 1x Peak EMI Reduction IC Input frequency: 10MHz - 60MHz @ 2.5V 10MHz - 70MHz @ 3.3V Output frequency: 10MHz - 60MHz @ 2.5V 10MHz - 70MHz @ 3.3V Supply Voltage:

More information

Description. This Clock Multiplier is the most cost-effective way to Input crystal frequency of 5-40 MHz

Description. This Clock Multiplier is the most cost-effective way to Input crystal frequency of 5-40 MHz PT7C4512 Features Description Zero ppm multiplication error This Clock Multiplier is the most cost-effective way to Input crystal frequency of 5-40 MHz generate a high quality, high frequency clock outputs

More information

DIFFERATIAL LOW POWER SPREAD SPECTRUM

DIFFERATIAL LOW POWER SPREAD SPECTRUM DIFFERATIAL LOW POWER SPREAD SPECTRUM OSCILLATOR 1.0 220.0 MHz SERIES FEATURES + 100% pin-to-pin drop-in replacement to quartz and MEMS based XO + Differential Low Power Spread Spectrum Oscillator for

More information