Reconfigurable 4-Frequency CMOS Oscillator Based on AlN Contour-Mode MEMS Resonators

Transcription

1 From the SelectedWorks of Chengjie Zuo October, 2010 Reconfigurable 4-Frequency CMOS Oscillator Based on AlN Contour-Mode MEMS Resonators Matteo Rinaldi, University of Pennsylvania Chengjie Zuo, University of Pennsylvania Jan Van der Spiegel, University of Pennsylvania Gianluca Piazza, University of Pennsylvania Available at:

2 /ULTSYM Reconfigurable 4-Frequency CMOS Oscillator Based on AlN Contour-Mode MEMS Resonators Matteo Rinaldi, Chengjie Zuo, Jan Van der Spiegel and Gianluca Piazza Department of Electrical and Systems Engineering University of Pennsylvania Philadelphia, PA, USA (rinaldim, czuo, jan, Abstract This paper reports on the first demonstration of a reconfigurable Complementary Metal Oxide Semiconductor (CMOS) oscillator based on MicroElectroMechanical System (MEMS) resonators operating at 4 different frequencies (268, 483, 690 and 785 MHz). A bank of multi-frequency switchable AlN Contour-Mode MEMS resonators (CMRs) were connected to a single CMOS oscillator circuit that can be configured to selectively operate in 4 different states with distinct oscillation frequencies. The phase noise (PN) of the reconfigurable oscillator was measured for each of the 4 different frequencies of operation showing values between -94 and -70 dbc/hz at 1 KHz offset and PN floor values as low as -165 dbc/hz at 1 MHz offset. Jitter values as low as 114 fs-rms (integrated 12 KHz - 20 MHz) and switching times as fast as 20 μs were measured. This first prototype represents a miniaturized solution (30X smaller) over commercially available Voltage Controlled SAW Oscillators (VCSOs) and potentially has the advantage of generating multiple stable frequencies without the need of cumbersome and power consuming phase locked loop (PLL) circuits. Keywords-Reconfigurable Oscillator; CMOS/MEMS Oscillator; MicroElectroMechanical Systems (MEMS); AlN Contour-Mode Resonator; Piezoelectric Resonator. hundreds of MHz for SAWs. When multiple and higher frequencies of operation are required, as in the case of oscillators for RF transceivers, phase locked loop (PLL) frequency synthesizers are typically employed [1]. PLL frequency synthesizers generate high frequency signals by multiplying the output frequency of a stable and accurate reference (implemented with a crystal or SAW oscillator) by a factor N. The introduction of a PLL significantly increases the chip area dedicated to the oscillator and the total power consumption of the system. Furthermore, the frequency multiplication used to achieve the required output frequency increases the phase noise of the output signal by 20 log (N) [1, 2]. In this perspective, the implementation of a reconfigurable oscillator that employs high Q mechanical elements at all the desired frequencies of operation without the need of a PLL is potentially extremely advantageous. Nevertheless, when a wide range of operating frequencies needs to be covered (large number of mechanical resonators is needed), quartz crystal and SAW resonators fail to represent a viable solution because of their limited maximum operating frequencies and large size. I. INTRODUCTION The demand of high-performance, single-chip, multi-band and reconfigurable radio frequency (RF) solutions for next generation wireless communication is steadily growing. A key element for the implementation of an RF transceiver is a stable frequency source, which acts as a reference signal enabling system synchronization and signal modulation. When a singlechip multi-band RF solution is pursued, a reconfigurable multifrequency source is highly desired. Single-frequency high-precision frequency sources are implemented by connecting a high quality factor (Q) mechanical resonator in the feedback network of a selfsustained oscillator circuit. The natural resonance frequency of the mechanical resonator determines the output frequency of the oscillator. Thanks to the very high Q, quartz crystal and surface acoustic wave (SAWs) resonators have been widely and successfully employed as frequency setting elements in high stability oscillator circuits. However, conventional quartz crystal and SAW oscillators can only provide a single output frequency (just a relatively small frequency tuning is possible), whose value is limited to tens of MHz for quartz crystals, and This work was supported by the National Consortium for MASINT Research (NCMR) and the National Science Foundation (NSF) Figure 1. Schematic view and micrograph of the reconfigurable CMOS oscillator prototype based on 4 (different frequency) AlN Conotur-Mode MEMS resonators. The insets show a schematic representation and an SEM picture of one of the CMRs. MicroElectroMechnical System (MEMS) resonators have emerged as promising alternative to bulky and unintegrable /10/$ IEEE IEEE International Ultrasonics Symposium Proceedings

3 quartz crystal and SAW resonators. Thanks to their small form factor, high frequency of operation and capability to be integrated with CMOS circuits, MEMS resonators represent the best candidate for the implementation of compact and multifrequency banks of high quality factor mechanical elements that can be used for the fabrication of next generation reconfigurable local oscillators (LOs) for RF transceivers. Different MEMS resonator technologies based on electrostatic [3, 4] or piezoelectric [5, 6] transduction have been investigated. Among these, the AlN contour-mode resonator (CMR) technology [5] has emerged as one of the most promising solutions in enabling the fabrication of multiple frequencies (100 MHz 10 GHz) and high performance resonators on the same silicon chip [7, 8, 9, 10, 11, 12, 13]. In this work a stepping stone towards the development of the next generation single-chip multi-band RF transceivers is set by demonstrating the first reconfigurable 4-frequency (268, 483, 690 and 785 MHz) CMOS oscillator based on MEMS resonators (Fig. 1). For the first time, a bank of multi-frequency switchable AlN CMRs were simultaneously connected to a single CMOS oscillator circuit that can be configured to selectively operate in 4 different states with distinct oscillation frequencies. Jitter values as low as 114 fs-rms (integrated 12 KHz - 20 MHz) and switching times as fast as 20 μs were measured. This first prototype is 30X smaller than dualfrequency commercially available Voltage Controlled SAW Oscillators (VCSOs) [14] and has the advantage of generating multiple stable frequencies by employing high quality factor mechanical elements at all the frequencies of operation without the need of a PLL. II. DESIGN A. Multi-frequency AlN Contour-Mode Resonator Bank The resonance frequencies of the 4 CMRs (Fig 1 - inset) of this work were properly designed to devise a reconfigurable oscillator covering a frequency spectrum from 250 to 800 MHz. To set the resonant frequency, the period [5], W, of the metal electrode patterned on the AlN plate was varied between 6 and 15 μm while the other geometrical dimensions, n, T and L (Fig. 1 - inset) were opportunely scaled [8] in order to maintain a low value of the device equivalent electrical impedance (Table 1). In addition, in order to maximize the transduction efficiency, thickness field excitation (TFE) [9] and lateral field excitation with floating bottom electrode (LFE-F) [11] were employed to excite a higher order contourextensional mode of vibration in the AlN structures. B. Multiplexed CMOS Oscillator The oscillator circuit topology used in this work is shown in Figure 2. The circuit consists of a Pierce oscillator implemented by means of a CMOS inverter biased in its active region. Transistors M1 and M2 form the CMOS inverting amplifier while transistor M3 acts as a large resistor to provide biasing of M1 and M2 in the active region. By employing this circuit topology the transconductance, g m, of the inverting amplifier is made proportional to the supply voltage V S1 [10], which allows optimizing the oscillator performance in terms of power consumption and phase noise depending upon the characteristics of the specific MEMS resonator connected in the feedback loop. By adjusting V S1 the AC gain of the inverting amplifier can be set to be equal or above the critical transconductance, g mc, needed for the oscillations to start. TABLE I. RESONATOR DESIGN PARAMETERS The four AlN CMRs are simultaneously connected to the Pierce-like oscillator circuit by means of an equivalent number of CMOS switches (Fig. 2) operating in a time multiplexed mode. Each switch is composed of a CMOS transmission gate whose dimensions are opportunely designed (by means of circuit simulations performed in Cadence) in order to minimize power loss and consequently maintain a low value of gain in the amplifier used to sustain the oscillation. In particular, by acting on the W/L ratio of the transmission gate transistor the values of on-resistance and the input/output capacitance of the switches can be opportunely set in order to minimize power dissipation. A large W/L ratio reduces the on-resistance of the switches (hence reduces power loss and eventually improves phase noise), but at the same time increases the values of their input/output capacitance, C p, which, as shown in Figure 3, needs instead to be kept smaller than the resonator geometrical capacitance, C 0, in order to limit excessive power dissipation. Figure 2. Micrograph and circuit schematic of the multiplexed CMOS oscillator chip (1.05 mm 2 ). The single CMOS Pierce-like oscillator circuit can be connected to up to 8 CMRs (4 in this work) by means of an equivalent number of CMOS switches operating in a time multiplexed mode and addressed by a 3 to 8 (2 to 4 in this work) digital decoder. Since multiple resonators with different values of geometrical capacitance, C 0, ( ff) are connected to the multiplexed oscillator, the value of C p needs to be designed to be smaller than the minimum possible values of C 0 (worst case scenario). On the other hand, the design of such small value of C P is associated with a high value of the switch on-resistance, R ON, which might negatively affect the performance of the oscillator. In fact, the insertion of the switch on-resistance, R ON, in the feedback loop of the circuit causes an increase in the IEEE International Ultrasonics Symposium Proceedings

4 required value of critical transconductance, g mc, necessary for the oscillations to start [9], hence an overall increase of the oscillator power consumption. A tradeoff between C P and R ON is therefore required. According to this consideration and given a minimum channel length, L, equal to 0.6 μm, set by the available CMOS technology, an optimum value for the width, W, of the transistors forming the switches was estimated to be approximately 18 μm by means of circuit simulations performed in Cadence. This design choice corresponds to values of C p of about 40 ff (smaller than the minimum C 0 value) and switch on-resistance, R ON, of about 210 Ω. As shown in figure 4, the designed value of R ON has a limited impact on the oscillator performance. In fact, an increase of the value of the amplifier critical transconductance by ~2.2X with respect to the case without switches is sufficient to compensate the additional loss introduced by the switches and sustain oscillations at all the operating frequencies. motional resistance, R m, of the resonator [9], whose value is inversely proportional to the device figure of merit, k t 2 Q [8]. Figure 4. Critical transconductance, g mc, normalized with respect to the case without switches as a function of the CMOS switch on-resistance, R ON (assuming C 1 =C 2 =500 ff). The designed value of R ON (~210 Ω) is compensated by an increase of the amplifier transconductance, g mc, by at most 2.2X. TABLE II. CMRS CHARACTERISTICS Figure 3. Schematic representation of two CMRs, Res1 and Res2, connected to the CMOS inverting amplifier, A, by means of two CMOS switches. In order to have V o V x (i.e. no power dissipation in the turned off resonator) the resonator geometrical capacitance, C 0, has to be larger than C p. Although just 2 resonators are shown in this schematic, 4 were effectively connected in the prototype presented in this paper. In order to reduce the number of pads necessary to control the sensor array, the CMOS switches are addressed through a 2 to 4 digital decoder integrated on-chip (Fig. 2). Each CMR is driven by the oscillator when the corresponding 2 bit address is presented to the decoder. III. EXPERIMENTAL RESULTS The four AlN CMRs were designed and fabricated on a single chip accordingly to what previously reported in [5, 8, 9, 11]. The electrical responses of the fabricated devices were characterized in an RF probe station and the admittance curves measured by an Agilent N5230A Network Analyzer after performing a short-open-load (SOL) calibration on a reference substrate. The measured electrical responses of the devices were fitted to the Modified Butterworth van Dyke (MBVD) equivalent electrical circuit [9] and showed high mechanical quality factor (reported value include losses due exclusively to the mechanical motional resistance), Q m, up to 3900 and electromechanical coupling, k t 2, up to 1.53% (Table 2). Such high values (> 20) of the device figure of merit, k t 2 Q, are of crucial importance for the direct connection of multiple CMRs to the low power multiplexed oscillator circuit. In fact, the primary power loss in such oscillator circuit is due to the The multiplexed CMOS oscillator chip was taped-out in the ON Semiconductor 0.5 μm CMOS process. Both the MEMS resonator die and the CMOS chip were attached to a custom designed PCB and all the electrical connections were made through wire-bonding (Fig. 1). The 4 combinations of the 2 bit address (corresponding to each of the CMRs in the bank) were cyclically provided to the decoder by a Data Acquisition (DAQ) system so as to sequentially turn on each resonator. Stable oscillation at all the 4 different frequencies of operation was achieved by applying supply voltages, V S1 and V S2 (buffer power supply) as low as 3.3 V and 3.0 V, respectively, which translate in a power consumption of 13 mw for the inverting amplifier and 22.5 mw for the buffer. By tuning the supply voltage, V S1, stable oscillation at the two lowest operating frequencies can be achieved with lower power consumption (398 μw at 268 MHz and 4 mw at 483 MHz). Despite the use of a 0.5 μm technology, the typical value of total power consumption (35.5 mw) for the reconfigurable oscillator of this work is ~6X smaller than the one achieved with commercially available VCSOs [14]. The switching time of the reconfigurable oscillator was measured by monitoring its transient response with an Agilent DSO80804A Oscilloscope. Switching times as fast as 20 μs were measured (Fig. 5) showing the capability to reconfigure the oscillator at rates in the MHz range. In order to characterize the noise performance of the reconfigurable oscillator prototype, the output of the oscillator IEEE International Ultrasonics Symposium Proceedings

5 was monitored via an Agilent E5052B Signal Source Analyzer. The phase noise of the reconfigurable oscillator was measured (Fig. 6) for each of the 4 different frequencies of operation showing values between -94 and -70 dbc/hz at 1 KHz offset and phase noise floor values as low as -165 dbc/hz at 1 MHz offset. These phase noise measurements translate in time domain jitter values as low as 114 fs-rms (integrated 12 KHz - 20 MHz) (Table 3). The figure of merit (FoM) [10] of this reconfigurable AlN CMR oscillator was also calculated for each of the 4 different frequencies of operation and the corresponding values are reported in Table III. These FoM are among the best ever reported for similar frequencies oscillators based on MEMS technologies [9, 10, 15]. transformational impact on the form factor (100 plus CMRs can fit in ~2 mm 2 ) and power consumption of next generation reconfigurable multi-frequency sources for RF transceivers. Figure 6. Measured phase noise for the 4-frequency reconfigurable AlN CMR oscillator. The supply voltage, V S1, was tuned for each of the 4 different operating frequencies in order to achieve optimum phase noise performances. TABLE III. OSCILLATOR PERFORMANCE AT THE 4 CMR FREQUENCIES Figure 5. Transient response of the reconficurable oscillator while swithcing from the 483 MHz to the 268 MHz output. The measured noise performances are comparable to those of commercially available Voltage Controlled SAW Oscillators (VCSOs) (based on two different SAW resonators) [14]. Therefore, this first prototype of reconfigurable CMR oscillator not only has the advantage of occupying only a fraction (30 X) of the area typically taken by VCSOs, but also meets the phase noise specifications for many different applications where VCSOs are typically used, such as SONET/SDH, Optical Transport Network, 10 Gigabit Ethernet and WiMax. IV. CONCLUSION In this work the first reconfigurable CMOS oscillator based on laterally vibrating MEMS resonators has been experimentally demonstrated. A bank of multi-frequency and switchable AlN Contour-Mode MEMS resonators (CMRs) were connected to a single oscillator circuit that can be configured to selectively operate in 4 different states with distinct oscillation frequencies (268, 483, 690 and 785 MHz). The phase noise of the reconfigurable oscillator was measured for each of the 4 different frequencies of operation showing values between -94 and -70 dbc/hz at 1 KHz offset and phase noise floor values as low as -165 dbc/hz at 1 MHz offset. The excellent results showcased by this demonstration hint that it is possible to envision new timing solutions in which large arrays (100 plus) of micromechanical resonators fully integrated with CMOS circuits could be used for frequency synthesis over a broad spectrum going from 10s MHz to few GHz. The use of large arrays of mechanical devices over cumbersome and inefficient circuit elements (such as PLLs) could have a ACKNOWLEDGMENT The authors thank Xiaotie Wu for helpful discussions on the multiplexed oscillator circuit design. We also thank the MOSIS Educational Program for the IC chip fabrication and the staff at the Wolf Nanofabrication Facility at Penn for their support in the MEMS fabrication. REFERENCES [1] B. Razavi, Monolithic phase-locked loops and clock recovery circuits: theory and design, Wiley-IEEE Press, [2] Vectron International, Phase Noise, Application Note, ( [3] C. T.-C. Nguyen, IEEE TUFFC, vol. 54, no. 2, pp , Feb [4] D. Weinstein et al., Proc. IEEE IEDM 2007 pp , [5] G. Piazza et al., J. MEMS vol. 15, no. 6, pp , Dec [6] R. Abdolvand et al., Proc. IEEE MEMS 2007, pp , [7] M. Rinaldi et al., Proc. IEEE MEMS 2009, pp , [8] M. Rinaldi et al., IEEE TUFFC, vol. 57, no. 1, pp , Jan [9] C. Zuo et al., J. MEMS, vol. 19, no. 3, pp , Jun [10] C. Zuo et al., IEEE TUFFC, vol. 57, no. 1, pp , Jan [11] M. Rinaldi et al., Proc. IEEE MEMS 2010, pp , Jan [12] M. Rinaldi et al., Proc. Hilton Head 2010, pp , Jun [13] C. Zuo et. al., Proc. IEEE CICC 2010, in press, Sep [14] Vectron International, Dual Frequency VCSO, VS-709, ( [15] H. M. Lavasani et al., Proc. IEEE MEMS 2008, pp , IEEE International Ultrasonics Symposium Proceedings