6.976 High Speed Communication Circuits and Systems Lecture 11 Voltage Controlled Oscillators

Transcription

1 6.976 High Speed Communication Circuits and Systems Lecture 11 Voltage Controlled Oscillators Michael Perrott Massachusetts Institute of Technology Copyright 2003 by Michael H. Perrott

2 VCO Design for Wireless Systems From Antenna and Bandpass Filter Z in PC board Mixer trace RF in IF out Z Package o LNA To Filter Interface Reference Frequency Frequency Synthesizer VCO LO signal Design Issues - Tuning Range need to cover all frequency channels - Noise impacts receiver blocking and sensitivity performance - Power want low power dissipation - Isolation want to minimize noise pathways into VCO - Sensitivity to process/temp variations need to make it manufacturable in high volume

3 VCO Design For High Speed Data Links From Broadband Transmitter PC board trace Z o Package Interface Z in Amp In Clock and Data Recovery Data Clk Data Out Data In Phase Detector Loop Filter Clk Out VCO Design Issues - Same as wireless, but: Required noise performance is often less stringent Tuning range is often narrower

4 Popular VCO Structures VCO Amp LC oscillator -R amp V in C L R p Ring oscillator V in -1 LC Oscillator: low phase noise, large area Ring Oscillator: easy to integrate, higher phase noise

5 Barkhausen s Criteria for Oscillation x = 0 e H(jw) y Barkhausen Criteria e(t) Closed loop transfer function Asin(w o t) Self-sustaining oscillation at frequency w o if y(t) H(jw o ) = 1 Asin(w o t) - Amounts to two conditions: Gain = 1 at frequency w o Phase = n360 degrees (n = 0,1,2, ) at frequency w o

6 Example 1: Ring Oscillator t (or Φ) A B C A A B Gain is set to 1 by saturating characteristic of inverters Phase equals 360 degrees at frequency of oscillation - Assume N stages each with phase shift Φ C A T - Alternately, N stages with delay t

7 Further Info on Ring Oscillators Due to their relatively poor phase noise performance, ring oscillators are rarely used in RF systems - They are used quite often in high speed data links, though We will focus on LC oscillators in this lecture Some useful info on CMOS ring oscillators - Maneatis et. al., Precise Delay Generation Using Coupled Oscillators, JSSC, Dec 1993 (look at pp for delay cell description) - Todd Weigandt s PhD thesis

8 Example 2: Resonator-Based Oscillator Z(jw) -1 V x G m V x R p C p L p V x 0-1 -G m Z(jw) Barkhausen Criteria for oscillation at frequency w o : - Assuming G m is purely real, Z(jw o ) must also be purely real

9 A Closer Look At Resonator-Based Oscillator R p 0 G m Z(jw) Z(jw) 0 90 o 0 o Z(jw) -90 o For parallel resonator at resonance - Looks like resistor (i.e., purely real) at resonance Phase condition is satisfied Magnitude condition achieved by setting G m R p = 1 w o 10 w o 10w o w

10 Impact of Different G m Values jw S-plane Open Loop Resonator Poles and Zero Increasing G m R p σ Locus of Closed Loop Pole Locations Root locus plot allows us to view closed loop pole locations as a function of open loop poles/zero and open loop gain (G m R p ) - As gain (G m R p ) increases, closed loop poles move into right half S-plane

11 Impact of Setting G m too low G m R p < 1 jw S-plane Closed Loop Step Response Open Loop Resonator Poles and Zero σ Locus of Closed Loop Pole Locations Closed loop poles end up in the left half S-plane - Underdamped response occurs Oscillation dies out

12 Impact of Setting G m too High Open Loop Resonator Poles and Zero jw S-plane G m R p > 1 σ Closed Loop Step Response Locus of Closed Loop Pole Locations Closed loop poles end up in the right half S-plane - Unstable response occurs Waveform blows up!

13 Setting G m To Just the Right Value jw S-plane G m R p = 1 Closed Loop Step Response Open Loop Resonator Poles and Zero σ Locus of Closed Loop Pole Locations Closed loop poles end up on jw axis - Oscillation maintained Issue G m R p needs to exactly equal 1 - How do we achieve this in practice?

14 Amplitude Feedback Loop Oscillator Output Adjustment of G m Peak Detector Desired Peak Value One thought is to detect oscillator amplitude, and then adjust G m so that it equals a desired value - By using feedback, we can precisely achieve G m R p = 1 Issues - Complex, requires power, and adds noise

15 Leveraging Amplifier Nonlinearity as Feedback V x -G m 0-1 Z(jw) I x V x (w) A 0 w o W I x (w) G m A 0 w o 2w o 3w o W Practical transconductance amplifiers have saturating characteristics - Harmonics created, but filtered out by resonator - Our interest is in the relationship between the input and the fundamental of the output

16 Leveraging Amplifier Nonlinearity as Feedback V x -G m 0-1 Z(jw) I x V x (w) A G m A I x (w) 0 w o W G m A G m A 0 w o 2w o 3w o W G m R p =1 A As input amplitude is increased - Effective gain from input to fundamental of output drops - Amplitude feedback occurs! (G m R p = 1 in steady-state)

17 One-Port View of Resonator-Based Oscillators Z active Z res Active Negative Resistance Generator Resonator Active Negative Resistance Z active Z res Resonator 1 -G m = -R p R p C p L p Convenient for intuitive analysis Here we seek to cancel out loss in tank with a negative resistance element - To achieve sustained oscillation, we must have

18 One-Port Modeling Requires Parallel RLC Network Since VCO operates over a very narrow band of frequencies, we can always do series to parallel transformations to achieve a parallel network for analysis C s L s R p C p L p R sc R sl - Warning in practice, RLC networks can have secondary (or more) resonant frequencies, which cause undesirable behavior Equivalent parallel network masks this problem in hand analysis Simulation will reveal the problem

19 Example Negative Resistance Oscillator L 1 L 2 Include loss in inductors and capacitors R L1 L 1 R L2 L 2 C 1 V s M 2 C 2 C 1 M 2 C 2 R C1 V s R C2 This type of oscillator structure is quite popular in current CMOS implementations - Advantages Simple topology Differential implementation (good for feeding differential circuits) Good phase noise performance can be achieved

20 Analysis of Negative Resistance Oscillator (Step 1) R L1 R L2 R p1 C p1 L p1 L p2 C p2 R p2 L 1 L 2 C 1 R C1 V s M 2 C 2 R C2 Narrowband parallel RLC model for tank V s M 2 Derive a parallel RLC network that includes the loss of the tank inductor and capacitor - Typically, such loss is dominated by series resistance in the inductor

21 Analysis of Negative Resistance Oscillator (Step 2) R p1 C p1 L p1 R p1 C p1 L p1 R p1 C p1 L p1 M G m1 V s Split oscillator circuit into half circuits to simplify analysis - Leverages the fact that we can approximate V s as being incremental ground (this is not quite true, but close enough) Recognize that we have a diode connected device with a negative transconductance value - Replace with negative resistor Note: G m is large signal transconductance value

22 Design of Negative Resistance Oscillator R p1 C p1 L p1 L p2 C p2 R p2 R p1 C p1 L p1 A M 2 A 1 -G m1 V s G m1 g m1 G m1 R p1 =1 Design tank components to achieve high Q - Resulting R p value is as large as possible Choose bias current ( ) for large swing (without going far into saturation) - We ll estimate swing as a function of shortly Choose transistor size to achieve adequately large g m1 - Usually twice as large as 1/R p1 to guarantee startup A

23 Calculation of Oscillator Swing R p1 C p1 L p1 L p2 C p2 R p2 A I 1 (t) I 2 (t) A V s M 2 Design tank components to achieve high Q - Resulting R p value is as large as possible Choose bias current ( ) for large swing (without going far into saturation) - We ll estimate swing as a function of in next slide Choose transistor size to achieve adequately large g m1 - Usually twice as large as 1/R p1 to guarantee startup

24 Calculation of Oscillator Swing as a Function of By symmetry, assume I 1 (t) is a square wave - We are interested in determining fundamental component (DC and harmonics filtered by tank) I 1 (t) /2 I 1 (f) /2 T W=T/2 T t 1 3π 1 π 1 T 1 W f - Fundamental component is - Resulting oscillator amplitude

25 Variations on a Theme Bottom-biased NMOS Top-biased NMOS Top-biased NMOS and PMOS L 1 L 2 M 3 M 4 C 1 M 2 C 2 L 1 L 2 L d V s C 1 M 2 C 2 C 1 M 2 C 2 Biasing can come from top or bottom Can use either NMOS, PMOS, or both for transconductor - Use of both NMOS and PMOS for coupled pair would appear to achieve better phase noise at a given power dissipation See Hajimiri et. al, Design Issues in CMOS Differential LC Oscillators, JSSC, May 1999 and Feb, 2000 (pp )

26 Colpitts Oscillator L V bias C 1 V 1 C 2 Carryover from discrete designs in which single-ended approaches were preferred for simplicity - Achieves negative resistance with only one transistor - Differential structure can also be implemented Good phase noise can be achieved, but not apparent there is an advantage of this design over negative resistance design for CMOS applications

27 Analysis of Cap Transformer used in Colpitts 1 R in = RL 2 N L C 1 V 1 Vout L C 1 C 2 1:N L C V 1 C 2 1 out RL N 2 C 2 R L R L V 1 =N C 1 C 2 C 1 C 2 = C 1 +C 2 N = C 1 C 1 +C 2 Voltage drop across R L is reduced by capacitive voltage divider - Assume that impedances of caps are less than R L at resonant frequency of tank (simplifies analysis) Ratio of V 1 to set by caps and not R L Power conservation leads to transformer relationship shown

28 Simplified Model of Colpitts L R p Include loss in tank L C 1 C 2 L R p 1/G m N 2 v out v out V bias 1/G m C 1 V 1 i d1 v 1 C 1 C 2 1/G m N 2 -G m Nv out C 2 Nv out C 1 C 2 C 1 C 2 = C 1 +C 2 N= C 1 C 1 +C 2 Purpose of cap transformer - Reduces loading on tank - Reduces swing at source node (important for bipolar version) C 1 C 2 L v out -1/G m N R p 1/G m N 2 Transformer ratio set to achieve best noise performance

29 Design of Colpitts Oscillator V bias L I 1 (t) C 1 A 1/G m V 1 G m1 C 1 C 2 L R eq = R p 1/G m N 2 v out -1/G m N C 2 g m1 NG m1 R eq =1 Design tank for high Q Choose bias current ( ) for large swing (without going far into saturation) Choose transformer ratio for best noise - Rule of thumb: choose N = 1/5 according to Tom Lee Choose transistor size to achieve adequately large g m1 A

30 Calculation of Oscillator Swing as a Function of I 1 (t) consists of pulses whose shape and width are a function of the transistor behavior and transformer ratio - Approximate as narrow square wave pulses with width W I 1 (t) I 1 (f) W average = - Fundamental component is T T t 1 T 1 W f - Resulting oscillator amplitude

31 Clapp Oscillator L L large C 3 V bias C 1 1/G m V 1 C 2 Same as Colpitts except that inductor portion of tank is isolated from the drain of the device - Allows inductor voltage to achieve a larger amplitude without exceeded the max allowable voltage at the drain Good for achieving lower phase noise

32 Simplified Model of Clapp Oscillator L C 3 V bias 1/G m L large C 1 V 1 L p C p R p C p +C 1 C 2 L p i d1 v out v 1 C 1 C 2 1/G m N 2 v out R p 1/G m N 2 -G m Nv out C 2 Nv out C 1 C 2 C 1 C 2 = C 1 +C 2 N= C 1 C 1 +C 2 C p +C 1 C 2 L p R p 1/G m N 2 Looks similar to Colpitts model - Be careful of parasitic resonances! v out -1/G m N

33 Hartley Oscillator C L 2 V 1 V bias L 1 C big Same as Colpitts, but uses a tapped inductor rather than series capacitors to implement the transformer portion of the circuit - Not popular for IC implementations due to the fact that capacitors are easier to realize than inductors

34 Simplified Model of Hartley Oscillator C L 2 V 1 R p C C L 1 +L 2 R p 1/G m N 2 V bias L 1 C big i d1 v 1 v out L 1 +L 2 1/G m N 2 v out -G m Nv out Nv out N= L 2 L 1 +L 2 C L 1 +L 2 R p 1/G m N 2 Similar to Colpitts, again be wary of parasitic resonances v out -1/G m N

35 Integrated Resonator Structures Inductor and capacitor tank - Lateral caps have high Q (> 50) - Spiral inductors have moderate Q (5 to 10), but completely integrated and have tight tolerance (< ± 10%) - Bondwire inductors have high Q (> 40), but not as integrated and have poor tolerance (> ± 20%) - Note: see Lecture 4 for more info on these Lateral Capacitor Spiral Inductor Bondwire Inductor A A package A A B die C 1 L m B B B

36 Integrated Resonator Structures Integrated transformer - Leverages self and mutual inductance for resonance to achieve higher Q - See Straayer et. al., A low-noise transformer-based 1.7 GHz CMOS VCO, ISSCC 2002, pp A B C par1 k C D L 1 L 2 C C par2 D A B

37 Quarter Wave Resonator λ 0 /4 Z L y x Z(λ 0 /4) z z L 0 Impedance calculation (from Lecture 4) - Looks like parallel LC tank! Benefit very high Q can be achieved with fancy dielectric Negative relatively large area (external implementation in the past), but getting smaller with higher frequencies!

38 Other Types of Resonators Quartz crystal - Very high Q, and very accurate and stable resonant frequency Confined to low frequencies (< 200 MHz) Non-integrated - Used to create low noise, accurate, reference oscillators SAW devices - High frequency, but poor accuracy (for resonant frequency) MEMS devices - Cantilever beams promise high Q, but non-tunable and haven t made it to the GHz range, yet, for resonant frequency - FBAR Q > 1000, but non-tunable and poor accuracy - Other devices are on the way!

39 Voltage Controlled Oscillators (VCO s) L 1 L 2 L V bias C var M 2 C var C 1 V s V 1 V cont C var V cont Include a tuning element to adjust oscillation frequency - Typically use a variable capacitor (varactor) Varactor incorporated by replacing fixed capacitance - Note that much fixed capacitance cannot be removed (transistor junctions, interconnect, etc.) Fixed cap lowers frequency tuning range

40 Model for Voltage to Frequency Mapping of VCO T=1/F vco VCO frequency versus V cont L 1 L 2 F vco C var V cont V s M 2 C var f o F out slope=k v V in V in V bias V bias V cont Model VCO in a small signal manner by looking at deviations in frequency about the bias point - Assume linear relationship between input voltage and output frequency

41 Model for Voltage to Phase Mapping of VCO Phase is more convenient than frequency for analysis - The two are related through an integral relationship Intuition of integral relationship between frequency and phase 1/F vco = α out(t) out(t) 1/F vco = α+ε

42 Frequency Domain Model of VCO Take Laplace Transform of phase relationship - Note that K v is in units of Hz/V T=1/F vco L 1 L 2 Frequency Domain VCO Model C var V cont V s M 2 C var v in 2πK v s Φ out V in V bias

43 Varactor Implementation Diode Version Consists of a reverse biased diode junction - Variable capacitor formed by depletion capacitance - Capacitance drops as roughly the square root of the bias voltage Advantage can be fully integrated in CMOS Disadvantages low Q (often < 20), and low tuning range (± 20%) V+ V+ V- C var P + N + V- Depletion Region N - n-well P - substrate V + -V -

44 A Recently Popular Approach The MOS Varactor Consists of a MOS transistor (NMOS or PMOS) with drain and source connected together - Abrupt shift in capacitance as inversion channel forms Advantage easily integrated in CMOS Disadvantage Q is relatively low in the transition region - Note that large signal is applied to varactor transition region will be swept across each VCO cycle V+ V+ V- C var W/L N + N + C ox V- Depletion Region P - C dep V T V + -V -

45 A Method To Increase Q of MOS Varactor LSB C W/L 2C 2W/L to VCO 4C 4W/L W/L Overall Capacitance C var Coarse Control MSB Coarse Control V control Fine Control Fine Control V control High Q metal caps are switched in to provide coarse tuning Low Q MOS varactor used to obtain fine tuning See Hegazi et. al., A Filtering Technique to Lower LC Oscillator Phase Noise, JSSC, Dec 2001, pp

46 Supply Pulling and Pushing L 1 L 2 L V bias C var M 2 C var C 1 V s V 1 V cont C var V cont Supply voltage has an impact on the VCO frequency - Voltage across varactor will vary, thereby causing a shift in its capacitance - Voltage across transistor drain junctions will vary, thereby causing a shift in its depletion capacitance This problem is addressed by building a supply regulator specifically for the VCO

47 Injection Locking VCO V noise (w) (w) V noise Vin w o W w o W Noise close in frequency to VCO resonant frequency can cause VCO frequency to shift when its amplitude becomes high enough V noise (w) V noise (w) V noise (w) w w o w w o w w o W W W (w) (w) (w) - w w w o - w w w o - w w w o W W W w - w w

48 Example of Injection Locking For homodyne systems, VCO frequency can be very close to that of interferers RF in(w) Interferer Desired Narrowband Signal LNA RF in Mixer W 0 w int w o LO signal LO frequency V in - Injection locking can happen if inadequate isolation from mixer RF input to LO port Follow VCO with a buffer stage with high reverse isolation to alleviate this problem