RFD14N05, RFD14N05SM, RFP14N05
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1 RFD4N, RFD4NSM, RFP4N Data Sheet July 999 File Number A, V,. Ohm, NChannel Power MOSFETs These are Nchannel power MOSFETs manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits, gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers and relay drivers. These transistors can be operated directly from integrated circuits. Formerly developmental type TA977. Ordering Information PART NUMBER PACKAGE BRAND RFD4N TO2AA F4N Features 4A, V r DS(ON) =.Ω Temperature Compensating PSPICE Model Peak Current vs Pulse Width Curve UIS Rating Curve 7 o C Operating Temperature Related Literature TB334 Guidelines for Soldering Surface Mount Components to PC Boards Symbol D RFD4NSM TO22AA F4N RFP4N TO22AB RFP4N G NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO22AA variant in the tape and reel, i.e., RFD4NSM9A. S Packaging JEDEC TO2AA SOURCE DRAIN GATE DRAIN (FLANGE) JEDEC TO22AA DRAIN (FLANGE) GATE SOURCE JEDEC TO22AB SOURCE DRAIN GATE DRAIN (FLANGE) 443 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. PSPICE is a registered trademark of MicroSim Corporation. or Copyright Intersil Corporation 999
2 Absolute Maximum Ratings T C = 2 o C, Unless Otherwise Specified RFD4N, RFD4NSM, RFP4N UNITS Drain to Source Voltage (Note ) S V Drain to Gate Voltage (R GS = 2kΩ) (Note ) V DGR V Gate to Source Voltage ± 2 V Continuous Drain Current I D 4 A Pulsed Drain Current (Note 3) I DM Refer to Peak Current Curve Pulsed Avalanche Rating E AS Refer to UIS Curve Power Dissipation P D 4 W Derate above 2 o C W/ o C Operating and Storage Temperature T J, T STG to 7 o C Maximum Temperature for Soldering Leads at.63in (.6mm) from Case for s t L 3 Package Body for s, See Techbrief T pkg 26 o C o C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE:. T J = 2 o C to o C. RFD4N, RFD4NSM, RFP4N Electrical Specifications T C = 2 o C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BS I D = 2µA, = V (Figure 9) V Gate Threshold Voltage (TH) =, I D = 2µA 2 4 V Zero Gate Voltage Drain Current I DSS = Rated BS, = V 2 µa =. x Rated BS, = V, T C = o C 2 µa Gate to Source Leakage Current I GSS = ±2V ± na Drain to Source On Resistance (Note 2) r DS(ON) I D = 4A, = V, (Figure ). Ω TurnOn Time t ON = 2V, I D 4A, = V, 6 ns TurnOn Delay Time t d(on) R GS = 2Ω, R L =.7Ω (Figure 3) 4 ns Rise Time t r 26 ns TurnOff Delay Time t d(off) 4 ns Fall Time t f 7 ns TurnOff Time t OFF ns Total Gate Charge Q g(tot) = V to 2V = 4V, I D = 4A, 4 nc Gate Charge at V Q g() = V to V R L = 2.6Ω I g(ref) =.4mA 2 nc Threshold Gate Charge Q g(th) = V to 2V (Figure 3). nc Input Capacitance C ISS = 2V, = V, f = MHz 7 pf Output Capacitance C OSS (Figure 2) pf Reverse Transfer Capacitance C RSS pf Thermal Resistance Junction to Case R θjc 3.2 o C/W Thermal Resistance Junction to Ambient R θja TO2 and TO22 o C/W R θja TO22 o C/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) V SD I SD = 4A. V Diode Reverse Recovery Time t rr I SD = 4A, di SD /dt = A/µs 2 ns NOTES: 2. Pulse Test: Pulse Width 3ms, Duty Cycle 2%. 3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current Capability Curve (Figure ). 444
3 RFD4N, RFD4NSM, RFP4N Typical Performance Curves Unless Otherwise Specified.2 6 POWER DISSIPATION MULTIPLIER I D, DRAIN CURRENT (A) T C, CASE TEMPERATURE ( o C) T C, CASE TEMPERATURE ( o C) 7 FIGURE. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE Z θjc, NORMALIZED THERMAL IMPEDANCE SINGLE PULSE t, RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE P DM t t2 NOTES: DUTY FACTOR: D = t /t 2 PEAK T J = P DM x Z θja x R θja T A I D, DRAIN CURRENT (A) OPERATION IN THIS AREA MAY BE LIMITED BY r DS(ON) T J = MAX RATED SINGLE T C = 2 o PULSE C µs ms ms DC ms, DRAIN TO SOURCE VOLTAGE (V) I DM, PEAK CURRENT CAPABILITY (A) = 2V = V TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION FOR TEMPERATURES ABOVE 2 o C DERATE PEAK CURRENT AS FOLLOWS: 7 T C I = I t, PULSE WIDTH (s) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE. PEAK CURRENT CAPABILITY 44
4 RFD4N, RFD4NSM, RFP4N Typical Performance Curves Unless Otherwise Specified (Continued) I AS, AVALANCHE CURRENT (A) If R = t AV = (L)(I AS )/(.3*RATED BS ) If R t AV = (L/R)ln[(I AS *R)/(.3*RATED BS ) ]. STARTING T J = o C STARTING T J = 2 o C. t AV, TIME IN AVALANCHE (ms) NOTE: Refer to Intersil Application Notes AN932 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING I D, DRAIN CURRENT (A) = 2V = V = V PULSE DURATION = µs DUTY CYCLE =.% MAX = 7V = 6V = V = 4.V 2 4 6, DRAIN TO SOURCE VOLTAGE (V) FIGURE 7. SATURATION CHARACTERISTICS T C = 2 o C I DS(ON), DRAIN TO SOURCE CURRENT (A) PULSE DURATION = µs DUTY CYCLE =.% MAX = V o C 2 o C 7 o C 2 4 6, GATE TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE I D = 2µA T J, JUNCTION TEMPERATURE ( o C) 2 FIGURE. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE (TH), NORMALIZED GATE THRESHOLD VOLTAGE =, I D = 2µA NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = µs DUTY CYCLE =.% MAX = V, ID = 4A T J, JUNCTION TEMPERATURE ( o C) T J, JUNCTION TEMPERATURE ( o C) 2 FIGURE. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE FIGURE. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 446
5 RFD4N, RFD4NSM, RFP4N Typical Performance Curves Unless Otherwise Specified (Continued) C, CAPACITANCE (pf) C ISS C OSS C RSS = V, f = MHz C ISS = C GS C GD C RSS = C GD C OSS C DS C GD 2 2, DRAIN TO SOURCE VOLTAGE (V) FIGURE 2. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE, DRAIN TO SOURCE VOLTAGE (V) = BS.7 BS. BS.2 BS R L = 3.7Ω I G(REF) =.4mA = V = BS I I G( REF) GREF ( ) 2 t, TIME (µs) I I G( ACT) GACT ( ) NOTE: Refer to Intersil Application Notes AN724 and AN726, FIGURE 3. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT CURRENT GATE DRIVE , GATE TO SOURCE VOLTAGE (V) Test Circuits and Waveforms BS L t P VARY t P TO OBTAIN REQUIRED PEAK I AS R G I AS DUT V t P I AS.Ω t AV FIGURE 4. UNCLAMPED ENERGY TEST CIRCUIT FIGURE. UNCLAMPED ENERGY WAVEFORMS t ON t OFF t d(on) t r t d(off) t f R L 9% 9% R GS DUT % % % PULSE WIDTH 9% % % FIGURE 6. SWITCHING TIME TEST CIRCUIT FIGURE 7. RESISTIVE SWITCHING WAVEFORMS 447
6 RFD4N, RFD4NSM, RFP4N Test Circuits and Waveforms (Continued) R L Q g(tot) = 2V Q g() = V DUT = 2V I G(REF) Q g(th) I G(REF) FIGURE. GATE CHARGE TEST CIRCUIT FIGURE 9. GATE CHARGE WAVEFORMS 44
7 PSPICE Electrical Model.SUBCKT RFP4N 2 3 ; rev 9/2/94 RFD4N, RFD4NSM, RFP4N CA 2.4e CB e CIN 6.2e DBODY 7 DBDMOD DBREAK DBKMOD DPLCAP DPLCAPMOD EBREAK EDS 4 EGS 3 6 ESG 6 6 EVTO 2 6 IT 7 LDRAIN 2 e9 LGATE e9 LSOURCE e9 MOS 6 6 MOSMOD M =.99 MOS2 6 2 MOSMOD M =. RBREAK 7 RBKMOD RDRAIN 6 RDSMOD 2.2e3 RGATE RIN 6 e9 RSCL RSCLMOD e6 RSCL2 e3 RSOURCE 7 RDSMOD 42.3e3 RVTO 9 RVTOMOD GATE LGATE 9 2 RGATE EVTO CA ESG 6 SA 2 3 SB EGS 6 RIN 6 DPLCAP S2B 3 6 VTO CIN CB EDS 2 MOS 4 RSCL RSCL2 ESCL S2A 4 3 RDRAIN DRAIN 2 LDRAIN DBREAK 7 EBREAK MOS2 RSOURCE 7 DBODY LSOURCE RBREAK 7 RVTO 9 IT VBAT 3 SOURCE SA SAMOD SB SBMOD S2A S2AMOD S2B S2BMOD VBAT 9 DC VTO ESCL VALUE = {(V(,)/ABS(V(,)))*(PWR(V(,)*e6/,6))}.MODEL DBDMOD D (IS =.e3 RS =.9e3 TRS = 2.3e3 TRS2 =.7e CJO = 6.4e TT = 4.2e).MODEL DBKMOD D (RS = 4.e TRS = 3.73e3 TRS2 = 3.2e).MODEL DPLCAPMOD D (CJO = 26.2e IS = e3 N = ).MODEL MOSMOD NMOS (VTO = 3.9 KP = 2.6 IS = e3 N = TOX = L = u W = u).model RBKMOD RES (TC = 7.73e4 TC2 = 2.2e6).MODEL RDSMOD RES (TC =.e3 TC2 = 2.3e).MODEL RSCLMOD RES (TC = 2.e3 TC2 =.3e).MODEL RVTOMOD RES (TC = 4.44e3 TC2 = 6.4e6).MODEL SAMOD VSWITCH (RON = e ROFF =. VON =.29 VOFF= 3.29).MODEL SBMOD VSWITCH (RON = e ROFF =. VON = 3.29 VOFF=.29).MODEL S2AMOD VSWITCH (RON = e ROFF =. VON = 2.2 VOFF= 2.7).MODEL S2BMOD VSWITCH (RON = e ROFF =. VON = 2.7 VOFF= 2.2).ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley. 449
8 RFD4N, RFD4NSM, RFP4N All Intersil semiconductor products are manufactured, assembled and tested under ISO9 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 3, Mail Stop 324 Melbourne, FL 3292 TEL: (47) 7247 FAX: (47) For information regarding Intersil Corporation and its products, see web site EUROPE Intersil SA Mercure Center, Rue de la Fusee 3 Brussels, Belgium TEL: (32) FAX: (32) ASIA Intersil (Taiwan) Ltd. 7F6, No. Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (6) FAX: (6)
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