IRF130, IRF131, IRF132, IRF133

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1 October 1997 SEMICONDUCTOR IRF13, IRF131, IRF132, IRF133 12A and 14A, 8V and 1V,.16 and.23 Ohm, N-Channel Power MOSFETs Features Description 12A and 14A, 8V and 1V r DS(ON) =.16Ω and.23ω Single Pulse Avalanche Energy Rated SOA is Power Dissipation Limited Nanosecond Switching Speeds Linear Transfer Characteristics High Input Impedance Related Literature - TB334 Guidelines for Soldering Surface Mount Components to PC Boards Ordering Information PART NUMBER PACKAGE BRAND These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA Symbol D IRF13 TO-24AA IRF13 IRF131 TO-24AA IRF131 IRF132 TO-24AA IRF132 IRF133 TO-24AA IRF133 NOTE: When ordering, use the entire part number. G S Packaging JEDEC TO-24AA DRAIN (FLANGE) GATE (PIN 1) SOURCE (PIN 2) CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright Harris Corporation File Number

2 Absolute Maximum Ratings T C = 25 o C, Unless Otherwise Specified IRF13 IRF131 IRF132 IRF133 UNITS Drain to Source Voltage (Note 1) V Drain to Gate Voltage (R GS = 2kΩ) (Note 1) V DGR V Continuous Drain Current I D 14 T C = 1 o C I D 9.9 Pulsed Drain Current (Note 3) I DM A Gate to Source Voltage V GS ±2 ±2 ±2 ±2 V Maximum Power Dissipation P D W Linear Derating Factor W/ o C Single Pulse Avalanche Energy Rating (Note 4) E AS mj Operating and Storage Temperature T J, T STG -55 to to to to 175 o C Maximum Temperature for Soldering Leads at.63in (1.6mm) from Case for 1s T L 3 Package Body for 1s, See Techbrief T pkg 26 CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. T J = 25 o C to 15 o C. IRF13, IRF131, IRF132, IRF A A o C o C Electrical Specifications T C = 25 o C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BS I D = 25µA, V GS = V, (Figure 1) IRF13, IRF V IRF131, IRF V Gate Threshold Voltage V GS(TH) = V GS, I D = 25µA V Zero Gate Voltage Drain Current I DSS = Rated BS, V GS = V µa =.8 x Rated BS, V GS = V, T J = 15 o C µa On-State Drain Current (Note 2) I D(ON) > I D(ON) x r DS(ON)MAX, V GS = 1V IRF13, IRF A IRF132, IRF A Gate to Source Leakage Current I GSS V GS = ±2V - - ±1 na Drain to Source On Resistance (Note 2) r DS(ON) I D = 8.3A, V GS = 1V, (Figure 8, 9) IRF13, IRF Ω IRF132, IRF Ω Forward Transconductance (Note 2) g ts 5V, I D = 8.3A, (Figure 12) S Turn-On Delay Time t d(on) V DD = 5V, I D 14A, R G = 12Ω, R L = 3.5Ω ns Rise Time t r (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating ns Turn-Off Delay Time t d(off) Temperature ns Fall Time t f ns Total Gate Charge (Gate to Source + Gate to Drain) Q g(tot) V GS = 1V, I D = 14A, =.8 x Rated BS, I g(ref) = 1.5mA, (Figures 14, 19, 2) Gate Charge is Essentially Independent of Operating Temperature nc Gate to Source Charge Q gs nc Gate to Drain Miller Charge Q gd nc 2

3 IRF13, IRF131, IRF132, IRF133 Electrical Specifications T C = 25 o C, Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Input Capacitance C ISS = 25V, V GS = V, f = 1MHz pf (Figure 11) Output Capacitance C OSS pf Reverse Transfer Capacitance C RSS pf Internal Drain Inductance L D Measured Between the Contact Screw on the Flange that is Closer to Source and Gate Pins and the Center of Die Modified MOSFET Symbol Showing the Internal Device Inductances D nh Internal Source Inductance L S Measured From the Source Lead, 6mm (.25in) From the Flange and the Source Bonding Pad G L D L S S nh Thermal Resistance, Junction to Case R θjc o C/W Thermal Resistance, Junction to Ambient R θja Free Air Operation o C/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Continuous Sourceto Drain Current I SD Modified MOSFET A D Symbol Showing the Pulse Source to Drain Current (Note 3) I SDM Integral Reverse P-N Junction Diode A G S Source to Drain Diode Voltage (Note 2) V SD T J = 25 o C, I SD = 14A, V GS = V (Figure 13) V Reverse Recovery Time t rr T J = 25 o C, I SD = 14A, di SD /dt = 1A/µs ns Reverse Recovery Charge Q RR T J = 25 o C, I SD = 5.5A, di SD /dt = 1A/µs µc NOTES: 2. Pulse test: pulse width 3µs, duty cycle 2%. 3. Repetitive rating: Pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. V DD = 5V, starting T J = 25 o C, L = 38µH, R G = 25Ω, peak I AS = 14A. See Figures 15, 16. 3

4 IRF13, IRF131, IRF132, IRF133 Typical Performance Curves Unless Otherwise Specified POWER DISSIPATION MULTIPLIER IRF132, IRF133 IRF13, IRF T C, CASE TEMPERATURE ( o C) T C, CASE TEMPERATURE ( o C) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1 Z θjc, THERMAL IMPEDANCE ( o C) SINGLE PULSE t 1, RECTANGULAR PULSE DURATION (s) P DM t 1 t NOTES: 2 DUTY FACTOR: D = t 1 /t 2 PEAK T J = P DM x Z θjc + T C 1 FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE IRF13, 1 IRF132, 3 IRF13, 1 IRF132, 3 T J = MAX RATED T C = 25 o C OPERATION IN THIS AREA MAY BE LIMITED BY r DS(ON) IRF131, 3 1µs 1µs 1ms 1ms IRF13, , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA DC V 1V PULSE DURATION = 8µs , DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. OUTPUT CHARACTERISTICS V GS = 7V 6V 5V 4V 5 4

5 IRF13, IRF131, IRF132, IRF133 Typical Performance Curves Unless Otherwise Specified (Continued) µs PULSE TEST V GS = 1V V GS = 8V V GS = 7V V GS = 6V V GS = 5V V 8µs PULSE TEST T J = 175 o C T J = 25 o C V GS = 4V , DRAIN TO SOURCE VOLTAGE (V) FIGURE 6. SATURATION CHARACTERISTICS V GS, GATE TO SOURCE VOLTAGE (V) FIGURE 7. TRANSFER CHARACTERISTICS DRAIN TO SOURCE ON RESISTANCE µs PULSE TEST V GS = 1V V GS = 2V NORMALIZED DRAIN TO SOURCE ON RESISTANCE 3. I D = 14A V GS = 1V T J, JUNCTION TEMPERATURE ( o C) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE I D = 25µA C, CAPACITANCE (pf) C RSS V GS = V, f = 1MHz C ISS = C GS + C GD C RSS = C GD C OSS C DS + C GD C ISS C OSS T J, JUNCTION TEMPERATURE ( o C) FIGURE 1. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE , DRAIN TO SOURCE VOLTAGE (V) FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 5

6 IRF13, IRF131, IRF132, IRF133 Typical Performance Curves Unless Otherwise Specified (Continued) g fs, TRANSCONDUCTANCE (S) V 8µs PULSE TEST T J = 25 o C T J = 175 o C I SD, DRAIN CURRENT (A) T J = 175 o C T J = 25 o C V SD, SOURCE TO DRAIN VOLTAGE (V) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE V GS, GATE TO SOURCE VOLTAGE (V) I D = 14A FOR TEST CIRCUIT SEE FIGURE 18 = 8V = 5V = 2V Q g(tot), TOTAL GATE CHARGE (nc) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 6

7 Test Circuits and Waveforms IRF13, IRF131, IRF132, IRF133 BS L t P VARY t P TO OBTAIN REQUIRED PEAK I AS V GS R G + V DD - I AS V DD DUT V t P I AS.1Ω t AV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS t ON t d(on) t OFF t d(off) R L t r t f 9% 9% + R G V DD - 1% 1% DUT 9% V GS V GS 1% 5% PULSE WIDTH 5% FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS CURRENT REGULATOR (ISOLATED SUPPLY) V DD 12V BATTERY.2µF 5kΩ.3µF SAME TYPE AS DUT Q gs Q gd Q g(tot) V GS D G DUT I g(ref) I G CURRENT SAMPLING RESISTOR S I D CURRENT SAMPLING RESISTOR I G(REF) FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 2. GATE CHARGE WAVEFORMS 7

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