Computer Hardware Engineering (IS1200) Computer Organization and Components (IS1500) Fall 2017 Lecture 7: Combinational Logic
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1 Computer Hardware ngineering (I2) Computer Organization and Components (I5) Fall 27 Lecture 7: Combinational Logic Optional for I2, compulsory for I5 Fredrik Lundevall lides by David roman and Fredrik Lundevall oolean lgebra David roman I Decoders, and dders II lides version 2. 2 Course tructure Module : C and ssembly Programming L L2 L3 L4 Module 4: Processor Design X L L2 L9 L6 X2 L3 Module 3: Logic Design PROJ TRT (I5 only) L7 L8 X3 LD-L L L4 X5 3 Module 6: Parallel Processors and Programs L2 Proj. xpo oolean lgebra 2 Module 5: Memory Hierarchy Module 2: I/O ystems L5 X4 L L3 X6 4 L4 I Decoders, and dders II
2 3 bstractions in Computer ystems Computer Computer ystem ystem pplication pplication oftware oftware etworked ystems and ystems of ystems oftware Operating Operating ystem ystem Instruction Instruction et et rchitecture rchitecture Hardware/oftware Interface Microarchitecture Microarchitecture Logic Logic and and uilding uilding locks locks Digital Hardware Design Digital Digital Circuits Circuits nalog nalog Circuits Circuits Devices Devices and and Physics Physics nalog Design and Physics oolean lgebra I Decoders, and dders II 4 genda oolean lgebra I Decoders, and dders oolean lgebra II I Decoders, and dders II
3 5 oolean lgebra oolean lgebra I Decoders, and dders II 6 Logic Gates (/3) D, OR, OT, and UF D This kind of table is called a truth table. OT The small circle (called a bubble) inverts the signal. OT is also called an inverter. oolean lgebra OR UF Looks like not, but has no circle. uffer. Logically the same as a wire. Important because of technology limitations. I Decoders, and dders II
4 7 The output of a CMO gate Transistors are used as on/off switches in digital circuits. upply voltage, logic "": 3.3 Volts Channel, open or closed depending on control input. P-channel MO transistor Turning on the upper transistor connects supply voltage to output. Control input. logic "" input turns off the P-channel MO transistor. Output Turning on the lower transistor connects ground to output. logic "" input turns on the -channel MO transistor. -channel MO transistor Ground, logic "": Volts oolean lgebra I Decoders, and dders II 8 Logic Gates (2/3) D, OR, XOR, and XOR D OT D. ote the mall bubble at the end. XOR xclusive OR, pronounced ex-or. oolean lgebra OR OT OR. XOR xclusive OT OR. I Decoders, and dders II
5 9 Logic Gates (3/3) Multi-Input Logic Gates Gates can be generalized to have more than two inputs. For instance: XOR3 D3 C xclusive OR gate with 3 inputs. D gate with 3 inputs. n -input XOR gate is a parity gate. The output is when an odd number of inputs are. OR5 OT OR gate with 5 inputs. oolean lgebra I Decoders, and dders C II Combinational Circuit = = C= = = C= = This circuit is combinational because its outputs depend only on its inputs. The circuit is memoryless, that is, it has no memory. We will introduce memory in Lecture 8 oolean lgebra = Observe that this (rather useless) circuit always outputs. s a logic formula, this is called a tautology. I Decoders, and dders II
6 Problematic Circuits Unstable circuit. Q What is the value of Q? nswer: it oscillates. This circuit is called a ring oscillator. Illegal value (X) What is the value of Q? = Q = nswer: Q = X, called an unknown or illegal value. For example, when a wire is driven to both and at the same time. This situation is called contention (and can damage the transistors in the gates). oolean lgebra I Decoders, and dders II 2 Floating Values and Tristate uffers The output of a tri-state (or three-state) buffer has a high impedance if the output enable signal is not active. Commonly used in buses to connect multiple chips. s long as only one buffer at a time is enabled, contention is avoided. oolean lgebra Z Z When the enable signal is not active, the output is said to be floating (using symbol Z). The output floats when both output transistors are turned off. I Decoders, and dders II
7 3 oolean lgebra (/4) Truth Tables and um-of-products Form C We can create a boolean expression from the truth table The D of two or more variables is called a product. C C C The line over a variable means that the inverse (complement) of the variable is used (OT). ometimes a prime is used instead: 'C' 'C C' truth table with some (random) output. oolean lgebra D can be written using no space or using a dot, e.g. C OR is written using the symbol. This form is called sum-of-products (surprise!) I Decoders, and dders II 4 oolean lgebra (2/4) ome Theorems Theorem Dual ame = = Identity = = ull lement xercise: Derive the simplest form of expression = = Idempotency = Involution olution: = = Complements = = Commutativity = Commutativity ( ) C = ( C) ()C = (C) ssociativity = () Distributivity = Complements (dual) ( )( C)= (C) () (C)= Distributivity ( C) = Identity ote! ot as traditional algebra = oolean lgebra I Decoders, and dders Indempotency (dual) II
8 5 oolean lgebra (3/4) De Morgan s Theorem Theorem Dual 2 3 = 2 3 = ( 2 3 ) ( 2 3 ) ugustus De Morgan, ritish mathematician and logician (86 87). The law shows that these gates are equivalent = = = = = Important law. For CMO logic, D and OR gates are preferred over D and OR gates. oolean lgebra = ut how can we know that this theorem is true? I Decoders, and dders II 6 oolean lgebra (4/4) Proof by Perfect Induction Perfect Induction = Proof by xhaustion = Proof by Cases ote that these two columns are equal Prove the De Morgan s Theorem for three variables C = C Proof by perfect induction. xhaustively show all cases in a truth table. oolean lgebra C C I Decoders, and dders C II
9 7 I uilding locks: Multiplexers, Decoders, and dders oolean lgebra I Decoders, and dders II 8 bstractions in Computer ystems Computer Computer ystem ystem pplication pplication oftware oftware etworked ystems and ystems of ystems oftware Operating Operating ystem ystem Instruction Instruction et et rchitecture rchitecture Microarchitecture Microarchitecture Logic Logic and and uilding uilding locks locks Hardware/oftware Interface We can combine logic gates and form digital building Digital Hardware Design blocks Digital Digital Circuits Circuits nalog nalog Circuits Circuits Devices Devices and and Physics Physics oolean lgebra nalog Design and Physics I Decoders, and dders II
10 9 Combinational locks (/3) Multiplexers What is this? D D The control signal selects which input bit that is sent to the output. It s a 2: Multiplexer. 2 bits for the data input D D output D D oolean lgebra One possible implementation. Convince yourself of its correctness! I Decoders, and dders II 2 Combinational locks (2/3) Multiplexers multiplexer can be seen as a simple switch, selecting which signal that should pass through the block. D D D2 D3 4: multiplexer can be defined hierarchically. D D D2 D3 4: multiplexer (4 inputs, output). What is the output signal for the 4: multiplexer with these inputs? D D D2 D3 D =, D =, D2=, D3=, =, = nswer: = oolean lgebra I Decoders, and dders II
11 2 Combinational locks (3/3) Decoders decoder has inputs and 2 outputs. sserts exactly one output. Decoder :4 decoder (2 inputs, 4 output). ote that only one signal is on each row. This is called one-hot. oolean lgebra I Decoders, and dders II 22 rithmetic Circuits and umbers (/3) Half and Full dders half adder has a carry out signal. How can we add bigger numbers? Idea: Chain adders together oolean lgebra full adder has both carry out and carry in signals. Cin Cin I Decoders, and dders xercise: Complete the truth table II
12 23 rithmetic Circuits and umbers (/3) Half and Full dders half adder has a carry out signal. full adder has both carry out and carry in signals. How can we add bigger numbers? Cin Idea: Chain adders together oolean lgebra Cin xercise: Complete the truth table I Decoders, and dders II 24 rithmetic Circuits and umbers (2/3) Carry Propagate dders n -bit carry propagate adder (CP) sums two -bit inputs. ote the notation for an -bit bus. Cin ee course book (advanced part) Three common implementations of CPs are: Ripple-carry adder imple but slow. Carry-lookahead adder Faster, divides into blocks. Prefix adder ven faster. Used in today's computers. 32-bit ripple-carry adder C3 oolean lgebra C29 C I Decoders, and dders C Cin II
13 25 rithmetic Circuits and umbers (3/3) ubtract ubtract is simple to implemented with a carry propagate adder (CP): Invert input signal and set Cin =. K We can easily create a circuit where K = results in and K = results in - Cin = Coming up ote that setting carry in to adds to. oolean lgebra In lecture 9, we will generalize this idea into an rithmetic/logic Unit (LU), one of the main components of a processor. I Decoders, and dders II 26 II oolean lgebra I Decoders, and dders II
14 27 Free graphical digital circuit simulator. Used in the LD-L and in L4. Graphical Model Canvas oth for construction and simulation xplorer Pane uilding blocks and gates ttribute Table Configure different components oolean lgebra I Decoders, and dders II 28 ome Different otations in dder (different symbol than in text books) plitter of bits Constant umber 4: Multiplexer lue wire: bit floating signal Dark green wire: bit signal with value. bit input Decoder 2:4 right green wire: bit signal with value Orange write: Incorrect bit width bit output oolean lgebra I Decoders, and dders II
15 29 Hardware Description Languages is a simple graphical design and simulation environment for educational purposes. Professional hardware designers work in textual Hardware Description Languages (HDL). For those who are interested, see Harris & Harris (22), chapter 4. This is not part of the course. The two most commonly used HDLs in industry are: ystem Verilog. Used a lot in the U. C-like syntax. VHDL. Used more in urope. da-like syntax. oolean lgebra I Decoders, and dders II 3 Reading Guidelines Module 3: Logic Design Lecture 7: Combinational Logic Design H&H Chapters.5, , 2.6, Lecture 8: equential Logic Design H&H Chapters (not 3.2.7), , , Reading Guidelines ee the course webpage for more information. oolean lgebra I Decoders, and dders II
16 3 ummary ome key take away points: Combinational logic design: Output is directly dependent on input. There is no memory. Important components to remember: multiplexer, decoder, and adder. ext lecture is about sequential logic design; circuits with memory. Thanks for listening! oolean lgebra I Decoders, and dders II
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