Computer Organization and Components
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1 Computer Organization and Components I5, fall 25 Lecture 7: Combinational Logic ssociate Professor, KTH Royal Institute of Technology ssistant Research ngineer, University of California, erkeley lides version. 2 Course tructure Module : C and ssembly Programming L L2 L3 X L Module 4: Processor Design L9 L 2 L5 L4 L2 Module 2: I/O ystems L5 L6 X2 L3 Module 5: Memory Hierarchy L X4 L6 Module 3: Logic Design L7 L8 X3 L4 Module 6: Parallel Processors and Programs L2 L3 X5 3 Proj. xpo L4 oolean lgebra Decoders, and dders
2 3 bstractions in Computer ystems Computer ystem pplication oftware Operating ystem Instruction et rchitecture etworked ystems and ystems of ystems oftware Hardware/oftware Interface Microarchitecture Logic and uilding locks Digital Hardware Design Digital Circuits nalog Circuits Devices and Physics nalog Design and Physics oolean lgebra Decoders, and dders 4 genda oolean lgebra Decoders, and dders oolean lgebra Decoders, and dders
3 5 oolean lgebra oolean lgebra Decoders, and dders Logic Gates (/3) D, OR, OT, and UF 6 D OR OT The small circle (called a bubble) inverse the signal. OT is also called an inverter. UF Looks like not, but has no circle. uffer. Logically the same as a wire. Relevant from an analog point of view. oolean lgebra Decoders, and dders
4 Logic Gates (2/3) D, OR, XOR, and XOR H 7 D OT D. ote the mall bubble at the end. OR OT OR. XOR xclusive OR, pronounced ex-or. XOR xclusive OT OR. oolean lgebra Decoders, and dders Logic Gates (3/3) Multi-Input Logic Gates 8 Gates can be generalized to have more than two inputs. For instance: D3 D gate with 3 inputs. OR5 OT OR gate with 5 inputs. XOR3 C xclusive OR gate with 3 inputs. n -input XOR gate is also called a parity gate. It outputs when odd number of inputs are. C oolean lgebra Decoders, and dders
5 Combinational Circuit H 9 = = C = = = C = = = This circuit is combinational because its outputs depend only on its inputs. The circuit is memoryless, that is, it has no memory. We will introduce memory in Lecture 8 Observe that this (rather useless) circuit always outputs. s a logic formula, this is called a tautology. oolean lgebra Decoders, and dders Problematic Circuits Unstable circuit. Q What is the value of Q? nswer: it oscillates. This circuit is called a ring oscillator. Illegal value (X) = = Q What is the value of Q? nswer: Q = X, called an unknown or illegal value. For example, when a wire is driven to both and at the same time. This situation is called contention. oolean lgebra Decoders, and dders
6 Floating Values and Tristate uffers tristate (or three-state) buffer has high impedance if the output enable signal is not active. Z Z Commonly used in buses when connecting multiple chips. If the buffers are not enabled at the same time, contention is avoided. When the enable signal is not active, the output is said to be floating (using symbol Z). oolean lgebra Decoders, and dders oolean lgebra (/4) Truth Tables and um-of-products Form 2 C truth table with random output (we have seen them before). We can create a boolean expression from the truth table The D of one or more variables is called a product. C + C + C The line over a variable is called the complement and is the inverse of the variable (OT). ometimes a prime is used instead. D can be written using no space or using a dot, e.g.!!c This form is called sum-of-products (surprise!) OR is written using the + symbol. oolean lgebra Decoders, and dders
7 3 oolean lgebra (2/4) ome Theorems H Theorem Dual ame! = + = Identity! = + = ull lement xercise: Derive the simplest form of expression! = + = Idempotency + + = Involution olution:! = + = Complements + +! =! + = + Commutativity = + + Commutativity (!)!C =!(!C) (+)+C = +(+C) ssociativity = (+) + Distributivity =! + Complements (dual) =+ Identity (!)+(!C)= (+)!(+C)= Distributivity +(!C)!(+C) Indempotency (dual) ote! ot as traditional algebra = oolean lgebra Decoders, and dders 4 oolean lgebra (3/4) De Morgan s Theorem Theorem Dual! 2! 3 = = ( ) (! 2! 3 ) ugustus De Morgan ritish mathematician and logician (86 87). The law shows that these gates are equivalent = = + = oolean lgebra + = = Important law. For CMO (Complementary metal oxide semiconductor), D and OR gates are preferred over D and OR gates. = ut how can we know that this theorem is true? Decoders, and dders
8 oolean lgebra (4/4) Proof by Perfect Induction 5 Perfect Induction = Proof by xhaustion = Proof by Cases Prove the De Morgan s Theorem for three variables ote that these two columns are equal C = + + C Proof by perfect induction. xhaustively show all cases in a truth table. C C + + C oolean lgebra Decoders, and dders 6 uilding locks: Multiplexers, Decoders, and dders oolean lgebra Decoders, and dders
9 7 bstractions in Computer ystems Computer ystem pplication oftware Operating ystem Instruction et rchitecture Microarchitecture Logic and uilding locks etworked ystems and ystems of ystems oftware Hardware/oftware Interface We can combine logic gates and form digital building Digital Hardware Design blocks Digital Circuits nalog Circuits Devices and Physics nalog Design and Physics oolean lgebra Decoders, and dders Combinational locks (/3) Multiplexers 8 What is this? It s a 2: Multiplexer. The control signal selects which input bit that is sent to the output. D D 2 bits for the data input D D D D output One possible implementation. Convince yourself of its correctness! oolean lgebra Decoders, and dders
10 Combinational locks (2/3) Multiplexers 9 multiplexer can be seen as a simple switch, selecting which signal that should pass through the block. 4: multiplexer can be defined hierarchically. D D D2 D3 D D D2 D3 4: multiplexer (4 inputs, output). What is the output signal for the 4: multiplexer with these inputs? D D D2 D3 D =, D =, D2=, D3=, =, = nswer: = oolean lgebra Decoders, and dders Combinational locks (3/3) Decoders 2 decoder has inputs and 2 outputs. sserts exactly one output. Decoder :4 decoder (2 inputs, 4 output). ote that only one signal is on each row. This is called one-hot. oolean lgebra Decoders, and dders
11 rithmetic Circuits and umbers (/7) Half and Full dders H 2 half adder has a carry out signal. C out + How can we add bigger numbers? Idea: Chain adders together oolean lgebra C out full adder has both carry out and carry in signals. C in C out Decoders, and dders + C out C in xercise: Complete the truth table rithmetic Circuits and umbers (2/7) Carry Propagate dders 22 n -bit carry propagate adder (CP) sums two -bit inputs. C out + C in ote the notation for a -bit bus. ee course book (advanced part) 32-bit ripple-carry adder Three common implementations of CPs are: Ripple-carry adder imple but slow. Carry-lookahead adder Faster, divides into blocks. Prefix adder ven faster. Used in modern computers C out + C 3 + C 29 C + C C in oolean lgebra Decoders, and dders
12 rithmetic Circuits and umbers (7/7) ubtract 23 ubtract is simple to implemented with a carry propagate adder (CP): Invert input signal and set C in =. We can easily create a circuit where = results in + and = results in - C out + C in = ote that setting carry in to adds to +. C out Coming up In lecture 9, we will generalize this idea into an rithmetic/logic Unit (LU), one of the main components of a processor. + oolean lgebra Decoders, and dders 24 oolean lgebra Decoders, and dders
13 25 Free graphical digital circuit simulator. Used in lab 4 and 5. Graphical Model Canvas oth for construction and simulation xplorer Pane uilding blocks and gates ttribute Table Configure different components oolean lgebra Decoders, and dders 26 ome Different otations in dder (different symbol than in text books) Dark green wire: bit signal with value. plitter of bits Constant umber 4: Multiplexer lue wire: bit floating signal bit input Decoder 2:4 right green wire: bit signal with value Orange write: Incorrect bit width bit output oolean lgebra Decoders, and dders
14 27 Hardware Description Languages is a simple graphical design and simulation environment for educational purposes. Professional hardware designers work in textual Hardware Description Languages (HDL). The two most commonly used HDLs in industry are: ystem Verilog. Used a lot in U. C-like syntax. VHDL. Used more in urope. da-like syntax. For those who are interested, see Harris & Harris (22), chapter 4. This is not part of the course. It also exist recent domain-specific languages (DLs) for hardware design. x. Chisel from UC erkeley (embedded in cala). oolean lgebra Decoders, and dders 28 Please do not fumble with the bags oolean lgebra Decoders, and dders
15 29 Reading Guidelines Module 3: Logic Design Lecture 7: Combinational Logic Design H&H Chapters.5, , 2.6, Lecture 8: equential Logic Design H&H Chapters (not 3.2.7), , , Reading Guidelines ee the course webpage for more information. oolean lgebra Decoders, and dders 3 ummary ome key take away points: Combinational logic design: Output is directly dependent on input. There is no memory. Main components to remember: multiplexer, decoder, and adder. ext lecture is about sequential logic design; circuits with memory. Thanks for listening! oolean lgebra Decoders, and dders
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The book has excellent descrip/ons of this topic. Please read the book before watching this lecture. The reading assignment is on the website.
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