SWITCHED-CURRENTS an analogue technique for digital technology

Transcription

1 SWITCHED-CURRENTS an analogue technique for digital technology Edited by С Toumazou, ]. B. Hughes & N. C. Battersby Supported by the IEEE Circuits and Systems Society Technical Committee on Analog Signal Processing IEE Peter Peregrinus Ltd. on behalf of the Institution of Electrical Engineers

2 Table of Contents 1 Introduction 1 C. Toumazou, J. B. Hughes and N. С Battersby 1.1 VLSI Technology The Analogue Dilemma Switched-Currents An Analogue Technique For Digital Technology Book Style Conclusion 7 References 8 2 The Evolution of Analogue Sampled-Data Signal Processing 9 N. C. Battersby and C. Toumazou 2.1 Introduction The Evolution of Analogue Sampled-Data Techniques Early work Bucket brigade devices Charge coupled devices Switched-capacitors The Role of Analogue Sampled-Data Signal Processing Processing Trends and their Impact on Analogue Circuits Current-Mode Analogue Signal Processing Summary 25 References 25 Basic Cells 3 Switched-Current Architectures and Algorithms 30 J. B. Hughes, N. С Bird and I. C. Macbeth 3.1 Introduction Switched-Capacitor Background Non-inverting integrator Inverting integrator Inverting amplifier Generalised integrator Subtracting integrator Switched-capacitorcharacteristics Switched-Current Systems Delay Modules Current memory cell Delay cell Delay line Integrator Modules Non-inverting integrator Non-inverting damped integrator Sensitivity Inverting damped integrator Inverting damped amplifier Generalised integrator Bilinear z-transform integrator 48

3 xvi Switched-Currents: an analogue technique for digital technology Comparison with the switched-capacitor integrator Integrator-based biquadratic section Differentiator Modules Inverting differentiator Generalised inverting differentiator Non-inverting differentiator Generalised non-inverting differentiator Bilinear z-transform differentiator Differentiator-based biquadratic section Filter Synthesis Example 6th Order Lowpass Filter Summary 68 References 69 4 Switched-Current Limitations and Non-Ideal Behaviour 71 J. B. Hughes and W. Redman-White 4.1 Introduction Mismatch Errors Unity gain current memory Non-unity gain current memory Output-Input Conductance Ratio Errors Memory cell response with conductance ratio errors Integrator response with conductanceratioerrors Comparison with switched-capacitor integrator Simulations Settling Errors Underdamped response Critically damped response Overdamped response Memory cell response with settling errors Integrator response with settling errors Comparison with switched-capacitor integrator Simulations Charge Injection Errors Switched-capacitor charge injection Current memory charge injection Analysis of charge injection errors Memory cell response with charge injection errors Ill Integrator frequencyresponsewith charge injection errors Noise Errors Noise analysis of switched-current memory cells Simulations Correlated double sampling Dynamic range Integrator noise analysis Simulations Dynamic range Summary 131 References Noise in Switched-Current Circuits 136 S. J. Daubert 5.1 Overview Transistor Noise Current Mirror Noise Current Copier Noise Relative importance of switch and transconductor noise in a current copier 144

4 Contents xvii Transfer function approach Conclusion 154 References Switched-Current Circuit Design Techniques 156 J. B. Hughes, K. W. Moulding and D. M. Pattullo 6.1 Introduction Feedback Techniques Op-amp active memory cell Grounded-gate active memory cell Simple cascode memory cell Folded-cascode memory cell Regulated cascode Regulated folded-cascode memory cell Integrators Basic fully-differential current memory cell Folded-cascode fully-differential current memory and integrator Single-ended to fully-differential equivalence Charge injection Summary Class AB Switched-Current Techniques 191 N. C. Battersby and C. Toumazou 7.1 Introduction Memory Cell Filter Building Blocks Delay cells Integrator circuits Differentiator circuits Performance Limitations Biquadratic Filter Example Conclusions 202 Acknowledgements 202 References 202 Filters 8 Switched-Current Filters 204 N. C. Battersby and C. Toumazou 8.1 Introduction Biquadratic Filter Sections Integrator based sections Example: integrated biquadratic filter Differentiator based sections Ladder Filters Example: integrated elliptic filter FIR Filters Wave Active Filters Transposition of Switched-Capacitor Filters Switched-Transconductance Filters Switched-transconductance concept Composite elements Filter applications 227 Acknowledgements 230 References 230

5 xviii Switched-Currents: an analogue technique for digital technology 9 A Switched-Capacitor to Switched-Current Conversion Method G. W. Roberts and A. S. Sedra 9.1 Introduction 9.2 The Switched-Current Technique 9.3 Comparing the SFGs of SI and SC Integrator Circuits 9.4 SI Filter Circuits with Finite Transmission Zeros 9.5 SI Filter Circuits using Bilinear Integrators 9.6 Conclusions Acknowledgement References 10 Switched-Current Video Signal Processing J. B. Hughes and K. W. Moulding 10.1 Introduction 10.2 Basic Signal Processing Cells Delay line Integrator and differentiator cells FIR cells 10.3 Practical SI Signal Processing Cells Active negative feedback Fully differential circuits 10.4 Memory Cell Design Transmission error Conductance ratio error Charge injection errors Settling behaviour Linear settling Non-linear settling Signal-to-noise ratio 10.5 Video 1С Test Circuit Output waveforms Amplitude responses Harmonic distortion Summary of performance 10.6 Discussion and Conclusions 10.7 References Appendix 10A Appendix 10B Appendix 10C 11 Switched-Current Wave Analogue Filters A. Rueda, A. Yufera and J. L. Huertas 11.1 Introduction and Motivations 11.2 Wave Filters General principles Wave filter synthesis procedure Scaling techniques 11.3 Switched-Current Wave Filter Design Basic building blocks Limitations and non-idealities of the building blocks 11.4 Programmable Band-pass Filter Structures Filter synthesis Programmable filter implementation 11.5 Design Examples 11.6 Conclusions References

6 Contents xix Data Converters i 12 Algorithmic and Pipelined A/D Converters 304 D. Nairn 12.1 Introduction Architectures For Switched-Current ADCs Algorithmic ADCs Pipelined ADCs Summary Building Blocks Current-samplers Current divide-by-two Current comparators Switches in switched-current circuits Summary Converter Implementation and Examples Algorithmic ADCs Pipelined ADCs Limitations Systematic errors Random errors Conclusions 320 References High Resolution Algorithmic A/D Converters based on Dynamic Current Memories 323 P. Deval 13.1 Introduction CMOS dynamic current memory Conversion algorithm with reduced dynamic range of the memorised currents Conversion error Design of dynamic current memories for use in cyclic ADCs Equivalent time constant of the memory Charge injection error Sampled noise Leakage currents Output conductance Current comparison Comparator offset compensation Clipping the comparator's input voltage Controlling the "on" conductance of the sampling switch Input multiplexer Technology scaling Pipelined converter Experimental results and measurements Summary 347 Acknowledgements 347 References Building Blocks for Switched-Current Sigma-Delta Converters 350 G. W. Roberts and P. J. Crawley 14.1 Introduction Sigma-Delta A/D Conversion The SI Circuit Technique Additional Current-Mode Circuits 363

7 xx Switched-Currents: an analogue technique for digital technology 14.5 SI DISDM Design The current mirror design approach The component-invariant design approach Conclusions 379 Acknowledgements 379 References Continuous Calibration D/A Conversion 381 W. Groeneveld, H. Schouwenaars, C. Bastiaansen and H. Termeer 15.1 Accuracy of Audio D/A Converters Introduction Linearity considerations Basic calibration principle Imperfections Numerical example Improved calibration technique Continuous current calibration bit Audio D/A Converter Architecture Block diagram Calibration circuitry and current cell Measurement results Calibrated Noise Shaping D/A Converter Introduction General design considerations Converter architecture considerations D/A converter block diagram Reference current adjustment Digital continuous calibration Bi-directional calibrating current cell Measurement results Conclusions 402 Acknowledgements 402 References 403 Other Applications 16 Dynamic Current Mirrors 404 G. Wegmann 16.1 Introduction Current Copiers Principle of current copier and dynamic current mirrors Principal accuracy limitations Cascoded structure Current copier with reduced transconductance gmma Dynamic current mirror structures Multiple dynamic current mirrors (1:1) Dividing current mirror: principle of the division by 2 (Iout=T ) 4W 16.3 Accuracy Limitations Influence of drain voltage variations Output conductance gds Capacitive divider C gd - С Direct charge flow path Leakage currents Charge injection by analogue switches 421

8 Contents xxi Interfering parameters Strategies Reduction of the turn-on voltage of the sampling switch Two-phase feedback Noise Analysis Noise sources Analysis of direct noise sources Description of sampling and autozeroing effects Analysis of sampling and autozeroing transfer functions Calculation of sample-and-hold component AV h (f) Calculation of the direct component AV D (f) Autozero transfer function Voltage noise spectral power density Sy(f) Analysis of aliasing effects using the equivalent noise bandwidth technique White noise in first and second-order low-pass filters White noise aliasing effect in a current copier /f noise in first and second-order low-pass filter /f aliasing effect in a current copier Noise spectral power density Sy{f) White noise due to main transistor Tm Noise spectral power density Sy^f) in the baseband Dynamic Behaviour Critical switching configurations Influence of clock delay Influence on the output current - AC and DC Speed-accuracy trade-off Settling time constant Speed-accuracy trade-off Measurements AC measurements Variations of input voltage V in (t) and output current IQ ut(t) DC measurements Multiplying mirror of ratio Basic cell with a reduced transconductance g mra A Influence of the clock frequency Noise measurements Conclusion 453 References 453 Appendix 16A 456 Appendix 16B Switched-Current Cellular Neural Networks for Image Processing 459 A. Rodriguez-Vazquez, S. Espejo, J. Huertas and R. Dominguez-C astro 17.1 Introduction The DT-CNN Model Network architecture and dynamics Network processing and operating modes Basic Building Blocks for SI DTCNNs Cell operators Current-mode replication and scaling 467.'

9 xxii Switched-Currents: an analogue technique for digital technology Cell non-linearity Delay block Current mode CNN conceptual cell schematics CMOS Current-Mode CNN Design Issues CMOS mirror circuits static non-idealities and sizing equations CMOS current mode dynamic operators non-idealities Programmability issues for current-mode blocks Bias current selection area, power and reliability Input-Output Strategies Discussion and Perspectives. 482 References 483 Analysis, Simulation and Test 18 Test for Switched-Current Circuits 487 P. Wrighton, G. Taylor, I. Bell and C. Toumazou 18.1 Introduction Basic concepts for the test of SI cells Injection and simulation of faults in SI cells Fault detection and detectability measures Test vector analysis Effect of test stimulus period Different profile test stimuli Overall coverage Transistor level analysis Individual faults groups and failure modes Built In Self Test for SI cells Functional inversion test circuit Fault coverage Conclusions and future work 506 Acknowledgements 507 References Analysis of Switched-Current Filters 508 A. C. M. de Queiroz 19.1 Introduction Frequency-Domain Nodal Analysis of Switched-Current Filters Refinements to the Basic Algorithm Voltage Sources in Nodal Analysis Interpolation of z-transforms Time-Domain Analysis Sensitivity Analysis Conclusions 525 References Non-linear Behaviour of Switched-Current Memory Circuits 528 G. W. Roberts and P. J. Crawley 20.1 Introduction Basic Memory Cell Operation Small-Signal Behaviour of the Memory Cell Large-Signal Behaviour of the Memory Cell A total harmonic distortion bound Comparing THD bound with simulation results Experimental confirmation of the THD bound 545

10 Contents xxiii 20.5 Conclusions 545 Acknowledgement 546 References 546 Future Directions 21 GaAs MESFET Switched-Current Circuits 548 C. Toumazou and N. C. Battersby 21.1 Introduction GaAs Versus Silicon Technology For Analogue Design MESFET Modelling GaAs MESFET Current-Mirror Techniques Cross-coupled MESFET pair Linear current-mirror Cascoding Towards GaAs MESFET Switched-Current Techniques Basic memory cell Linear non-inverting memory cell Fully differential, linear transconductance GaAs switchedcurrentcell Generalised integrator Performance limitations Circuit techniques for enhanced performance Dummy switch compensation Cascoded memory cells Simulation results Fully cascoded memory cell Damped integrator Biquadratic filter example Discussion and Conclusion 574 Acknowledgements 575 References 575 ^22 Switched-Currents: State-of-the-Art and Future Directions 577 C. Toumazou, N. C. Battersby and J. B. Hughes 22.1 Introduction Switched-currents: an analogue technique for digital technology Future Research Directions Towards total memory cell error cancellation schemes Algorithmic memory cell S 2 I memory cell Noise performance Towards low power Tuning schemes Filter building blocks Data converters GaAs technology CAD, simulation and test Conclusions 590 References 590 Index.. 591