Accurate Tunable-Gain 1/x Circuit Using Capacitor Charging Scheme
|
|
- Wilfred Harrington
- 5 years ago
- Views:
Transcription
1 Accurae Tunable-Gain 1/x Circui Using Capacior Charging Scheme Byung-Do Yang and Seo Weon Heo This paper proposes an accurae unable-gain 1/x circui. The oupu volage of he 1/x circui is generaed by using a capacior charging ime ha is inversely proporional o he inpu volage. The oupu volage is independen of he process parameers, because he oupu volage depends on he raios of he capaciors, resisors, and curren mirrors. The volage gain of he 1/x circui is uned by a 1-bi digial code. The 1/x circui was fabricaed using a.18 μm CMOS process. Is core area is.11 mm (144 μm 78 μm), and i consumes 78 μw a DD = 1.8 and f CLK = 1 MHz. Is error is wihin 1.7% a =.5 o 1. Keywords: 1 over x, analog divider, process independen, capacior charging, unable gain. I. Inroducion The analog 1/x circui is used in analog dividers, filers, fuzzy conrol, neural neworks, and A/D converers [1][6]. Several circuis for he 1/x funcion have been proposed. A volagemode analog divider is accurae, bu i needs a highly accurae wide-range volage conrolled oscillaor [1]. A curren-mode 1/x circui using weak-inversion MOSFETs has low accuracy due o very low reference and inpu currens, which are only under a few nanoamperes []. A volage-mode analog divider [3], volage-mode 1/x circui [4], and curren-mode analog divider [5] have good accuracy; however, heir oupus significanly change due o device parameers and emperaure. In his paper, an accurae unable-gain 1/x circui is proposed. The oupu volage of he 1/x circui is generaed by using a capacior charging ime ha is inversely proporional o he inpu volage. The oupu volage is independen of process parameers, because all variaions from acive and passive devices are canceled ou. In addiion, he volage gain of he 1/x circui is uned by a 1-bi digial inpu code. The res of his paper is organized as follows. Secion II describes he proposed unable-gain 1/x circui. Secion III shows he measuremen resuls of he fabricaed chip. Finally, conclusions are drawn in Secion I. Manuscrip received May 13, 14; revised Dec. 8, 14; acceped Jan., 15. This research was suppored by he Basic Science Research Program hrough he Naional Research Foundaion of Korea (NRF) funded by he Minisry of Educaion, Science and Technology (15R1D1A3A117756). The chip fabricaion was suppored by he IC Design Educaion Cener (IDEC). Byung-Do Yang (bdyang@cbnu.ac.kr) is wih he Deparmen of Elecronics Engineering, Chungbuk Naional Universiy, Cheongju, Rep. of Korea. Seo Weon Heo (corresponding auhor, seoweon.heo@hongik.ac.kr) is wih he School of Elecronic & Elecrical Engineering, Hongik Universiy, Seoul, Rep. of Korea. II. Proposed 1/x Circui The proposed 1/x circui generaes an oupu volage ( ) ha is inversely proporional o he inpu volage ( ). Figures 1 and show he schemaic and operaion of he 1/x circui, respecively. Iniially, he capacior C 1 samples and holds by he rese signal so ha he volage of C 1 ( 1 ) is updaed o. The rese signal also discharges he capaciors 97 Byung-Do Yang and Seo Weon Heo 15 ETRI Journal, olume 37, Number 5, Ocober 15 hp://dx.doi.org/1.418/erij
2 Curren-adjusing circui DD 1:M DD CNT[1:N] Oupu volage generaor Rese DD BIAS1 1:1 DD BIAS1 I B=M I DD DD 1:K BIAS1 1 + I I C 1 + A + I I B@=1 B + I I R A Rese C A R B Rese C B C R R Fig. 1. Schemaic of proposed 1/x circui. Rese DD DD DD DD 1 I A I B B Q A Q B T CHG T CHG I B I B_MAX B_MAX (1) 1 = 1 () I = = RA RA Fig.. Operaion of proposed 1/x circui. (3) QA I TCHG CA C R C A A A (4) TCHG I (5) IB M I M R B (6) QB IB TCHG CB B_MAX (7) B_MAX I B T C B CHG R C M R C (8) B_MAX M A A B R R, C C A B A B (9) B_MAX R (1) K R (11) R R, C C A B A B R K R C A and C B o he ground. The inpu volage is convered o a curren I by an operaional amplifier, a resisor R A, and a curren mirror. The curren I charges capacior C A during he capacior charging ime (T CHG ) unil he volage of C A ( A ) reaches he reference volage ( ). When A =, he charge sored in C A (Q A = C A ) is equal o he produc of I and T CHG., 1 (1) BIAS1 W=1 I W=1/ W=1/4 W=1/ N CNT[1] CNT[] CNT[N] I B = M I Fig. 3. Curren-adjusing circui. I / R / R, () 1 A A Q C I T. (3) A A CHG From equaions () and (3), he capacior charging ime (T CHG ) is expressed as follows: T C R C A A A CHG. (4) I A reference curren (I = /R B ) is generaed from he reference volage ( ) by an operaional amplifier and a resisor R B. In he curren-adjusing circui in Fig. 3, he reference curren (I ) is muliplied by M for a curren I B (= M I ) using a binary weighed curren mirror and N-bi digial conrol code (CNT[1:N]). 1, where CNT[ ]. (5) N IB M I M M K K RB 1 During T CHG, he swich () urns on, and he curren I B charges capacior C B such ha he charge sored in C B (Q B = C B B_MAX ) becomes he produc of I B and T CHG, where B_MAX is he maximum volage of C B afer he capacior charging operaion. ETRI Journal, olume 37, Number 5, Ocober 15 Byung-Do Yang and Seo Weon Heo 973 hp://dx.doi.org/1.418/erij
3 Q I T C. (6) B B CHG B B_MAX From equaions (4), (5), and (6), B_MAX is expressed as follows: B_MAX IBTCHG RA CA M, (7) C R C B B B where R A = R B and C A = C B ; B_MAX can be simplified as follows:. (8) B_MAX M Here, B_MAX is inversely proporional o, which is a funcion of 1/x. The unable-gain 1/x circui is achieved by changing he value of M of he curren-adjusing circui. Alhough B_MAX is inversely proporional o, B changes during he capacior charging operaion. A sampling circui composed of a sampling swich and a capacior is used for he coninuous oupu volage of he 1/x funcion. Afer every capacior charging operaion, he capacior C samples and holds B_MAX by he (sample-and-hold) signal. If C is much smaller han C B, hen he volage of C ( ) becomes B_MAX.. B _ MAX (9) An oupu-volage generaor wih an operaional amplifier, a curren mirror, and wo resisors (R and R ) is designed, because he minimum oupu volage of he 1/x circui is. The designed oupu-volage generaor makes easily by reducing he curren going hrough he resisor R. The oupu curren (I ) is K-imes larger han I (= /R ). The oupu volage ( ) is expressed as follows: R. (1) K R From equaions (8), (9), and (1), is simplified as follows: M, where R K R. (11) When a resisive load is conneced o he oupu node, changes in such a way ha an addiional volage buffer is required. However, in many applicaions, he 1/x circui has a high-impedance oupu; hus, no volage buffer is required, because he 1/x circui drives he oher circuis in he same chip. Figure 4 shows he waveforms of he 1/x circui when he inpu volage ( ) changes. The curren I charging he capacior C A is proporional o such ha he charging ime (T CHG ) is inversely proporional o when he volage of C A ( A ) reaches. Therefore, he maximum volage of C B ( B_MAX ) is also inversely proporional o, because C B is I A B Fig. 4. Waveforms of 1/x circui. Table 1. Design and adjusable parameers of 1/x circui. Design parameers Adjusable parameers C A = 1 pf, C B = 1 pf, C =.1 pf R A = 4 kω, R B = 16 kω K = 5, R = 1 kω, R = 5 kω M = 1 for CNT[1:8] =.1 1 Gain 1 charged wih a consan curren I B during T CHG. The oupu volage ( ) becomes a coninuous volage ha is inversely proporional o by sampling B_MAX every clock cycle. From equaions (7), (9), and (1), he oupu volage of he 1/x circui is expressed as follows: R R C. (1) A A M K R R B C B The 1/x circui was implemened wih a.18 μm CMOS process a DD = 1.8. By applying he design parameers in Table 1, (1) can be simplified as follows: Gain M, where Gain. (13) 4 The gain is conrolled by he parameers M and. The parameer M can be changed beween and 1 by he 1-bi digial conrol code (CNT[1:1]), and he reference volage can be changed beween.1 and 1. Therefore, he allowable range of he gain of he 1/x circui is from o Byung-Do Yang and Seo Weon Heo ETRI Journal, olume 37, Number 5, Ocober 15 hp://dx.doi.org/1.418/erij
4 () = =.5.8 = () (a) Table. Simulaion resuls of 1/x circui. Process.18 μm CMOS Supply volage ( DD ) 1.8 Clock frequency (f CLK ) 1 MHz Inpu volage ( ).5.8 Oupu volage ( ) 1 Accuracy of.5% < Error <.5% for = % < Error <.5% for =.5.8 Simulaion condiions M =.5, =.8 Error of (%) () (b) Table 3. Error sources of 1/x circui. Source Number Sandard deviaion (σ) Offse volage of amplifier 4.7% (1.4 =. ) Mismach of curren mirror 3.18% Resisor mismach.7% Capacior mismach 1.7% Toal error N/A 1.45% () M =.5 () = M =.5 (1) = () (c) M (.8) 4 M =.15 (.5) Fig. 5. Simulaion resuls of 1/x circui a M =.5 and =.8 : (a) vs., (b) accuracy of, and (c) vs. M. Figures 5(a) and 5(b) show he simulaion resuls of he 1/x circui a M =.5 and =.8. The 1/x circui has errors less han.5% and 1.5% for =.1 o.8 and =.5 o.8, respecively. The error increases when is under.1, because he offse volages of he amplifiers become he more dominan facors as decreases. Figure 5(c) shows he gain variaions of he 1/x circui according o M a =.8. The simulaion resuls in Table show he high accuracy and wide inpu and oupu ranges of he 1/x circui. In (1), he oupu of he proposed 1/x circui is independen of he process parameers. However, he oupu is sill affeced by he mismaches of he devices. The main error sources are he offse volages of amplifiers (s), he mismaches of curren mirrors, resisor mismaches (R A and R B, R and R ), and capacior mismaches (C A and C B ). In addiion, he oupu is affeced by he reference volage ( ). The reference volage comes from eiher an inernal bandgap reference (BGR) circui or an exernal volage source. In his design, comes from an exernal volage source so as o exhibi he variaions of he 1/x circui exacly. Table 3 shows he Mone Carlo simulaion resuls of he error sources in he implemened 1/x circui wih a.18 μm CMOS process. The sandard deviaion (σ) of he oal error is 1.45%. The larges error comes from he s (σ =.7%). The maximum clock frequency (f CLK ) for he volage conversion of he 1/x circui is deermined by he capacior charging ime (T CHG = R A C A / ) in (4). When R A = 4 kω, C A = 1 pf, and =.8, he maximum capacior charging ime becomes.64 μs for he lowes allowable inpu volage ( =.5 ). In he simulaions and experimens, a clock frequency of 1 MHz was used o cover he.64 μs capacior charging ime. A higher clock frequency can be used by reducing he maximum capacior charging ime wih he parameers R A, C A, and. A lower clock frequency is recommended o save power consumpion, because power consumpion is proporional o he conversion frequency. The ETRI Journal, olume 37, Number 5, Ocober 15 Byung-Do Yang and Seo Weon Heo 975 hp://dx.doi.org/1.418/erij
5 small capaciors (C A = 1 pf, C B = 1 pf, and C =.1 pf) are implemened o reduce power consumpion and chip area, bu hey are weak from leakage currens and noises, which increase he error of he 1/x circui. The larger capaciors, C A, C B, and C, can improve he accuracy of he 1/x circui. III. Measuremen Resuls The proposed 1/x circui was fabricaed using a.18 μm CMOS process. Figure 6 shows a microphoograph of he chip. The chip occupies an area of.11 mm (144 μm 78 μm) and consumes 78 μw a DD = 1.8 and f CLK = 1 MHz. Figure 7 shows he measured waveforms of according o (= o 1 ) a =.8 and M =.5,.5, and.15. The funcion of he proposed 1/x circui does no have any process parameers heoreically, bu he oupu volage of he proposed 1/x circui is affeced by process variaions, such as he offse volages of he s; he swiching delays of he s; and he mismaches in capaciors, resisors, and curren mirrors. Figure 8 shows he measured disribuion of for unrimmed sample chips a =., M =.5, and =.8. The of each chip is measured a =. o show he disribuion of according o process variaions. Theoreically, =. a =., because he funcion of he 1/x circui is =.4/ a M =.5 and =.8. The mean (μ) and sandard deviaion (σ) of for samples were m and 3.1 m (1.61%), respecively. The measured sample chips showed a maximum and minimum of 5.7 m and m, respecively. Therefore, he maximum difference of (Δ ) was 11 m (5.48%). The change in due o he process variaions can be rimmed by he curren-adjusing circui. Figure 9 shows he measured accuracies of for rimmed sample chips a M =.5 and =.8. The rimmed 1/x circuis have errors beween +1.7% and 1.7% for =.5 o.8. arious 1/x circui chips are compared in Table 4. The proposed 1/x circui has a larger normalized inpu/oupu range () () () =.5 =. =.83 =.4 = 1 = () 1. (a) =.5 =.1 =. =.4 = 1 = () 1. (b) =.15 =.1 =.14 =. = 1 = () 1. (c) Fig. 7. Measured waveforms of vs. (= o 1 ) a =.8 : (a) M =.5, (b) M =.5, and (c) M =.15. Bias curren circui Resisors CM C Curren adjusing Fig. 6. Microphoograph of chip. Capacior (C A, C B ) Resisors CM of 1 o compared o oher 1/x circuis (from 1 o.67 o 1 o 14). The normalized inpu/oupu range is he lowes value among he inpu and oupu ranges normalized wih heir minimum values. The previous 1/x circuis [3][5] have smaller errors of 1.7%. However, all previous 1/x circuis [3] [6] have addiional lineariy errors due o PT (process parameers, supply volage, emperaure) variaions, as shown in Table 5. The addiional lineariy errors come from he parameers K (= μc OX W/L), g m (= KI D ), and T of he 976 Byung-Do Yang and Seo Weon Heo ETRI Journal, olume 37, Number 5, Ocober 15 hp://dx.doi.org/1.418/erij
6 Table 4. Performance comparisons of various 1/x circui chips. JSSC 1995 [3] IEICE 3 [4] TCAS-II 5 [5] MWCAS 1 [6] This work Process μm CMOS.5 μm CMOS.5 μm CMOS.5 μm CMOS.18 μm CMOS DD () SS () Power (μw) N/A Area (mm ) N/A N/A N/A.3.11 () () (sim.).9 I (μa) 17 I (μa) 55 Bandwidh 9 MHz (sim.) N/A 1 MHz 175 khz (sim.).5 MHz* Sampling frequency 1 MHz Normalized inpu/oupu range N/A 1 Number of samples Lineariy errors ±1% (sim.) ±1% ±.85% N/A ±1.7% * Maximum bandwidh is equal o half of he sampling frequency, according o Nyquis heorem. Occurrences (m) =. M =.5 & =.8 Sample = µ = m σ = 3.1 m (1.61%) Max = 5.7 m Min = m Max Δ = 11 m (5.48%) Fig. 8. Measured disribuion of for unrimmed sample chips a =., M =.5, and =.8. Error of (%) % Sample = 1.7% () Fig. 9. Measured accuracies of for rimmed sample chips a M =.5 and =.8. JSSC 1995 [3] IEICE 3 [4] TCAS-II 5 [5] Table 5. Lineariy error sources of PT variaions. Funcion g Measuremen condiions m C C =.5 4K A IC K N N KP ( ) I K I DD T N I C = 1 μa μa I N = μa3 μa Lineariy error sources K A (1%) g m (1%) K N (1%) K P (1%) K N (1%) T (%) MWCAS N Δ N =.3 K N (1%) 1 [6] KN M =.5, This work M - =.8 * K (= μc OX W/L) and g m ( KID ) are he ransconducance parameers of MOSFET, and T is he hreshold volage of MOSFET. MOSFET. In he.18 μm CMOS process, he maximum process variaions of K, g m, and T are 1%, 1%, and %, respecively. Bu, heoreically, he proposed 1/x circui is no affeced by he parameers (K, g m, and T ) because all parameers are removed from he equaion of is funcion. Therefore, he addiional lineariy errors wih PT variaions in [3][6] will be much larger han he lineariy errors (±1.7%) of he proposed 1/x circui. The proposed 1/x circui is slower han previous circuis [3] and [5], because is operaion is based on he signal sampling ETRI Journal, olume 37, Number 5, Ocober 15 Byung-Do Yang and Seo Weon Heo 977 hp://dx.doi.org/1.418/erij
7 and he charge inegraion on capaciors. Is bandwidh (.5 MHz) is considered o be half of he sampling frequency (1 MHz), according o Nyquis heorem. The bandwidh under.5 MHz is adequae for low-speed applicaions using he 1/x funcion. The analog dividers used in mos insrumenaion and conrol applicaions need a bandwidh of under 1 khz [1]. A hearing-aid sysem [] needs a bandwidh of 16 khz. I. Conclusion An accurae unable-gain 1/x circui was proposed. The oupu volage of he 1/x circui is generaed using a capacior charging ime ha is inversely proporional o he inpu volage. The oupu volage is independen of process parameers, because he oupu volage depends on he raios of he capaciors, resisors, and curren mirrors. The 1/x circui achieved low lineariy errors and wide inpu and oupu volages by using low offse amplifiers and by maching he capaciors, resisors, and curren mirrors well. The volage gain of he 1/x circui is uned by a 1-bi digial code. The 1/x circui was fabricaed using a.18 μm CMOS process. Is core area is.11 mm (144 μm 78 μm), and i consumes 78 μw a DD = 1.8 and f CLK = 1 MHz. Is lineariy error is wihin 1.7% a =.5 o 1. References Byung-Do Yang received his BS, MS, and PhD degrees in elecrical engineering and compuer science from he Korea Advanced Insiue of Science and Technology, Daejeon, Rep. of Korea, in 1999, 1, and 5, respecively. He was a senior engineer a he Memory Division, Samsung Elecronics, Hwaseong, Rep. of Korea, in 5, where he was involved in he design of DRAM. Since 6, he has been a Chungbuk Naional Universiy, Cheongju, Rep. of Korea, where he is now an associae professor. His research ineress include analog circuis, memory circuis, and power IC designs. Seo Weon Heo received his BS and MS degrees in elecronic engineering from Seoul Naional Universiy, Rep. of Korea, in 199 and 199, respecively, and his PhD degree in elecrical engineering from Purdue Universiy, Wes Lafayee,, USA, in 1. From 199 o 1998, he was wih he Digial Media Research Laboraory, LG Elecronics Co., Ld., Seoul, Rep. of Korea. From 1 o 6, he worked a he Telecommunicaion R&D Cener, Samsung Elecronics Co., Ld., Hwaseong, Rep. of Korea. Since 6, he has been an associae professor wih he School of Elecronic and Elecrical Engineering, Hongik Universiy, Seoul, Rep. of Korea. His curren research ineress include signal processing, wireless communicaion, and embedded sysem design. [1] T.L. Laopoulos and C.A. Karybakas, A Simple Analog Division Scheme, IEEE Trans. Insrum. Meas., vol. 4, no. 4, Aug. 1991, pp [] M. van de Gevel and J.C. Kuenen, Simple Low-olage Weak Inversion MOS 1/x Circui, Elecron. Le., vol. 3, no., Sep. 1994, pp [3] S.-I. Liu and C.-C. Chang, CMOS Analog Divider and Four- Quadran Muliplier Using Pool Circuis, IEEE J. Solid-Sae Circuis, vol. 3, no. 9, Sep. 1995, pp [4] W. Liu and S.-I. Liu, CMOS Tunable 1/x Circui and is Applicaions, IEICE Trans. Fundam. Elecron. Commun. Compu. Sci., vol. E86-A, no. 7, July 3, pp [5] W. Liu, S.-I. Liu, and S.-K. Wei, CMOS Curren-Mode Divider and is Applicaions, IEEE Trans. Circuis Sys. II: Exp. Briefs, vol. 5, no. 3, Mar. 5, pp [6] I. Padilla-Canoya, Compac Low-olage CMOS Analog Divider Using a Four-Quadran Muliplier and Biasing Conrol Circui, IEEE In. Midwes Symp. Circuis Sys., Boise, ID, USA, Aug. 58, 1, pp Byung-Do Yang and Seo Weon Heo ETRI Journal, olume 37, Number 5, Ocober 15 hp://dx.doi.org/1.418/erij
Pulse Train Controlled PCCM Buck-Boost Converter Ming Qina, Fangfang Lib
5h Inernaional Conference on Environmen, Maerials, Chemisry and Power Elecronics (EMCPE 016 Pulse Train Conrolled PCCM Buck-Boos Converer Ming Qina, Fangfang ib School of Elecrical Engineering, Zhengzhou
More informationP. Bruschi: Project guidelines PSM Project guidelines.
Projec guidelines. 1. Rules for he execuion of he projecs Projecs are opional. Their aim is o improve he sudens knowledge of he basic full-cusom design flow. The final score of he exam is no affeced by
More informationA1 K. 12V rms. 230V rms. 2 Full Wave Rectifier. Fig. 2.1: FWR with Transformer. Fig. 2.2: Transformer. Aim: To Design and setup a full wave rectifier.
2 Full Wave Recifier Aim: To Design and seup a full wave recifier. Componens Required: Diode(1N4001)(4),Resisor 10k,Capacior 56uF,Breadboard,Power Supplies and CRO and ransformer 230V-12V RMS. + A1 K B1
More informationCommunication Systems. Department of Electronics and Electrical Engineering
COMM 704: Communicaion Lecure : Analog Mulipliers Dr Mohamed Abd El Ghany Dr. Mohamed Abd El Ghany, Mohamed.abdel-ghany@guc.edu.eg nroducion Nonlinear operaions on coninuous-valued analog signals are ofen
More informationECMA st Edition / June Near Field Communication Wired Interface (NFC-WI)
ECMA-373 1 s Ediion / June 2006 Near Field Communicaion Wired Inerface (NFC-WI) Sandard ECMA-373 1 s Ediion / June 2006 Near Field Communicaion Wired Inerface (NFC-WI) Ecma Inernaional Rue du Rhône 114
More informationObsolete Product(s) - Obsolete Product(s)
DUAL SWITCH-MODE SOLENOID DRIER HIGH CURRENT CAPABILITY (up o.5a per channel) HIGH OLTAGE OPERATI (up o 46 for power sage) HIGH EFFICIENCY SWITCHMODE OPERATI REGULATED OUTPUT CURRENT (adjusable) FEW EXTERNAL
More informationLECTURE 1 CMOS PHASE LOCKED LOOPS
Lecure 01 (8/9/18) Page 1-1 Objecive LECTURE 1 CMOS PHASE LOCKED LOOPS OVERVIEW Undersand he principles and applicaions of phase locked loops using inegraed circui echnology wih emphasis on CMOS echnology.
More informationSynchronization of single-channel stepper motor drivers reduces noise and interference
hronizaion of single-channel sepper moor drivers reduces noise and inerference n mos applicaions, a non-synchronized operaion causes no problems. However, in some cases he swiching of he wo channels inerfere,
More information4.5 Biasing in BJT Amplifier Circuits
4/5/011 secion 4_5 Biasing in MOS Amplifier Circuis 1/ 4.5 Biasing in BJT Amplifier Circuis eading Assignmen: 8086 Now le s examine how we C bias MOSFETs amplifiers! f we don bias properly, disorion can
More informationEE201 Circuit Theory I Fall
EE1 Circui Theory I 17 Fall 1. Basic Conceps Chaper 1 of Nilsson - 3 Hrs. Inroducion, Curren and Volage, Power and Energy. Basic Laws Chaper &3 of Nilsson - 6 Hrs. Volage and Curren Sources, Ohm s Law,
More informationActive Filters - 1. Active Filters - 2
PHY35 - Elecronics Laboraory, all Term (K rong) Acie ilers - By combining op-amps wih energy-sorage elemens, circuis can be designed o gie frequency-dependen op-amp responses Acie filers are hose ha use
More informationDevelopment of Temporary Ground Wire Detection Device
Inernaional Journal of Smar Grid and Clean Energy Developmen of Temporary Ground Wire Deecion Device Jing Jiang* and Tao Yu a Elecric Power College, Souh China Universiy of Technology, Guangzhou 5164,
More informationA Control Technique for 120Hz DC Output Ripple-Voltage Suppression Using BIFRED with a Small-Sized Energy Storage Capacitor
90 Journal of Power Elecronics, Vol. 5, No. 3, July 005 JPE 5-3-3 A Conrol Technique for 0Hz DC Oupu Ripple-Volage Suppression Using BIFRED wih a Small-Sized Energy Sorage Capacior Jung-Bum Kim, Nam-Ju
More informationInvestigation and Simulation Model Results of High Density Wireless Power Harvesting and Transfer Method
Invesigaion and Simulaion Model Resuls of High Densiy Wireless Power Harvesing and Transfer Mehod Jaber A. Abu Qahouq, Senior Member, IEEE, and Zhigang Dang The Universiy of Alabama Deparmen of Elecrical
More informationFamily of Single-Inductor Multi-Output DC-DC Converters
PEDS009 Family of Single-Inducor Muli-Oupu DC-DC Converers Ray-ee in Naional Cheng Kung Universiy No., a-hseuh Road ainan Ciy, aiwan rayleelin@ee.ncku.edu.w Chi-Rung Pan Naional Cheng Kung Universiy No.,
More informationGaN-HEMT Dynamic ON-state Resistance characterisation and Modelling
GaN-HEMT Dynamic ON-sae Resisance characerisaion and Modelling Ke Li, Paul Evans, Mark Johnson Power Elecronics, Machine and Conrol group Universiy of Noingham, UK Email: ke.li@noingham.ac.uk, paul.evans@noingham.ac.uk,
More informationProceedings of International Conference on Mechanical, Electrical and Medical Intelligent System 2017
on Mechanical, Elecrical and Medical Inelligen Sysem 7 Consan On-ime Conrolled Four-phase Buck Converer via Saw-oohwave Circui and is Elemen Sensiiviy Yi Xiong a, Koyo Asaishi b, Nasuko Miki c, Yifei Sun
More informationISSCC 2007 / SESSION 29 / ANALOG AND POWER MANAGEMENT TECHNIQUES / 29.8
ISSCC 27 / SESSION 29 / ANALOG AND POWER MANAGEMENT TECHNIQUES / 29.8 29.8 A 3GHz Swiching DC-DC Converer Using Clock- Tree Charge-Recycling in 9nm CMOS wih Inegraed Oupu Filer Mehdi Alimadadi, Samad Sheikhaei,
More informationTable of Contents. 3.0 SMPS Topologies. For Further Research. 3.1 Basic Components. 3.2 Buck (Step Down) 3.3 Boost (Step Up) 3.4 Inverter (Buck/Boost)
Table of Conens 3.0 SMPS Topologies 3.1 Basic Componens 3.2 Buck (Sep Down) 3.3 Boos (Sep Up) 3.4 nverer (Buck/Boos) 3.5 Flyback Converer 3.6 Curren Boosed Boos 3.7 Curren Boosed Buck 3.8 Forward Converer
More informationM2 3 Introduction to Switching Regulators. 1. What is a switching power supply? 2. What types of switchers are available?
M2 3 Inroducion o Swiching Regulaors Objecive is o answerhe following quesions: 1. Wha is a swiching power supply? 2. Wha ypes of swichers are available? 3. Why is a swicher needed? 4. How does a swicher
More information4 20mA Interface-IC AM462 for industrial µ-processor applications
Because of he grea number of indusrial buses now available he majoriy of indusrial measuremen echnology applicaions sill calls for he sandard analog curren nework. The reason for his lies in he fac ha
More informationORDER INFORMATION TO pin 320 ~ 340mV AMC7150DLF
www.addmek.com DESCRIPTI is a PWM power ED driver IC. The driving curren from few milliamps up o 1.5A. I allows high brighness power ED operaing a high efficiency from 4Vdc o 40Vdc. Up o 200KHz exernal
More informationControl circuit for a Self-Oscillating Power Supply (SOPS) TDA8385
FEATURES Bandgap reference generaor Slow-sar circuiry Low-loss peak curren sensing Over-volage proecion Hyseresis conrolled sand-by funcion Error amplifier wih gain seing Programmable ransfer characer
More informationEE 330 Lecture 24. Amplification with Transistor Circuits Small Signal Modelling
EE 330 Lecure 24 Amplificaion wih Transisor Circuis Small Signal Modelling Review from las ime Area Comparison beween BJT and MOSFET BJT Area = 3600 l 2 n-channel MOSFET Area = 168 l 2 Area Raio = 21:1
More informationPhase-Shifting Control of Double Pulse in Harmonic Elimination Wei Peng1, a*, Junhong Zhang1, Jianxin gao1, b, Guangyi Li1, c
Inernaional Symposium on Mechanical Engineering and Maerial Science (ISMEMS 016 Phase-Shifing Conrol of Double Pulse in Harmonic Eliminaion Wei Peng1, a*, Junhong Zhang1, Jianxin gao1, b, Guangyi i1, c
More informationPRM and VTM Parallel Array Operation
APPLICATION NOTE AN:002 M and V Parallel Array Operaion Joe Aguilar VI Chip Applicaions Engineering Conens Page Inroducion 1 High-Level Guidelines 1 Sizing he Resisor 4 Arrays of Six or More Ms 5 Sysem
More informationMultiple Load-Source Integration in a Multilevel Modular Capacitor Clamped DC-DC Converter Featuring Fault Tolerant Capability
Muliple Load-Source Inegraion in a Mulilevel Modular Capacior Clamped DC-DC Converer Feauring Faul Toleran Capabiliy Faisal H. Khan, Leon M. Tolber The Universiy of Tennessee Elecrical and Compuer Engineering
More informationANALOG AND DIGITAL SIGNAL PROCESSING LABORATORY EXPERIMENTS : CHAPTER 3
Laboraory # Chap 3 Objecives Linear Sysem Response: general case Undersand he difference and he relaionship beween a sep and impulse response. Deermine he limis of validiy of an approximaed impulse response.
More informationA NEW DUAL-POLARIZED HORN ANTENNA EXCITED BY A GAP-FED SQUARE PATCH
Progress In Elecromagneics Research Leers, Vol. 21, 129 137, 2011 A NEW DUAL-POLARIZED HORN ANTENNA EXCITED BY A GAP-FED SQUARE PATCH S. Ononchimeg, G. Ogonbaaar, J.-H. Bang, and B.-C. Ahn Applied Elecromagneics
More informationA Bidirectional Three-Phase Push-Pull Converter With Dual Asymmetrical PWM Method
A Bidirecional Three-Phase Push-Pull Converer Wih Dual Asymmeral PWM Mehod Minho Kwon, Junsung Par, Sewan Choi, IEEE Senior Member Deparmen of Elecral and Informaion Engineering Seoul Naional Universiy
More informationAn Open-Loop Class-D Audio Amplifier with Increased Low-Distortion Output Power and PVT-Insensitive EMI Reduction
Paper 8-6 An Open-Loop Class-D Audio Amplifier wih Increased Low-Disorion Oupu Power and PVT-Insensiive EMI Reducion Shih-Hsiung Chien 1, Li-Te Wu 2, Ssu-Ying Chen 2, Ren-Dau Jan 2, Min-Yung Shih 2, Ching-Tzung
More informationAnalog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
TECHNICAL DATA IW0B Analog Muliplexer Demuliplexer HighPerformance SiliconGae CMOS The IW0B analog muliplexer/demuliplexer is digially conrolled analog swiches having low ON impedance and very low OFF
More informationPolytech Montpellier MEA M2 EEA Systèmes Microélectroniques. Advanced Analog IC Design
Polyech Monpellier MEA M EEA Sysèmes Microélecroniques Adanced Analog IC Design Chaper I Inroducion Pascal Noue / 013-014 noue@lirmm.fr hp://www.lirmm.fr/~noue/homepage/lecure_ressources.hml Ouline of
More informationA New Voltage Sag and Swell Compensator Switched by Hysteresis Voltage Control Method
Proceedings of he 8h WSEAS Inernaional Conference on ELECTRIC POWER SYSTEMS, HIGH VOLTAGES, ELECTRIC MACHINES (POWER '8) A New Volage Sag and Swell Compensaor Swiched by Hyseresis Volage Conrol Mehod AMIR
More informationAutomatic Power Factor Control Using Pic Microcontroller
IDL - Inernaional Digial Library Of Available a:www.dbpublicaions.org 8 h Naional Conference on Advanced Techniques in Elecrical and Elecronics Engineering Inernaional e-journal For Technology And Research-2017
More informationEXPERIMENT #9 FIBER OPTIC COMMUNICATIONS LINK
EXPERIMENT #9 FIBER OPTIC COMMUNICATIONS LINK INTRODUCTION: Much of daa communicaions is concerned wih sending digial informaion hrough sysems ha normally only pass analog signals. A elephone line is such
More informationAN303 APPLICATION NOTE
AN303 APPLICATION NOTE LATCHING CURRENT INTRODUCTION An imporan problem concerning he uilizaion of componens such as hyrisors or riacs is he holding of he componen in he conducing sae afer he rigger curren
More informationDesign of Power Factor Correction Circuit Using AP1662
Applicaion Noe 075 Design of Power Facor Correcion Circui Using AP66 Prepared by Wang Zhao Kun ysem Engineering Deparmen. nroducion. Produc Feaures The AP66 is an acive power facor conrol C which is designed
More informationAn Improved Zero-Voltage-Transition Technique in a Single-Phase Active Power Factor Correction Circuit
An Improved Zero-lage-Transiion Technique in a Single-Phase Acive Power Facor Correcion Circui Suriya Kaewarsa School of Elecrical Engineering, Rajamangala Universiy of Technology Isan Sakon Nakhon Campus,
More informationUniversal microprocessor-based ON/OFF and P programmable controller MS8122A MS8122B
COMPETENCE IN MEASUREMENT Universal microprocessor-based ON/OFF and P programmable conroller MS8122A MS8122B TECHNICAL DESCRIPTION AND INSTRUCTION FOR USE PLOVDIV 2003 1 I. TECHNICAL DATA Analog inpus
More informationDesign of High-linearity Delay Detection Circuit for 10-Gb/s Communication System in 65-nm CMOS
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.6, DECEMBER, 2017 ISSN(Prin) 1598-1657 hps://doi.org/10.5573/jsts.2017.17.6.742 ISSN(Online) 2233-4866 Design of High-lineariy Delay Deecion
More informationPower Efficient Battery Charger by Using Constant Current/Constant Voltage Controller
Circuis and Sysems, 01, 3, 180-186 hp://dx.doi.org/10.436/cs.01.304 Published Online April 01 (hp://www.scirp.org/journal/cs) Power Efficien Baery Charger by Using Consan Curren/Consan olage Conroller
More informationExplanation of Maximum Ratings and Characteristics for Thyristors
8 Explanaion of Maximum Raings and Characerisics for Thyrisors Inroducion Daa shees for s and riacs give vial informaion regarding maximum raings and characerisics of hyrisors. If he maximum raings of
More informationAnalog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
TEHNIAL DATA Analog Muliplexer Demuliplexer HighPerformance SiliconGae MOS IW402B N SUFFIX PLASTI The IW402B analog muliplexer/demuliplexer is digially conrolled analog swiches having low ON impedance
More informationAleksandrs Andreiciks, Riga Technical University, Ingars Steiks, Riga Technical University, Oskars Krievs, Riga Technical University
Scienific Journal of Riga Technical Universiy Power and Elecrical Engineering Curren-fed Sep-up DC/DC Converer for Fuel Cell Applicaions wih Acive Overvolage Clamping Aleksandrs Andreiciks, Riga Technical
More informationAN5028 Application note
Applicaion noe Calculaion of urn-off power losses generaed by an ulrafas diode Inroducion This applicaion noe explains how o calculae urn-off power losses generaed by an ulrafas diode, by aking ino accoun
More informationATEE Adriana FLORESCU
SWITCHING POWER SUPPLY WITH MONOLITHIC SWITCHING REGULATOR SUBSYSTEMS AND DC-DC STEP-UP CONERTER PART B: Design Example, Pspice Simulaion, Pracical Consideraions, Experimenal Resuls Adriana FLORESCU Poliehnica
More informationLecture 5: DC-DC Conversion
1 / 31 Lecure 5: DC-DC Conversion ELEC-E845 Elecric Drives (5 ECTS) Mikko Rouimo (lecurer), Marko Hinkkanen (slides) Auumn 217 2 / 31 Learning Oucomes Afer his lecure and exercises you will be able o:
More informationA Harmonic Circulation Current Reduction Method for Parallel Operation of UPS with a Three-Phase PWM Inverter
160 Journal of Power Elecronics, Vol. 5, No. 2, April 2005 JPE 5-2-9 A Harmonic Circulaion Curren Reducion Mehod for Parallel Operaion of U wih a Three-Phase Inverer Kyung-Hwan Kim, Wook-Dong Kim * and
More informationChapter 1: Introduction
Second ediion ober W. Erickson Dragan Maksimovic Universiy of Colorado, Boulder.. Inroducion o power processing.. Some applicaions of power elecronics.3. Elemens of power elecronics Summary of he course.
More informationSignal Characteristics
Signal Characerisics Analog Signals Analog signals are always coninuous (here are no ime gaps). The signal is of infinie resoluion. Discree Time Signals SignalCharacerisics.docx 8/28/08 10:41 AM Page 1
More informationTHE OSCILLOSCOPE AND NOISE. Objectives:
-26- Preparaory Quesions. Go o he Web page hp://www.ek.com/measuremen/app_noes/xyzs/ and read a leas he firs four subsecions of he secion on Trigger Conrols (which iself is a subsecion of he secion The
More informationA New Electronic Timer. P.L. Nonn and J.C. Sprott. February 1968 PLP 179. Plasma Studies. University of Wisconsin
A New Elecronic Timer by P.L. Nonn and J.C. Spro February 968 PLP 79 Plasma Sudies Universiy of Wisconsin n pulsed plasma experimens i is ofen pecessary o have rigger pulses a various adjusable imes. n
More informationAnalog Circuits EC / EE / IN. For
Analog Circuis For EC / EE / IN By www.hegaeacademy.com Syllabus Syllabus for Analog Circuis Small Signal Equivalen Circuis of Diodes, BJTs, MOSFETs and Analog CMOS. Simple Diode Circuis, Clipping, Clamping,
More informationChapter 2 Introduction: From Phase-Locked Loop to Costas Loop
Chaper 2 Inroducion: From Phase-Locked Loop o Cosas Loop The Cosas loop can be considered an exended version of he phase-locked loop (PLL). The PLL has been invened in 932 by French engineer Henri de Belleszice
More informationEE 40 Final Project Basic Circuit
EE 0 Spring 2006 Final Projec EE 0 Final Projec Basic Circui Par I: General insrucion 1. The final projec will coun 0% of he lab grading, since i s going o ake lab sessions. All oher individual labs will
More informationProgrammable DC Electronic Load 8600 Series
Daa Shee Programmable DC Elecronic Load The programmable DC elecronic loads provide he performance of modular sysem DC elecronic loads in a compac benchop form facor. Wih fas ransien operaion speeds and
More informationECMA-373. Near Field Communication Wired Interface (NFC-WI) 2 nd Edition / June Reference number ECMA-123:2009
ECMA-373 2 nd Ediion / June 2012 Near Field Communicaion Wired Inerface (NFC-WI) Reference number ECMA-123:2009 Ecma Inernaional 2009 COPYRIGHT PROTECTED DOCUMENT Ecma Inernaional 2012 Conens Page 1 Scope...
More informationDATA SHEET. 1N914; 1N916 High-speed diodes DISCRETE SEMICONDUCTORS Sep 03
DISCRETE SEMICONDUCTORS DATA SHEET M3D176 Supersedes daa of April 1996 File under Discree Semiconducors, SC01 1996 Sep 03 FEATURES Hermeically sealed leaded glass SOD27 (DO-35) package High swiching speed:
More information= f 8 f 2 L C. i C. 8 f C. Q1 open Q2 close (1+D)T DT 2. i C = i L. Figure 2: Typical Waveforms of a Step-Down Converter.
Inroducion Oupu Volage ipple in Sep-Down and Sep-Up Swiching egulaors Oupu volage ripple is always an imporan performance parameer wih DC-DC converers. For inducor-based swiching regulaors, several key
More informationTechnology Trends & Issues in High-Speed Digital Systems
Deailed comparison of dynamic range beween a vecor nework analyzer and sampling oscilloscope based ime domain reflecomeer by normalizing measuremen ime Sho Okuyama Technology Trends & Issues in High-Speed
More informationDisribued by: www.jameco.com 1-800-831-4242 The conen and copyrighs of he aached maerial are he propery of is owner. 16K-Bi CMOS PARALLEL E 2 PROM FEATURES Fas Read Access Times: 200 ns Low Power CMOS
More informationComparative Analysis of the Large and Small Signal Responses of "AC inductor" and "DC inductor" Based Chargers
Comparaive Analysis of he arge and Small Signal Responses of "AC inducor" and "DC inducor" Based Chargers Ilya Zelser, Suden Member, IEEE and Sam Ben-Yaakov, Member, IEEE Absrac Two approaches of operaing
More informationEXPERIMENT #4 AM MODULATOR AND POWER AMPLIFIER
EXPERIMENT #4 AM MODULATOR AND POWER AMPLIFIER INTRODUCTION: Being able o ransmi a radio frequency carrier across space is of no use unless we can place informaion or inelligence upon i. This las ransmier
More informationApplication Note 5324
Desauraion Faul Deecion Opocoupler Gae Drive Producs wih Feaure: PLJ, PL0J, PLJ, PL1J and HCPLJ Applicaion Noe 1. Inroducion A desauraion faul deecion circui provides proecion for power semiconducor swiches
More informationProgrammable DC Electronic Loads 8600 Series
Daa Shee Programmable DC Elecronic Loads The programmable DC elecronic loads provide he performance of modular sysem DC elecronic loads in a compac benchop form facor. Wih fas ransien operaion speeds and
More informationA METHOD FOR CONTINUOUS TUNING OF MOSFET RC FILTERS WITH EXTENDED CONTROL RANGE
Journal of ELECTICAL ENGINEEING, VOL 67 (2016), NO6, 449 453 COMMUNICATIONS A METHOD FO CONTINUOUS TUNING OF MOSFET C FILTES WITH EXTENDED CONTOL ANGE Karolis Kiela omualdas Navickas In his paper a uning
More informationPLL Hardware Design and Software Simulation using the 32-bit version of SystemView by ELANIX Stephen Kratzet, ELANIX, Inc.
Applicaion Noe AN14A Apr 8, 1997 SysemView B Y E L A N I X PLL Hardware Design and Sofware Simulaion using he 32-bi version of SysemView by ELANIX Sephen Kraze, ELANIX, Inc. Inroducion This applicaion
More informationSensing, Computing, Actuating
Sensing, Compuing, Acuaing Sander Suik (s.suik@ue.nl) Deparmen of Elecrical Engineering Elecronic Sysems INDUCTIE SENSOS (Chaper.5,.6,.0, 5.4) 3 Inducive sensors damping conrol wheel speed sensor (ABS)
More informationA Novel Bidirectional DC-DC Converter with Battery Protection
Inernaional Journal of Engineering Research and Developmen e-issn: 2278-067X, p-issn : 2278-800X, www.ijerd.com Volume 5, Issue 1 (November 12), PP. 46-53 A Novel Bidirecional DC-DC Converer wih Baery
More informationMemorandum on Impulse Winding Tester
Memorandum on Impulse Winding Teser. Esimaion of Inducance by Impulse Response When he volage response is observed afer connecing an elecric charge sored up in he capaciy C o he coil L (including he inside
More informationFROM ANALOG TO DIGITAL
FROM ANALOG TO DIGITAL OBJECTIVES The objecives of his lecure are o: Inroduce sampling, he Nyquis Limi (Shannon s Sampling Theorem) and represenaion of signals in he frequency domain Inroduce basic conceps
More informationPI90LV9637. LVDS High-Speed Differential Line Receivers. Features. Description. Applications PI90LV9637
LVDS High-Speed Differenial Line Receivers Feaures Signaling Raes >400Mbps (200 MHz) Single 3.3V Power Supply Design Acceps ±350mV (ypical) Differenial Swing Maximum Differenial Skew of 0.35ns Maximum
More informationGG6005. General Description. Features. Applications DIP-8A Primary Side Control SMPS with Integrated MOSFET
General Descripion GG65 is a primary side conrol PSR SMPS wih an inegraed MOSFET. I feaures a programmable cable drop compensaion funcion, PFM echnology, and a CV/CC conrol loop wih high reliabiliy and
More informationWrap Up. Fourier Transform Sampling, Modulation, Filtering Noise and the Digital Abstraction Binary signaling model and Shannon Capacity
Wrap Up Fourier ransorm Sampling, Modulaion, Filering Noise and he Digial Absracion Binary signaling model and Shannon Capaciy Copyrigh 27 by M.H. Perro All righs reserved. M.H. Perro 27 Wrap Up, Slide
More informationMODEL: M6NXF1. POWER INPUT DC Power R: 24 V DC
Screw Terminal Ulra-Slim Signal Condiioners M6N Series FUNCTION MODULE (PC programmable) Funcions & Feaures Single inpu filer and funcion module 12 ypes of funcions are PC programmable 7.5-mm wide ulra-slim
More informationDesign And Implementation Of Multiple Output Switch Mode Power Supply
Inernaional Journal of Engineering Trends and Technology (IJETT) Volume Issue 0-Oc 0 Design And Implemenaion Of Muliple Oupu Swich Mode Power Supply Ami, Dr. Manoj Kumar Suden of final year B.Tech. E.C.E.,
More informationCURRENT MODE PWM+PFM CONTROLLER WITH BUILT-IN HIGH VOLTAGE MOSFET
CURRENT MODE PWM+PFM CONTROLLER WITH BUILT-IN HIGH VOLTAGE MOSFET DESCRIPTION SD6835 is curren mode PWM+PFM conroller used for SMPS wih buil-in high-volage MOSFET and exernal sense resisor. I feaures low
More informationPrimary Side Control SMPS with Integrated MOSFET
General Descripion GG64 is a primary side conrol SMPS wih an inegraed MOSFET. I feaures programmable cable drop compensaion and a peak curren compensaion funcion, PFM echnology, and a CV/CC conrol loop
More informationImpacts of the dv/dt Rate on MOSFETs Outline:
Ouline: A high dv/d beween he drain and source of he MOSFET may cause problems. This documen describes he cause of his phenomenon and is counermeasures. Table of Conens Ouline:... 1 Table of Conens...
More informationMEASUREMENTS OF VARYING VOLTAGES
MEASUREMENTS OF ARYING OLTAGES Measuremens of varying volages are commonly done wih an oscilloscope. The oscilloscope displays a plo (graph) of volage versus imes. This is done by deflecing a sream of
More informationChapter 2 Summary: Continuous-Wave Modulation. Belkacem Derras
ECEN 44 Communicaion Theory Chaper Summary: Coninuous-Wave Modulaion.1 Modulaion Modulaion is a process in which a parameer of a carrier waveform is varied in accordance wih a given message (baseband)
More informationLinear PFC regulator for LED lighting with the multi-level structure and low voltage MOSFETs.
Linear PFC regulaor for lighing wih he muli-level srucure and low volage MOSFETs. Yuichi Noge Nagaoka Universiy of Technology Niigaa, Japan noge@sn.nagaokau.ac.jp Jun-ichi Ioh Nagaoka Universiy of Technology
More informationEECE 301 Signals & Systems Prof. Mark Fowler
EECE 301 s & Sysems Prof. Mark Fowler Noe Se #1 Wha is s & Sysems all abou??? 1/9 Do All EE s & CoE s Design Circuis? No!!!! Someone has o figure ou wha funcion hose circuis need o do Someone also needs
More informationAnalysis of SiC MOSFETs under Hard and Soft- Switching
Analysis of SiC MOSFETs under Hard and Sof- Swiching M. R. Ahmed, R. Todd and A. J. Forsyh School of Elecrical and Elecronic Engineering, Power Conversion Group The Universiy of Mancheser Mancheser, U.K.
More informationHF Transformer Based Grid-Connected Inverter Topology for Photovoltaic Systems
1 HF Transformer Based Grid-Conneced Inverer Topology for Phoovolaic Sysems Abhiji Kulkarni and Vinod John Deparmen of Elecrical Engineering, IISc Bangalore, India. (abhijik@ee.iisc.erne.in, vjohn@ee.iisc.erne.in)
More informationExperiment 6: Transmission Line Pulse Response
Eperimen 6: Transmission Line Pulse Response Lossless Disribued Neworks When he ime required for a pulse signal o raverse a circui is on he order of he rise or fall ime of he pulse, i is no longer possible
More informationProgrammable DC Electronic Loads 8600 Series
Daa Shee Programmable DC Elecronic Loads 99 Washingon Sree Melrose, MA 02176 Phone 781-665-1400 Toll Free 1-800-517-8431 Visi us a www.tesequipmendepo.com 2U half-rack 3U 6U USB RS232 GPIB The programmable
More informationSmart High-Side Power Switch Two Channels: 2 x 30mΩ Current Sense
POFET Smar High-Side Power Swich Two Channels: 2 x 3mΩ Curren Sense Produc Summary Package Operaing olage (on) 5...34 Acive channels one wo parallel On-sae esisance ON 3mΩ 15mΩ Nominal load curren (NOM)
More informationSimulation Analysis of DC-DC Circuit Based on Simulink in Intelligent Vehicle Terminal
Open Access Library Journal 218, Volume 5, e4682 ISSN Online: 2333-9721 ISSN Prin: 2333-975 Simulai Analysis of DC-DC Circui Based Simulink in Inelligen Vehicle erminal Weiran Li, Guoping Yang College
More informationCours Circuits Intégrés Analogiques / Chapitre II 29/04/2010. Outline. Polytech Montpellier ERII 4
Cours Circuis Inégrés nalogiques - 008/009-9/0/010 Polyech Monpellier ERII Design of nalog IC s Chapire I danced nalog Design echniques Pascal Noue March 010 noue@lirmm.fr nalog IC Design Flow 3 nalog
More informationECE-517 Reinforcement Learning in Artificial Intelligence
ECE-517 Reinforcemen Learning in Arificial Inelligence Lecure 11: Temporal Difference Learning (con.), Eligibiliy Traces Ocober 8, 2015 Dr. Iamar Arel College of Engineering Deparmen of Elecrical Engineering
More informationDISCONTINUED MODEL Replaced with Model JPS3
Plug-in Signal Condiioners M-UNIT PUSE ADDER (field-programmable) MODE MODE & SUFFIX CODE SEECTI MODE A : Dry conac B :Volage pulse (Specify sensiiviy) C : V pulse (sensiiviy V) D : V/V pulse (sensiiviy
More informationOptical Short Pulse Generation and Measurement Based on Fiber Polarization Effects
Opical Shor Pulse Generaion and Measuremen Based on Fiber Polarizaion Effecs Changyuan Yu Deparmen of Elecrical & Compuer Engineering, Naional Universiy of Singapore, Singapore, 117576 A*STAR Insiue for
More information10. The Series Resistor and Inductor Circuit
Elecronicsab.nb 1. he Series esisor and Inducor Circui Inroducion he las laboraory involved a resisor, and capacior, C in series wih a baery swich on or off. I was simpler, as a pracical maer, o replace
More informationUltracompact 6-Channel Backlight and Flash/Torch White LED Driver
Feaures and Benefis Proprieary adapive conrol scheme (1, 1.5, 2 ) 0.5% ypical LED curren maching 2 separae serial inerfaces for dimming conrol Drives up o 6 whie LEDs (4 display backligh, 2 flash/orch)
More informationPattern compensation in SOA-based gates. Article (peer-reviewed)
Tile Paern compensaion in SOA-based gaes Auhor(s) Webb, Rod P.; Dailey, James M.; Manning, Rober J. Publicaion dae 21 Original ciaion Type of publicaion Link o publisher's version Righs Webb, R.P., Dailey,
More informationMX629. DELTA MODULATION CODEC meets Mil-Std DATA BULLETIN. Military Communications Multiplexers, Switches, & Phones
DATA BULLETIN MX629 DELTA MODULATION CODEC mees Mil-Sd-188-113 Feaures Mees Mil-Sd-188-113 Single Chip Full Duplex CVSD CODEC On-chip Inpu and Oupu Filers Programmable Sampling Clocks 3- or 4-bi Companding
More informationAOZ7111. Critical Conduction Mode PFC Controller. Features. General Description. Applications. Typical Application AOZ7111
Criical Conducion Mode PFC Conroller General Descripion The AOZ7111 is an acive power facor correcion (PFC) conroller for boos PFC applicaions ha operae in criical conducion mode (CRM). The device uses
More informationA 30nA Quiescent 80nW to 14mW Power Range Shock-Optimized SECE-based Piezoelectric Harvesting Interface. with 420% Harvested Energy Improvement
A 30nA Quiescen 80nW o 14mW Power Range -Opimized SECE-based Piezoelecric Harvesing Inerface wih 420% Harvesed Energy Improvemen Anhony Quelen, Adrien Morel, Pierre Gasnier, Romain Grézaud, Séphane Monfray,
More information