AOZ7111. Critical Conduction Mode PFC Controller. Features. General Description. Applications. Typical Application AOZ7111

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1 Criical Conducion Mode PFC Conroller General Descripion The AOZ7111 is an acive power facor correcion (PFC) conroller for boos PFC applicaions ha operae in criical conducion mode (CRM). The device uses a volage mode PWM which does no need recified AC line volage informaion, i saves he power loss of an inpu sensing nework necessary for radiional currenmode CRM PFC conroller. The AOZ7111 minimizes he number of exernal componens by inegraing safey feaures ha make i an excellen choice for designing robus PFC sages. The AOZ7111 is available in a SO-8 package and i is raed over a -40 C o 125 C ambien emperaure range. Feaures No AC inpu volage sensing requiremen AC Faul Deec makes sysem more robus Maximum swiching frequency limiaion Addiional OVP deecion pin Oupu over-volage / open-feedback proecion and disable funcion Inernal closed loop sof-sar Dynamic OVP funcion Non-linear gain error amplifier enable fas line and load ransien response No need for he auxiliary winding wih minus curren deecion (ZCD) 150µs inernal sar-up imer MOSFET over-curren proecion and inducor sauraion proecion Under-volage lockou wih hyseresis Lower sarup and operaing curren 300mA / -800mA peak gae drive curren Thermal shudown SO-8 package Applicaions Adaper / ballas LCD TV / LED TV SMPS Typical Applicaion VOUT VCC AOZ7111 AC Line Filer VCC CT OUT INV COMP CS OVP GND Figure 1. Typical Boos PFC Applicaion Rev. 1.0 January Page 1 of 15

2 Ordering Informaion Par Number Ambien Temperaure Range Package Environmenal AOZ7111AI -40 C o 125 C SO-8 Green Produc AOS Green Producs use reduced levels of Halogens, and are also RoHS complian. Please visi for addiional informaion. Pin Configuraion INV 1 8 VCC CT 2 7 OUT COMP 3 6 GND OVP 4 5 CS SO-8 (Top View) Pin Descripion Pin Number Pin Name Pin Funcion 1 INV Invering inpu of he error amplifier. The oupu volage of he boos PFC converer should be resisively divided o 2.5V. 2 CT The C pin sources a curren o charge an exernal iming capacior. The circui conrols he power swich on ime by comparing he C volage o an inernal volage derived from V COMP. The C pin discharge he exernal iming capacior a he end of he on ime. 3 COMP This pin is he oupu of he ransconducance error amplifier. Componens for he compensaion should be conneced beween his pin and GND. 4 OVP The OVP pin is used o deec PFC oupu over-volage when he INV pin informaion is no correc. 5 CS This pin is he inpu of he zero curren deecion and over-curren proecion comparaor. 6 GND The GND pin is analog ground. 7 OUT This pin is he gae drive oupu. 8 VCC This is he IC supply pin. Rev. 1.0 January Page 2 of 15

3 Absolue Maximum Raings Exceeding he Absolue Maximum Raings may damage he device. Symbol Parameer Min Max Unis V CC Supply Volage V I OH, I OL Peak Drive Oupu Curren ma I CLAMP Driver Oupu Clamping Diode VO>VCC or VO<-0.3V ma INV, OVP Pin Inpu Volage V V IN CT, COMP Pin Inpu Volage V CS Pin Inpu Volage V Driver Oupu Volage -0.3 V CC V T J Operaing Juncion Temperaure 150 C T A Operaing Temperaure Range C T S Sorage Temperaure Range C ESD Elecrosaic Discharge Capabiliy (Human Body Model, JES22-A114) 2.5 kv T L Lead Temperaure (Soldering, 10s) 300 C JA Package Thermal Resisance (Juncion-o-Ambien) 150 C/W Elecrical Characerisics T A = 25 C, V CC = 14V, unless oherwise specified (1) Symbol Parameer Condiions Min Typ Max Unis SUPPLY V CC Operaing Range Afer Turn On V V START Sar Threshold Volage V CC Increasing V V STOP Sop Threshold Volage V CC Decreasing V V UVLO_HY Inpu Under-Volage Lockou Hyseresis 2.5 V V Z Zener Volage I CC = 20mA V I IN_NS Non-Swiching Supply Curren V COMP < 0.9V, V IN = 14V ma I STB Sandby Curren V INV < 0.2V µa ERROR AMPLIFIER V REF Volage Reference T J = 25 C V V REF_LINE Line Regulaion V CC = 14V ~ 18V 10 mv G m Transconducance V INV = 2.4V o 2.6V µs I O Error Amplifier Curren Capabiliy Source: V INV = V REF -0.1V Sink: V INV = V REF 0.1V C _OFFSET Minimum Conrol Volage o Generae Drive Pluses µa 1.0 V RAMP OSCILLATOR F MAX Maximum Oscillaing Frequency 350 KHz T START Resar Timer Delay µs V CT(MAX) CT Peak Volage V COMP = Open 8 V I CHARGE On Time Capacior Charge Curren µa Rev. 1.0 January Page 3 of 15

4 Elecrical Characerisics (Coninued) T A = 25 C, V CC = 14V, unless oherwise specified (1) Symbol Parameer Condiions Min Typ Max Unis ZERO CURRENT DETECTION V ZCD-TH Zero Curren Deecion Comparaor Threshold V OCP1 OCP1 Threshold Volage (Shudown Mode) V OCP2 OCP2 Threshold Volage (Lach Mode) T ZCD, D Oupu Delay from ZCD o Oupu Turn-On mv V Noe: 1. Specificaions in BOLD indicae an ambien emperaure range -40 C o 125 C. These specificaions are guaraneed by design V 650 ns GATE DRIVE R OH Drive Pull-Up Resisance I SOURCE = 50mA Ω R OL Drive Pull-Down Resisance I SINK = 50mA 5 6 Ω T RISE Oupu Rise Time C L = 1nF, 10% o 90% 70 ns T FALL Oupu Fall Time C L = 1nF, 90% o 10% 25 ns PROTECTION V DOVP Dynamic OVP Threshold Volage T A = 25 C V HV OVP_INV Dynamic OVP Hyseresis T A = 25 C 0.05 V V OVP_INV OVP Threshold INV Pin T A = 25 C V HV OVP_INV OVP INV Pin T A = 25 C V V OVP OVP Threshold OVP Pin T A = 25 C V V EN_INV INV Enable Threshold T A = 25 C 0.5 V HY EN INV Enable Hyseresis T A = 25 C V OTP Over-Temperaure Shudown Limi T J Rising T J Falling T HYS Hyseresis Temperaure of OTP 50 C C Rev. 1.0 January Page 4 of 15

5 AOZ7111 Funcional Block Diagram CS OVP VCC UVLO & POR Reference & Bias Inernal 5V -15mV ZCD Delay LEB -0.7V OCP S Q Vz 2.75V POR R INV 2.5V EAmp Resar Timer Fmax Limi DRV Gae Driver OUT 100µS S Q COMP R 2.575V Dynamic OVP AC Inpu Faul Deec CT Ramp Conrol 1 s OVP 2.685V GND Rev. 1.0 January Page 5 of 15

6 Typical Characerisics Charge Curren vs. Temperaure Sar Threshold vs. Temperaure Charge Curren (µa) Sar Threshold (V) Sop Threshold vs. Temperaure OPC1 vs. Temperaure Sop Threshold (V) OPC1 (V) OVP vs. Temperaure OVP_INV vs. Temperaure OVP (V) 2.75 OVP_INV (V) Rev. 1.0 January Page 6 of 15

7 Typical Characerisics (Coninued) EN_INV vs. Temperaure Reference vs. Temperaure EN_INV (V) Reference (V) Max Frequency vs. Temperaure Resar Timer Delay vs. Temperaure Max Frequency (KHz) Resar Timer Delay (µs) Oupu Delay vs. Temperaure ZCD Comparaor Threshold vs. Temperaure Oupu Delay (ns) ZCD Comparaor Threshold (mv) Rev. 1.0 January Page 7 of 15

8 Deailed Descripion The AOZ7111 is a volage mode acive power facor correcion (PFC) conroller designed for cos-effecive boos PFC applicaions ha operae in criical conducion mode (CRM). Is volage mode scheme does no require an AC inpu line-sensing nework, usually necessary for a curren mode CRM PFC conroller. I ges he ZCD signal pulse from he curren sense resisor; herefore, ZCD auxiliary winding is no needed. AOZ7111 feaures oupu over-volage proecion, overcurren proecion, open-feedback proecion, and undervolage lockou proecion. A unique AC inpu faul deecion circui makes he sysem more robus during he AC absen es. The addiional OVP pin can be used o double check he oupu volage if he feedback resisor ges damaged. The conroller also implemens comprehensive safey feaures for robus designs. The AOZ7111 is available in SO-8 package. Error Amplifier Regulaion AOZ7111 regulaes he boos oupu volage using an inernal ransconducance error amplifier (EA) wih a ypical ransconducance value of 100µS. The advanage in using a ransconducance error amplifier is ha he INV pin volage is only deermined by he resisor divider nework conneced o he oupu volage, no he operaion of he amplifier. This enables he INV pin o be used for sensing over-volage or under-volage condiions independenly of he error amplifier. The negaive erminal of he EA is pinned ou o INV, he posiive erminal is conneced o a 2.5V (±1.8%) reference (V REF ), and he EA oupu is pinned ou COMP. The oupu of he error amplifier (COMP) is conneced o he PWM comparaor and conrols he on-ime of he OUT oupu. The sink and source curren capabiliy of he error amplifier is approximae 10µA during normal operaion. When he INV pin volage is over he normal operaing condiions (V INV >2.6V, or V INV <2.4V if he error is large), addiional circuiry is acivaed o enhance he slew-rae of he error amplifier, i enables fas line and load ransien response. Source Sink I COMP 200µS 2.4V 2.5V 2.6V 100µS Figure 2. Non-linear Gain Characerisics INV The oupu volage of PFC conains a high ripple frequency, 2 imes he AC power line (50Hz or 60Hz). The V OUT ripple is aenuaed by he regulaion loop o ensure V COMP is consan during he AC line cycle. In order o obain a sable operaion and ensure V COMP is consan during he AC line cycle, he bandwidh should ypically be se below 20Hz so ha he regulaion block oupu may be relaively consan over a given AC line cycle. Sof-Sar AOZ7111 employs an inernal sof-sar funcion o suppress inrush curren and overshoo of oupu volage during he sarup. The sof-sar circui works afer UVLO and sandby are released and before he sof-sar cancellaion volage is exceeded. During he sof-sar, he OTA supplies a consan 10µA ino he compensaion nework a he COMP pin. The volage a his pin rises linearly as well as he ampliude of he inpu curren. As soon as he oupu volage V OUT reaches 95% of is raed level, he sarup procedure is finished and he normal volage conrol akes over. Rev. 1.0 January Page 8 of 15

9 V OUT 95% raed Raed oupu V COMP varies wih he RMS inpu volage and oupu load, he on ime is consan during he AC line cycle if he values of he compensaion componens are sufficien o filer ou he V OUT ripple. The maximum on ime of he conroller occurs when V COMP is a he maximum. The C capacior is sized o ensure ha he required on ime is reached a maximum oupu power and he minimum inpu volage condiion. I DS The minimum C value is calculaed as below: V COMP 2 P OUT L I charge C min = EFF V AC V C max Figure 3. Sof-Sar Sequence On Time Conrol (Ramp Conrol Oscillaor) The swiching paern consiss of consan on imes and variable off imes for a given RMS inpu volage and oupu load. The AOZ7111 conrols he on-ime wih he capacior conneced o he C pin. A curren source charges he C capacior o a volage derived from he COMP pin volage (V C(off) ). V C(off) is calculaed as below: 2 P V C off V COMP C OUT L I charge = offse = EFF V AC C When V C(off) is reached, he drive urns off. The ramp oscillaor consiss of hree phases: Charge Phase: The oscillaor capacior volage grows linearly from is boom value (ground) unil i exceeds V COMP - C (offse). A ha momen, he PWM lach oupu ges low and he oscillaor discharge sequence is se. Discharge Phase: The oscillaor capacior is discharged down o is valley value of 0V. Sandby Phase: A he end of he discharge sequence, he oscillaor volage is mainained in a low sae unil he PWM lach is se again. Curren Deecion Block The curren deecion circui is composed of zero curren deecion and over-curren deecion. The inducor curren is convered ino a volage by insering a ground reference resisor (R CS ) series wih he inpu diode bridge and he inpu filering capacior. Therefore, a negaive volage proporional o he inducor curren is buil: V CS = R CS I L where, L is he inducor curren; R CS is he curren sense resisor; V CS is he measured volage. Zero Curren Deecion The zero curren deecion funcion guaranees ha he MOSFET can no urn on as long as he inducor curren has no reached zero. The negaive signal V CS is applied o he curren sense a pin 5. The pin 5 volage is compared o he -15mV hreshold so ha as long as V CS is lower han his hreshold, he curren sense comparaor reses he PWM lach o force he gae drive signal low sae. Consequenly, i is no possible o urn on he power MOSFET unil he inducor curren is measured smaller han (15mV/R CS ), nearly a zero. Rev. 1.0 January Page 9 of 15

10 Ramp Offse IL CS OUT V COMP -15mV ZCD Figure 4. Swiching and Curren Sense Operaion Over-Curren Proecion The over-curren deecion proecive circui deecs he inducor curren and proecs he power MOSFET by urning off he oupu driver when i becomes higher han he se curren level. Wih he over-curren deecion, he volage across he curren deecion resisance R CS conneced o he GND is fed o he CS pin. If he CS pin volage compared by he over-curren deecion comparaor becomes lower han -0.7V, i is hen regarded as over-curren sae; herefore, he feed-forward of he oupu driver is rese o urn off he power MOSFET. Resar Timer AOZ7111 uilizes self-oscillaion insead of he oscillaor wih fixed frequency. In seady operaion, i urns on he MOSFET wih a signal from he zero curren deecor. In sarup or ligh load condiions, a rigger signal is required for saring up or sable operaion. When he oupu of he IC coninues urn-off (150µs or more), he resar rigger signal is auomaically generaed. Maximum Swiching Frequency Limi Because he MOSFET urn-on depends on he CS inpu, swiching frequency may increase o higher han several MHz due o he mis-riggering or noise on he nearby CS pin. If he swiching frequency is higher han needed for criical conducion mode, i will ener CCM. In CCM, inducor curren can be raised very high, which may exceed he curren raing of he power swich or diode. This can seriously damage he power swich and burn i down. To avoid his, he maximum swiching frequency limiaion is embedded. If he ZCD signal is applied again wihin 2.9µs afer he previous edge of gae signal, his signal is ignored and AOZ7111 wais for anoher ZCD signal. Overvolage Proecion (OVP) I is criical ha over volage proecion (OVP) prevens he oupu volage exceeding he raings of PFC sage componens. Over-volage proecion (OVP) is embedded by he informaion a he INV pin. Tha informaion comes from he oupu hrough he volage dividing resisors. AOZ7111 has dynamic OVP funcion o narrow he on ime when he INV volage is higher han 2.575V. When he volage furher rises and exceeds he comparaor reference volage of saic OVP (2.685V), he OVP comparaor shus down he oupu drive pulse. The OVP logic includes hyseresis o ensure ha oupu volage has sufficien ime o discharge before he AOZ7111 driver recovery and also o ensure noise immuniy. Addiional OVP deecion Over-volage proecion (OVP) is embedded by he informaion a he INV pin. Tha informaion comes from he oupu hrough he volage dividing resisors. When he upper divider resisor ges damaged and resisance becomes oo high he oupu elecrolyic capacior may explode. To preven such a caasrophe he addiional OVP pin is assigned o double check oupu volage. When he second OVP riggers, swiching can be recovered only when he V CC supply volage falls below V STOP and builds up higher han UVLO again. Rev. 1.0 January Page 10 of 15

11 V OUT R FB1 V OUT INV pin V AC R OVP1 R FB2 1.07*V REF V COMP OVP pin S Q I DS R OVP2 1.1*V REF POR R Figure 6. Operaion wih AC Inpu Faul Deecion Figure 5. OVP Circuiry Around INV and OVP Pin AC Inpu Faul Deecion AOZ7111 does no require an AC inpu volage sensing, nor does i need he auxiliary winding wih minus curren deecion. In general, he V CC of PFC conroller is supplied by a sysem sandby power supply, a mismach may occur in a wors case scenario. A wors case scenario could be AC inpu chaering: he elecric AC power source is suddenly absen for wo or hree addiional AC line cycles, V CC is sill higher han UVLO (V STOP ) during his ime, so he volage conrol loop ries o compensae for he V OUT drop and V COMP will increase unil i reaches is maximum clamp level. During he AC inpu recovery, high comp leads o very high swiching curren and severe sress is pu on boh he MOSFET and boos diode. To ensure ha he sysem is more robus and reliable, AOZ7111 has a unique AC inpu faul deecion circui o proec agains his ype of scenario. If he AC inpu volage is absen wo or hree addiional cycles, inernal sof-sar is rese and wais for he AC inpu recovery again. During he AC inpu recovery, sof-sar manages urn-on ime allowing he swiching curren o increase smoohly. Under Volage Lock Ou (UVLO) UVLO funcion is used o preven conroller malfuncion when V CC supply volage drops. When V CC supply volage reaches 12V (yp), he inernal block of he IC is enabled and sars operaion. When V CC supply volage drops below 9.5V (yp), mos of he inernal circui is disabled o reduce he IC curren consumpion. Under Volage Proecion (UVP) AOZ7111 deecs he under volage faul if V INV is less han V EN_INV. The UVP comparaor disables he operaion when V INV is less han 0.5V and here is 55mV hyseresis. An exernal small-signal MOSFET can be used o disables he IC. During disable mode, he curren consumpion of he IC decreases o 60µA or less. Rev. 1.0 January Page 11 of 15

Applicaion Informaion Alpha and Omega Semiconducor provides an EXCEL based design ool, an applicaion noe and a demonsraion board o help he design of AOZ7111 and reduce he R&D cycle ime.

12 Applicaion Informaion Alpha and Omega Semiconducor provides an EXCEL based design ool, an applicaion noe and a demonsraion board o help he design of AOZ7111 and reduce he R&D cycle ime. All he ools can be download from: PCB Layou Guide The following are good PCB layou guideline for a PFC sage: 1. To keep he IC GND pin as clean as possible, he power sage ground and he signal ground mus be separaed. 2. The PFC MOSFET gae drive loop pah should be minimized. 3. Minimize he race lengh o INV pin. Since he feedback node is high impedance he race from he oupu resisor divider o INV pin should be as shor as possible. 4. Swiching curren sense (CS pin) is very imporan for he sable operaion of PFC sage. Normally, a RC filer is recommended o reduce he noise applied o he CS pin. Figure 7. Recommended PCB Layou 5. The V CC decoupling capacior C VCC need o be placed close o IC V CC and GND pin as much as possible. Rev. 1.0 January Page 12 of 15

13 Package Dimensions, SO-8L 8 D e Gauge plane Seaing plane 0.25mm L E1 E 1 h x 45 θ c 7 (4x) A2 A 0.10mm A1 b RECOMMENDED LAND PATTERN Dimensions in millimeers Symbols Min. A 1.35 A A b 0.31 c 0.17 D 4.80 E 3.80 e E h 0.25 L 0.40 θ 0 Nom. Max BSC Dimensions in inches Symbols A A1 A2 b c D E e E1 h L θ Min Nom Max BSC UNIT: mm Noes: 1. All dimensions are in millimeers. 2. Dimensions are inclusive of plaing. 3. Package body size exclude mold flash and gae burrs. Mold flash a he non-lead sides should be less han 6 mils each. 4. Dimension L is measured in gauge plane. 5. Conrolling dimension is millimeer, convered inch dimensions are no necessarily exac. Rev. 1.0 January Page 13 of 15

14 Tape and Reel Dimensions, SO-8L Carrier Tape T D1 P1 P2 E1 E2 E B0 K0 A0 D0 P0 Feeding Direcion UNIT: mm Package SO-8 (12mm) A B K D D E E E P P P T 0.25 Reel W1 G S V M N K R H UNIT: mm W Tape Size 12mm Reel Size ø330 M ø ±0.50 N ø97.00 W ±0.30 W ±1.00 H ø /-0.20 K S 2.00 ±0.50 G R V Leader/Trailer and Orienaion Trailer Tape 300mm min. or 75 empy pockes Componens Tape Orienaion in Pocke Leader Tape 500mm min. or 125 empy pockes Rev. 1.0 January Page 14 of 15

15 Par Marking AOZ7111AI (SO-8) Z7111AI FAYWLT Par Number Code Fab & Assembly Locaion Assembly Lo Code Year & Week Code LEGAL DISCLAIMER Alpha and Omega Semiconducor makes no represenaions or warranies wih respec o he accuracy or compleeness of he informaion provided herein and akes no liabiliies for he consequences of use of such informaion or any produc described herein. Alpha and Omega Semiconducor reserves he righ o make changes o such informaion a any ime wihou furher noice. This documen does no consiue he gran of any inellecual propery righs or represenaion of non-infringemen of any hird pary s inellecual propery righs. LIFE SUPPORT POLICY ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life suppor devices or sysems are devices or sysems which, (a) are inended for surgical implan ino he body or (b) suppor or susain life, and (c) whose failure o perform when properly used in accordance wih insrucions for use provided in he labeling, can be reasonably expeced o resul in a significan injury of he user. 2. A criical componen in any componen of a life suppor, device, or sysem whose failure o perform can be reasonably expeced o cause he failure of he life suppor device or sysem, or o affec is safey or effeciveness. Rev. 1.0 January Page 15 of 15

Primary Side Control SMPS with Integrated MOSFET

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