A Harmonic Circulation Current Reduction Method for Parallel Operation of UPS with a Three-Phase PWM Inverter

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1 160 Journal of Power Elecronics, Vol. 5, No. 2, April 2005 JPE A Harmonic Circulaion Curren Reducion Mehod for Parallel Operaion of U wih a Three-Phase Inverer Kyung-Hwan Kim, Wook-Dong Kim * and Dong-Suk Hyun ** * EHWA Technologies and Informaion, Seoul, Korea ** Dep. of Elecrical Eng., Hanyang Universiy, Seoul, Korea ABSTRACT In a parallel operaion of U, here are wo ypes of circulaing currens beween U. One is he low order circulaing curren wih a fundamenal frequency caused by he ampliude and phase differences of U oupu volages, and he oher is he harmonic circulaing curren wih swiching frequency caused by non-synchronized waveforms among U. The eliminaion of he low order circulaing curren is essenial for opimal load sharing in parallel operaions of U, which can be accomplished by he phase and magniude conrol a each U. The harmonic circulaing curren may cause roubles and deeriorae in performance of he conroller for opimal load sharing in parallel operaion of U. This paper presens a synchronizing mehod o eliminae he harmonic circulaion curren in parallel operaion of U. The effeciveness of he proposed scheme has been invesigaed and verified hrough eperimens by a 50kVA U. Keywords: parallel operaion U(Uninerrupible Power Supply), synchronizaion, circulaion curren 1. Inroducion Parallel operaion of U(Uninerrupible Power Supply) is needed o secure higher reliabiliy hrough he redundan operaion or in he sep up of U capaciy in he marke. The hear of he parallel operaion of U is he accepable load sharing ha each U have an equal spli of he load. The good load sharing can be accomplished hrough he minimizaion of he circulaion curren flowing beween Us. If i is assumed ha he U inverer is an ideal sinusoidal volage source, he circulaion curren is creaed only by he phase and Manuscrip received January 31, 2005; revised March 8, 2005 Corresponding Auhor: hellokim@ei21.com Tel: , Fa: , ETI. ** Dep. of Elecrical and Elecronics Eng., Hanyang Univ. magniude difference of he oupu volage beween Us. Various kind of conrol schemes have proposed in order o reduce he circulaion curren under he assumpion ha U inverer is an ideal sinusoidal volage source [1-4]. However, U inverer is no an ideal sinusoidal volage source. Acually, he U inverer generaes volage of (Pulse Widh Modulaion) waveform, which should be duly considered in parallel operaion of U. Generally, each U conneced in parallel has an individual conrol board, each conrol board has a differen imer inerrup signal for generaion, and likewise each U inverer will produce a differen volage. As he resul of he non-synchronized volage waveform beween Us, a considerable amoun of heighened harmonic circulaion curren wih Copyrigh (C) 2005 NuriMedia Co., Ld.

2 A Harmonic Circulaion Curren Reducion Mehod for 161 swiching frequency is creaed. This harmonic circulaion curren causes deerioraion of he frequency conrol performance for a load sharing in proposed conrol schemes. Therefore, he eliminaion of no only he low order circulaion curren bu also he harmonic circulaion curren is essenial for he parallel operaion of U. This paper proposes a simple synchronizing mehod o eliminae he higher harmonic circulaion curren due o non-synchronizes volage using CAN (Conroller Area Nework) bus. In order o eliminae he low order circulaion curren, he mehod shown in [1] is used in his paper. The effeciveness of he proposed conrol scheme is verified by an eperimenal U sysem ha has 50kVA load power capaciy. 2. Proposed Conrol Srucure Bypass Inpu Bypass Inpu U_M Converer Inverer L TR F Conroller Analog T320VC33 T320LF2407A CAN U_S Converer Inverer L TR F Conroller Analog T320VC33 T320LF2407A Oupu C A N B U S Fig. 1 shows parallel U sysem composed of wo U. In his sysem, U_M is a maser U and U_S is a slave U. Maser and slave U share each oher s informaion hrough CAN (Conroller Area Nework) bus. This communicaion line is essenial for he parallel operaion of U, some daa communicaed hrough he line are originally used for he eliminaion of he low order circulaion curren. Fig. 2 shows he daa frame communicaed hrough CAN bus. Is lengh consiss of 76 bis. Arbiraion field has he idenificaion of he maser or he slave, daa field has he oupu curren, bypass volage, and some operaion saus. Each U ransmis is own daa frame o anoher U every 2ms. A ha poin, he maser U has he highes prioriy. Each conrol board has wo DSP (Digial Signal Processor) - one is a T320VC33 which is he main conroller and he oher is T320LF 2407A which generaes he imer inerrup signal for generaion. Since each U calculaes he oal load curren by summaion of each U oupu curren ha is obained rough CAN communicaion, he load curren sensor for measuring he oal load curren is no necessary. A circulaion curren is calculaed from he oal load curren divided by he number of parallel operaing inverer. If one of wo U fails o operaion, he conroller in he failed U deecs he faul sae and separaes from he sysem by iself and he oher U supplies he power o he load. S O F 3. Synchronizaion Figure 3 shows he relaionship beween he imers inerrup of maer U and he daa frame shown in figure 2. In figure 3, is he period value of imer, T pwm is period ime, and T m (m=0,1,2 ) is he imer saing CAN Fig. 1 Configuraion of parallel U sysem Arbiraion Conrol Daa CRC ACK 1 Bi 12 Bi 6 Bi 32 Bi 16 Bi 2 Bi 7 Bi T m TdT SOF Fig. 2 Daa frame of CAN bus T m 1 T CAN Daa Frame T D T R T TdR Fig. 3 Timer for a Maser U EOF Copyrigh (C) 2005 NuriMedia Co., Ld.

3 162 Journal of Power Elecronics, Vol. 5, No. 2, April 2005 poin and T dt, T dr is he ransmi inerrup laency and he received inerrup laency respecively. If i is assumed ha maser U ransmis he daa frame a T m and slave U acknowledged he receive inerrup a = T R, he oal ime from he saring o he receive inerrup, T R can be epressed as T = T + T + T (1) R dt D dr Therefore he inerval ime beween T R and T m, T is Therefore, synchronizaion can be accomplished as follow T + T if slave imer is leading T T if slave imer lagging This is o say, a slave imer value increases if i is ahead of he maser imer. Conversely i decreases in case of lagging. Figure 7 shows he program flowchar for synchronizaion. T = T T (2) where T < T 2 R 1 (up) (up) (down) (down) Figure 4 shows he relaionship beween he imer inerrup of slave U and he daa frame. In he figure, is he period of imer, (s=0,1,2 ) is he saing poin of slave imer, UPWARD means he up-coun inerval, and DOWNWARD means he down-coun inerval. I is assumed ha slave imer inerrup is generaed a = (up) Upward T Downward during UPWARD mode, he ime can be represened as Fig. 4 Timer for a Slave U = (3) T m where is ime corresponding o curren value of slave imer. Then he difference ime beween T m and, can be epressed as = T T = + T (4) m s ( T a ) 0 < T,0 < T < T 2 ( b ) 0 < T, T 2 < T Similarly, during downward mode = T (5) m s = T T = T (6) If he slave U calculaes as (4), (6) whenever a receive imer is generaed, slave is able o know if slave imer is leading or lagging behind he maser imer. Figure 5 shows all cases which can be se up during upward mode. Figure 6 shows all cases during downward mode. ( c ) < 0, 0 < T ( d) 0, T < 0 4. Eperimenal Resuls The prooype of he fully digial conrolled hree-phase inverer using wo DSP(T320C33 and T320LF2407A) < Fig. 5 All cases in Upward Mode Copyrigh (C) 2005 NuriMedia Co., Ld.

4 A Harmonic Circulaion Curren Reducion Mehod for T +1 ( a ) 0 T, < 0 < T m was buil o invesigae he operaion performance and o prove he feasibiliy of he proposed mehod. The major parameers of he U sysem used in he eperimens are given as follows T ( b ) 0 <, 0 < T ( c ) T < 0, T / 2 < T ( d ) T < 0,0 < T < T 2 Upward Fig. 6 All cases in Downward Mode Receive Inerrup Timer Coun Mode? Check on Leading or lagging? Downward = T = T Leading T + T T Fig. 7 Conrol Flow Char Lagging T T he performance he parallel operaion of U. Figure 8 show he oupu volage and curren waveform of maer U under he no-load sae wihou any compensaion for synchronizaion. Noe ha he higher harmonic circulaion curren wih swiching frequency is creaed by a non-synchronized volage wave beween Us. Figure 9 shows oupu volage and he oupu curren waveform of each U under he no-load condiion. Figure 9(a) is for he case wihou compensaion of synchronizaion and (b) is he case of wih compensaion shown in proposed mehod in his paper. Noe ha he higher harmonic circulaion curren is considerably reduced. Figure 10 shows he oupu curren waveform of each U conneced in parallel under he raed load. Figure 10(a) is for he case wihou compensaion and (b) is he case wih compensaion. Figure 10(b) shows ha here is no harmonic circulaion curren and perfec load sharing, while figure 10(a) shows some harmonic circulaion curren and some phase difference in curren of each U conneced in parallel under he deerioraed load sharing. Figure 11 is he Fourier specra of he oupu currens shown in figure10. Noe ha figure 11(a) shows ha he curren shown in figure 10(a) have a harmonic componen of swiching frequency while here is no harmonic componen in curren waveforms shown in figure 10(b). These eperimenal resuls show ha he harmonic circulaion curren can be eliminaed by he proposed mehod in parallel operaion of U. Power raing : 50kVA Fundamenal frequency : 60Hz Nominal line-o-line oupu volage : 208V Inverer and converer swiching frequency : 6kHz Oupu ransformer urns raio : 1.22:1 Oupu ransformer parameers:%x=5%, %R=3.5% Bus and Baud: CAN bus, 500Kbps Under he no-load condiion, figure 8-11 demonsraes Fig. 8 Harmonic circulaion curren waveform flowing over oupu erminal of Maser U under no-load sae Copyrigh (C) 2005 NuriMedia Co., Ld.

5 164 Journal of Power Elecronics, Vol. 5, No. 2, April Conclusions circulaion curren a) Wihou compensaion of Maser U This paper has proposed he synchronizing mehod o eliminae he harmonic circulaion curren caused by non-synchronized oupu volage in parallel operaion of U. This proposed mehod improves he performance of he frequency conroller for he eliminaion of he circulaion curren wih a fundamenal frequency. Likewise i conribues o opimal load sharing in parallel U operaion. The EMI problem also can be reduced by his proposed mehod. The proposed algorihm is very simple and i can be applied o he paralleled U operaion having more han wo U. b) Wih compensaion Fig. 9 oupu waveforms of each U and curren waveform of maser U under no-load sae curren of maser U curren of slave U a) Wihou compensaion b) wih compensaion Fig. 10 Curren waveform of each U conneced in parallel and U Oupu volage waveform under raed load sae swiching frequency of Slave U a) wihou compensaion b)wih compensaion Fig. 11 Fourier specra of oupu curren waveform of maser U References [1] Hiroyuki Hanaoka, Masahiko Nagai, and Minoru Yanagisawa, Developmen of a Novel Parallel Redundan U, in Proc. INTELEC 03, pp. 493~498, Oc [2] Youichi Io and Osamu Iyama, Parallel Redundan Operaion of U wih Robus Curren Minor Loop, in IEEE. Proc. PCC-Nagaoka 97, pp. 489~494, [3] Jiann-Fuh Chen and Ching-Lung Chu, Combinaion Volage-conrolled and curren conrolled inverers for U parallel Operaion, IEEE Trans. On Power Elecronics, Vol. 10, No. 5, pp. 547~558, Sep [4] Edrado Kazuhide Saa, Asuo Kawamura, and Ryo Fujii, Theoreical and Eperimenal Verificaion of Independen Conrol for Parallel Conneced Muli-Us, Proc. INTELEC 03, pp. 485~492, Oc Kyung-Hwan Kim received B.S., M.S. in Elecrical Engineering from Hanyang Universiy, Korea in 1983 and 1985 respecively, where he is currenly pursuing he PhD degree, He was wih Hyosung. As a Research Engineer from 1985 o He was wih POSCON as a Research Engineer from 1991 o 1996, and Hyundai Informaion Technologies as a Principal Research Engineer from 1996 o Since 2000, he has been wih Ehwa Elecric Company as a chief of R&D cener. His curren research ineress are power elecronic conrol of power supply and elecric machines. He is a member of he IEEE Power Elecronics, Indusry Applicaions. He is also a member of he Korean Insiue of Power Elecronics, and he Korean Insiue of Elecrical Engineers. Copyrigh (C) 2005 NuriMedia Co., Ld.

6 A Harmonic Circulaion Curren Reducion Mehod for 165 Wook-Dong Kim received B.S. in Elecrical Engineering from Seoul Universiy, Korea in He was wih LG Indusrial Sysems Company as a Principal Engineer form 1976 o He was wih Gyongmyung Elecric Company as a CTO from 1991 o Since 2001, he has been wih Ehwa Elecric Company as a Presiden. He is a member of he Indusry Applicaions. He is also a member of he Korean Insiue of Power Elecronics, and he Korean Insiue of Elecrical Engineers. Dong-Seok Hyun (S 79-M 83-SM 91-F 03) received he B.S. and M.S. degrees in elecrical engineering from Hanyang Universiy, Seoul, Korea, in 1973 and 1978, respecively, and he Ph.D. degree in elecrical engineering from Seoul Naional Universiy, Seoul, Korea, in From 1976 o 1979, he was wih he Agency of Defense Developmen, Korea, as a Researcher. He was a Research Associae in he deparmen of Elecrical Engineering, Universiy of Toledo, Toledo, OH, from 1984 o 1985 and a Visiing Professor in he deparmen of Elecrical Engineering a he Technical Universiy of Munich, Germany, from 1988 o Since 1979, he has been wih Hanyang Universiy, where he is currenly a Professor in he deparmen of Elecrical Engineering and Direcor of he Advanced Insiue of Elecrical Engineering and Elecronics (AIEE). He is he auhor of more han 120 publicaions concerning elecric machine design, high-power engineering, power elecronics, and moor drives. His research ineress include power elecronics, moor drives, digial signal processing, racion, and heir conrol sysems. Dr. Hyun is a member of he IEEE Power Elecronics, Indusrial Elecronics, Indusry Applicaions, and Elecron Devices Socieies. He is also a member of he Insiuion of Elecrical Engineers (U.K.), he Korean Insiue of Power Elecronics, and he Korean Insiue of Elecrical Engineers. Copyrigh (C) 2005 NuriMedia Co., Ld.