MARKING DIAGRAMS MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 1.) ORDERING INFORMATION PDIP 14 P SUFFIX CASE 646
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1 The MC14106B hex Schmitt Trigger is constructed with MOS P channel and N channel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14106B may be used in place of the MC14069UB hex inverter for enhanced noise immunity or to square up slowly changing waveforms. Increased Hysteresis Voltage Over the MC14584B Supply Voltage Range = 3.0 Vdc to 18 Vdc Capable of Driving Two Low power TTL Loads or One Low power Schottky TTL Load Over the Rated Temperature Range Pin for Pin Replacement for CD40106B and MM74C14 Can Be Used to Replace the MC14584B or MC14069UB MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 1.) Symbol Parameter Value Unit V DD DC Supply Voltage Range 0.5 to V V in, V out Input or Output Voltage Range (DC or Transient) 0.5 to V DD V I in, I out P D Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note 2.) ±10 ma 500 mw T A Ambient Temperature Range 55 to +125 C T stg Storage Temperature Range 65 to +150 C T L Lead Temperature (8 Second Soldering) 260 C 1. Maximum Ratings are those values beyond which damage to the device may occur. 2. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/c From 65C To 125C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, V in and V out should be constrained to the range V SS (V in or V out ) V DD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V SS or V DD ). Unused outputs must be left open. A WL, L YY, Y WW, W PDIP 14 P SUFFIX CASE 646 SOIC 14 D SUFFIX CASE 751A TSSOP 14 DT SUFFIX CASE 948G = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION MARKING DIAGRAMS Device Package Shipping MC14106BCP PDIP /Box MC14106BD SOIC 14 55/Rail MC14106BDR2 SOIC /Tape & Reel 14 MC14106BDT TSSOP 14 96/Rail MC14106BCP AWLYYWW 14106B AWLYWW B ALYW MC14106BDTR2 TSSOP /Tape & Reel 14 1 Semiconductor Components Industries, LLC, 2000 August, 2000 Rev. 4 1 Publication Order Number: MC14106B/D
2 LOGIC DIAGRAM EQUIVALENT CIRCUIT SCHEMATIC (1/6 OF CIRCUIT SHOWN) 2
3 ELECTRICAL CHARACTERISTICS (Voltages Referenced to V SS ) ÎÎ ÎÎ 55C 25C ÎÎ 125C V DD Characteristic Î Symbol Vdc Min MaxÎ Min Typ (3.) Î Max Min Max Unit Output Voltage 0 Level Î V OL Î 0 Î Vdc V in = V DD Î Level V OH Î 5.0 V in = Î Î 9.95 Vdc Hysteresis Voltage V (6.) H Vdc Î ÎÎ Î Î Threshold Voltage Î Positive Going V T Vdc Î Î ÎÎ Î Î Negative Going Î V T Î Î Vdc ÎÎ Î Î Output Drive Current Î I OH Î madc (V OH = 2.5 Vdc) Source Î Î 1.7 (V OH = 4.6 Vdc) (V OH = 9.5 Vdc) Î Î 0.9 (V OH = 13.5 Vdc) Î Î 2.4 (V OL = 0.4 Vdc) Sink Î I OL Î Î 0.36 madc (V OL = 0.5 Vdc) (V OL = 1.5 Vdc) Î Î 2.4 Input Current Î I in 15 ± 0.1 Î ± Î ± 0.1 ± 1.0 µadc Input Capacitance Î C in (V in = 0) pf Quiescent Current Î I DD Î Î µadc (Per Package) ÎÎ Î Î Total Supply Current (4.) (5.) Î I T 5.0 Î I T = (1.8 µa/khz) f + I DD µadc (Dynamic plus Quiescent, 10 Î I T = (3.6 µa/khz) f + I DD Per Package) 15 I (C L = 50 pf on all outputs, all ÎÎ T = (5.4 µa/khz) f + I DD buffers switching) 3. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 4. The formulas given are for the typical characteristics only at 25C. 5. To calculate total supply current at loads other than 50 pf: I T (C L ) = I T (50 pf) + (C L 50) Vfk where I T is in µa (per package), C L in pf, V = (V DD V SS ) in volts, f in khz is input frequency, and k = V = H V T+ V T (But maximum variation of V H is specified as less that V T+ max V T min ). 3
4 SWITCHING CHARACTERISTICS (C L = 50 pf, T A = 25C) ÎÎ V DD Î Î Characteristic Symbol Vdc Min Typ (7.) Max Unit Output Rise Time t TLH Î 10 Î Î 50 Î 100 ns Output Fall Time t THL ns Î 10 Î Î 50 Î 100 ÎÎ 15 Î Î 40 Î 80 Propagation Delay Time t PLH, t PHL ns Î Î Î ÎÎ 15 Î Î 40 Î Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. Figure 1. Switching Time Test Circuit and Waveforms Figure 2. Typical Transfer Characteristics 4
5 APPLICATIONS (a) Schmitt Triggers will square up inputs with slow rise and fall times. Figure 3. (b) A Schmitt trigger offers maximum noise immunity in gate applications. Useful as Pushbutton/Keyboard Debounce Circuit. Figure 4. Monostable Multivibrator 5
6 Figure 5. Astable Multivibrator Useful in discriminating against short pulse durations. Figure 6. Integrator Useful as an edge detector circuit. Figure 7. Differentiator Figure 8. Positive Edge Time Delay Circuit 6
7 PACKAGE DIMENSIONS P SUFFIX PLASTIC DIP PACKAGE CASE ISSUE M B T N A F L C K J H G D 14 PL M D SUFFIX PLASTIC SOIC PACKAGE CASE 751A 03 ISSUE F A B P 7 PL T G D 14 PL K C R X 45 F M J 7
8 PACKAGE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G 01 ISSUE O L T 2X L/2 PIN 1 IDENT. D C 14X K REF N M B U A V G H N J J1 F DETAIL E K K1 ÇÇÇ ÉÉ SECTION N N DETAIL E W ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada ONlit@hibbertco.com Fax Response Line: or Toll Free USA/Canada N. American Technical Support: Toll Free USA/Canada EUROPE: LDC for ON Semiconductor European Support German Phone: (+1) (Mon Fri 2:30pm to 7:00pm CET) ONlit german@hibbertco.com French Phone: (+1) (Mon Fri 2:00pm to 7:00pm CET) ONlit french@hibbertco.com English Phone: (+1) (Mon Fri 12:00pm to 5:00pm GMT) ONlit@hibbertco.com EUROPEAN TOLL FREE ACCESS*: *Available from Germany, France, Italy, UK CENTRAL/SOUTH AMERICA: Spanish Phone: (Mon Fri 8:00am to 5:00pm MST) ONlit spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor Asia Support Phone: (Tue Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: ONlit asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center Nishi Gotanda, Shinagawa ku, Tokyo, Japan Phone: r14525@onsemi.com ON Semiconductor Website: For additional information, please contact your local Sales Representative. 8 MC14106B/D
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Utilizing the circuit designs perfected for Quad Operational Amplifiers, these dual operational amplifiers feature low power drain, a common mode input voltage range extending to ground/v EE, and single
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More informationORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet.
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