High Performance Silicon Gate CMOS

Transcription

1 igh Performance Silicon Gate CMOS The MC74VXT8053 utilizes silicon gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. This analog multiplexer/demultiplexer controls analog voltages that may vary across the complete power supply range (from V CC to GND). The VXT8053 is similar in pinout to the high speed C4053A, and the metal gate MC14053B. The Channel Select inputs determine which one of the Analog Inputs/Outputs is to be connected by means of an analog switch to the Common Output/Input. When the Enable pin is IG, all analog switches are turned off. The Channel Select and Enable inputs are compatible with TT type input thresholds. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic level translator from V CMOS logic to 5.0 V CMOS ogic or from 1.8 V CMOS logic to V CMOS ogic while operating at the higher voltage power supply. The MC74VXT8053 input structure provides protection when voltages up to 7V are applied, regardless of the supply voltage. This allows the MC74VXT8053 to be used to interface 5 V circuits to 3 V circuits. This device has been designed so that the ON resistance (R on ) is more linear over input voltage than R on of metal gate CMOS analog switches. Fast Switching and Propagation Speeds ow Crosstalk Between Switches Diode Protection on All Inputs/Outputs Analog Power Supply Range (V CC GND) = V to 6.0 V Digital (Control) Power Supply Range (V CC GND) = V to 6.0 V Improved inearity and ower ON Resistance Than Metal Gate Counterparts ow Noise In Compliance With the Requirements of JEDEC Standard No. 7A OGIC DIAGRAM Triple Single Pole, Double Position Plus Common Off NOTE: This device allows independent control of each switch. Channel Select Input A controls the X Switch, Input B controls the Y Switch and Input C controls the Z Switch 16 EAD SOIC D SUFFIX CASE 751B 16 EAD TSSOP DT SUFFIX CASE 948F PIN CONNECTION AND MARKING DIAGRAM (Top View) FUNCTION TABE MC74VXT8053 Enable Control Inputs X = Don t Care For detailed package marking information, see the Marking Diagram section on page 10 of this data sheet. Select C B A X X X Z0 Z0 Z0 Z0 Z1 Z1 Z1 Z1 ON Channels Y0 Y0 Y1 Y1 Y0 Y0 Y1 Y1 NONE ORDERING INFORMATION Device Package Shipping X0 X1 X0 X1 X0 X1 X0 X1 MC74VXT8053DR2 SOIC 2500 Units/Reel MC74VXT8053DT TSSOP 96 Units/Rail MC74VXT8053DTR2 TSSOP 2500 Units/Reel Semiconductor Components Industries, C, 02 June, 02 Rev. 3 1 Publication Order Number: MC74VXT8053/D

2 MC74VXT8053 MAXIMUM RATINGS* SymbolÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Parameter ÎÎÎÎÎ Value ÎÎÎ Unit ÎÎÎÎ V CC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Positive DC Supply Voltage (Referenced to GND) ÎÎÎÎÎ 0.5 to + 7.0ÎÎÎ V ÎÎÎÎ V IS ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Analog Input Voltage ÎÎÎÎÎ 0.5 to V CC + 0.5ÎÎÎ V ÎÎÎÎ V in ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Digital Input Voltage (Referenced to GND) ÎÎÎÎÎ 0.5 to V CC + 0.5ÎÎÎ V ÎÎÎÎ I ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Current, Into or Out of Any Pin ÎÎÎÎÎ ÎÎÎ ma ÎÎÎÎ P D ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Power Dissipation in Still Air, SOIC Package ÎÎÎÎÎ 500 ÎÎÎ mw TSSOP Package 450 T ÎÎÎÎ stg ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Storage Temperature Range 65 to ÎÎÎÎÎÎÎ C T ÎÎÎÎ ead Temperature, 1 mm from Case for 10 Seconds ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 260 ÎÎÎ C *Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. Derating SOIC Package: 7 mw/ C from 65 C to 125 C TSSOP Package: 6.1 mw/ C from 65 C to 125 C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. owever, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, V in and V out should be constrained to the range GND (V in or V out ) V CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ). Unused outputs must be left open. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V CC Positive DC Supply Voltage (Referenced to GND) 6.0 V V IS Analog Input Voltage 0.0 V CC V V in Digital Input Voltage (Referenced to GND) GND V CC V V IO * Static or Dynamic Voltage Across Switch 1.2 V T A Operating Temperature Range, All Package Types C t ÎÎÎÎ r, t f Input Rise/Fall Time ns/v ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ (Channel Select or Enable Inputs) ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ V CC = 3.3 V ± 0.3 V ÎÎÎ 0 ÎÎ 100 ÎÎÎ V CC = 5.0 V ± 0.5 V *For voltage drops across switch greater than 1.2 V (switch on), excessive V CC current may be drawn; i.e., the current out of the switch may contain both V CC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. DC CARACTERISTICS Digital Section (Voltages Referenced to GND) Symbol Parameter Condition V I V I I in Minimum igh evel Input Voltage, Channel Select or Enable Inputs Maximum ow evel Input Voltage, Channel Select or Enable Inputs Maximum Input eakage Current, Channel Select or Enable Inputs 0 R on = Per Spec R on = Per Spec Guaranteed imit V CC V 55 to 25 C 85 C 125 C Unit V in = V CC or GND, ± 0.1 ± 1.0 ± 1.0 A V V I CC Maximum Quiescent Supply Current (per Package) Channel Select, Enable and V IS = V CC or GND; V IO = 0 V A 2

3 MC74VXT8053 DC EECTRICA CARACTERISTICS Analog Section ÎÎÎÎÎÎÎÎÎ Guaranteed imit ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ V ÎÎÎÎÎÎÎÎÎÎÎÎ CC ÎÎÎÎ 55 to ÎÎÎÎ ÎÎÎÎÎ Symbol Parameter Test Conditions V 25 C 85 C 125 C Unit ÎÎÎÎ R on ÎÎÎÎÎÎÎÎÎ Maximum ON Resistance ÎÎÎÎÎÎÎÎÎÎ V in = V I or V I ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ V IS = V CC to GND ÎÎÎ ÎÎÎÎ 30 ÎÎÎÎ 32 ÎÎÎÎ 37 ÎÎ I S 10.0 ma (Figures 1, 2) ÎÎÎÎÎÎÎÎÎÎ V ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ in = V I or V I V IS = V CC or GND (Endpoints) ÎÎÎ ÎÎÎÎ 25 ÎÎÎÎ 28 ÎÎÎÎ 35 ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ I S 10.0 ma (Figures 1, 2) ÎÎÎ ÎÎÎÎ ÎÎÎÎ 25 ÎÎÎÎ 30 ÎÎ ÎÎÎÎ R on ÎÎÎÎÎÎÎÎÎ Maximum Difference in ON V in = V I or V I Resistance Between Any Two V IS = 1/2 (V CC ÎÎÎÎÎÎÎÎÎÎÎÎÎ GND) ÎÎÎÎÎÎÎÎÎÎÎÎ Channels in the Same PackageÎÎÎÎÎÎÎÎÎÎ I S 10.0 ma ÎÎÎ ÎÎÎÎ 8.0 ÎÎÎÎ 12 ÎÎÎÎ 15 ÎÎ I off I on Maximum Off Channel eakage Current, Any One Channel Maximum Off Channel eakage Current, Common Channel Maximum On Channel eakage Current, Channel to Channel V in = V I or V I ; V IO = V CC or GND; Switch Off (Figure 3) V in = V I or V I ; V IO = V CC or GND; Switch Off (Figure 4) V in = V I or V I ; Switch to Switch = V CC or GND; (Figure 5) A A AC CARACTERISTICS (C = 50 pf, Input t r = t f = 3 ns) Symbol t P, t P t P, t P t PZ, t PZ t PZ, t PZ Parameter Maximum Propagation Delay, Channel Select to Analog Output (Figure 9) Maximum Propagation Delay, Analog Input to Analog Output (Figure 10) Maximum Propagation Delay, Enable to Analog Output (Figure 11) Maximum Propagation Delay, Enable to Analog Output (Figure 11) Guaranteed imit V CC V 55 to 25 C 85 C 125 C Unit C in Maximum Input Capacitance, Channel Select or Enable Inputs pf C I/O Maximum Capacitance Analog I/O pf (All Switches Off) Common O/I Feedthrough ns ns ns ns C PD 25 C, VCC = 5.0 V pf Power Dissipation Capacitance (Figure 13)* 45 * Used to determine the no load dynamic power consumption: P D = C PD V CC 2 f + I CC V CC. 3

4 MC74VXT8053 ADDITIONA APPICATION CARACTERISTICS (GND = 0 V) Symbol Parameter Condition BW Maximum On Channel Bandwidth or Minimum i Frequency Response (Figure 6) Off Channel Feedthrough Isolation (Figure 7) Feedthrough Noise. Channel Select Input to Common I/O (Figure 8) Crosstalk Between Any Two Switches (Figure 12) TD Total armonic Distortion (Figure 14) *imits not tested. Determined by design and verified by qualification. f in = 1Mz Sine Wave; Adjust f in Voltage to Obtain 0dBm at V OS ; Increase f in Frequency Until db Meter Reads 3 db; R = 50, C = 10 pf f in = Sine Wave; Adjust f in Voltage to Obtain 0 dbm at V IS f in = 10kz, R = 600, C = 50 pf f in = 1.0Mz, R = 50, C = 10pF V in 1Mz Square Wave (t r = t f = 3 ns); Adjust R at Setup so that I S = 0A; Enable = GND R = 600, C = 50pF R = 10 k, C = 10pF f in = Sine Wave; Adjust f in Voltage to Obtain 0dBm at V IS f in = 10 kz, R = 600, C = 50pF f in = 1.0Mz, R = 50, C = 10pF f in = 1kz, R = 10 k, C = 50pF TD = TD measured TD source V IS = V PP sine wave V IS = 4.0V PP sine wave V IS = 5.0V PP sine wave V CC imit* V 25 C Unit M z db mv PP db % Figure 1a. Typical On Resistance, V CC = V 4

5 MC74VXT8053 Figure 1b. Typical On Resistance, V CC = V Figure 1c. Typical On Resistance, V CC = V Figure 1. On Resistance Test Set Up 5

6 MC74VXT8053 Figure 2. Maximum Off Channel eakage Current, Any One Channel, Test Set Up Figure 3. Maximum Off Channel eakage Current, Common Channel, Test Set Up Figure 4. Maximum On Channel eakage Current, Channel to Channel, Test Set Up Figure 5. Maximum On Channel Bandwidth, Test Set Up Figure 6. Off Channel Feedthrough Isolation, Test Set Up Figure 7. Feedthrough Noise, Channel Select to Common Out, Test Set Up 6

7 MC74VXT8053 Figure 9a. Propagation Delays, Channel Select to Analog Out Figure 9b. Propagation Delay, Test Set Up Channel Select to Analog Out Figure 10a. Propagation Delays, Analog In to Analog Out Figure 10b. Propagation Delay, Test Set Up Analog In to Analog Out Figure 11a. Propagation Delays, Enable to Analog Out Figure 11b. Propagation Delay, Test Set Up Enable to Analog Out 7

8 MC74VXT8053 Figure 12. Crosstalk Between Any Two Switches, Test Set Up Figure 13. Power Dissipation Capacitance, Test Set Up Figure 14a. Total armonic Distortion, Test Set Up Figure 14b. Plot, armonic Distortion APPICATIONS INFORMATION The Channel Select and Enable control pins should be at V CC or GND logic levels. V CC being recognized as a logic high and GND being recognized as a logic low. In this example: V CC = +5V = logic high GND = 0V = logic low The maximum analog voltage swing is determined by the supply voltages V CC. The positive peak analog voltage should not exceed V CC. Similarly, the negative peak analog voltage should not go below GND. In this example, the difference between V CC and GND is five volts. Therefore, using the configuration of Figure 15, a maximum analog signal of five volts peak to peak can be controlled. Unused analog inputs/outputs may be left floating (i.e., not connected). owever, tying unused analog inputs and outputs to V CC or GND through a low value resistor helps minimize crosstalk and feedthrough noise that may be picked up by an unused switch. Although used here, balanced supplies are not a requirement. The only constraints on the power supplies are that: V CC GND = 2 to 6 volts When voltage transients above V CC and/or below GND are anticipated on the analog channels, external Germanium or Schottky diodes (D x ) are recommended as shown in Figure 16. These diodes should be able to absorb the maximum anticipated current surges during clipping. 8

9 MC74VXT8053 Figure 15. Application Example Figure 16. External Germanium or Schottky Clipping Diodes a. ow Voltage ogic evel Shifting Control b. 2 Stage ogic evel Shifting Control Figure 17. Interfacing ow Voltage CMOS Inputs Figure 18. Function Diagram, VXT8053 9

10 MC74VXT8053 MARKING DIAGRAMS (Top View) 16 EAD SOIC D SUFFIX CASE 751B 16 EAD TSSOP DT SUFFIX CASE 948F 10

11 MC74VXT8053 PACKAGE DIMENSIONS D SUFFIX PASTIC SOIC PACKAGE CASE 751B 05 ISSUE J T G A 9 K B P 8 P C M R X 45 J F 11

12 MC74VXT8053 PACKAGE DIMENSIONS DT SUFFIX PASTIC TSSOP PACKAGE CASE 948F 01 ISSUE O T PIN 1 IDENT. D 2X /2 C 16X K REF A V G B U N N J J1 F DETAI E DETAI E K K1 ÇÇÇ ÇÇÇ ÉÉ SECTION N N M W ON Semiconductor and are registered trademarks of Semiconductor Components Industries, C (SCIC). SCIC reserves the right to make changes without further notice to any products herein. SCIC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCIC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCIC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCIC does not convey any license under its patent rights nor the rights of others. SCIC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCIC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCIC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCIC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCIC was negligent regarding the design or manufacture of the part. SCIC is an Equal Opportunity/Affirmative Action Employer. PUBICATION ORDERING INFORMATION iterature Fulfillment: iterature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada ONlit@hibbertco.com N. American Technical Support: Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center Nishi Gotanda, Shinagawa ku, Tokyo, Japan Phone: r14525@onsemi.com ON Semiconductor Website: For additional information, please contact your local Sales Representative. 12 MC74VXT8053/D