MC14066B. Quad Analog Switch/Quad Multiplexer
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1 Quad Analog Switch/Quad Multiplexer The MC4066B consists of four independent switches capable of controlling either digital or analog signals. This quad bilateral switch is useful in signal gating, chopper, modulator, demodulator and CMOS logic implementation. The MC4066B is designed to be pinforpin compatible with the MC406B, but has much lower ON resistance. Input voltage swings as large as the full supply voltage can be controlled via each independent control input. Features Triple Diode Protection on All Control Inputs Supply oltage Range = 3.0 dc to 8 dc Linearized Transfer Characteristics Low Noise 2 n/ Cycle, f.0 khz typical PinforPin Replacement for CD406, CD406, MC406B For Lower R ON, Use The HC4066 HighSpeed CMOS Device PbFree Packages are Available MAXIMUM RATINGS (oltages Referenced to ) Symbol Parameter alue Unit DC Supply oltage Range 0.5 to +8.0 in, out I in Input or Output oltage Range (DC or Transient) Input Current (DC or Transient) per Control Pin 0.5 to ± 0 ma I SW Switch Through Current ± 25 ma P D Power Dissipation, per Package (Note ) 500 mw T A Ambient Temperature Range 55 to +25 C T stg Storage Temperature Range 65 to +50 C T L Lead Temperature (8Second Soldering) 260 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/ C From 65 C To 25 C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, in and out should be constrained to the range ( in or out ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either or ). Unused outputs must be left open. PDIP4 P SUFFIX CASE 646 SOIC4 D SUFFIX CASE 75A TSSOP4 DT SUFFIX CASE 948G SOEIAJ4 F SUFFIX CASE MARKING DIAGRAMS MC4066BCP AWLYYWWG BG AWLYWW 4 066B ALYW A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or = PbFree Package (Note: Microdot may be in either location) MC4066B ALYWG ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Semiconductor Components Industries, LLC, 2006 October, 2006 Rev. 7 Publication Order Number: MC4066B/D
2 PIN ASSIGNMENT IN 4 OUT 2 3 CONTROL OUT CONTROL 4 IN 2 4 IN 4 CONTROL OUT 4 CONTROL OUT IN 3 3 CONTROL IN 5 CONTROL 2 4 IN 2 6 CONTROL 3 8 IN 3 2 CONTROL 4 BLOCK DIAGRAM IN 4 2 OUT 3 OUT 2 9 OUT 3 0 OUT 4 = PIN 4 = PIN 7 LOGIC DIAGRAM AND TRUTH TABLE (/4 OF DEICE SHOWN) IN/OUT CONTROL Control Switch 0= OFF = ON OUT/IN Logic Diagram Restrictions in out CIRCUIT SCHEMATIC (/4 OF CIRCUIT SHOWN) CMOS INPUT 300 2
3 Î ELECTRICAL CHARACTERISTICS 55 C 25 C Î 25 C Characteristic Symbol Test Conditions Min Max Min Typ (2) Max Min Max Unit Î SUPPLY REQUIREMENTS (oltages Referenced to EE ) Power Supply oltage Î Range Î Quiescent Current Per I Package DD 5.0 Control Inputs: A 0 in = or, Switch I/O: I/O DD, and switch 500 m (3) Total Supply Current I D(A) 5.0 T A = 25 C only The A (0.07 A/kHz) f + I (Dynamic Plus Quiescent, Î 0 channel component, DD Typical (0.20 A/kHz) f + I Per Package 5 ( in out )/R on, is DD not included.) (0.36 A/kHz) f + I DD Î CONTROL INPUTS (oltages Referenced to ) LowLevel Input oltage IL 5.0 R on = per spec, 0 I off = per spec HighLevel Input oltage IH 5.0 R 0 on = per spec, I off = per spec Î Input Leakage Current I in 5 in = 0 or ± 0. ± ± 0. ±.0 A Input Capacitance C in Î pf Î SWITCHES IN AND OUT (oltages Referenced to ) Recommended Peakto I/O Peak oltage Into or Out of the Switch Î Channel On or Off 0 Î 0 0 DD p p Recommended Static or switch Channel On m Dynamic oltage Across Î the Switch (3) (Figure ) Output Offset oltage OO in = 0, No Load 0 ON Resistance R on 5.0 switch 500 m 0 (3), in = IL or IH (Control), and in = to (Switch) ON Resistance Between R on Any Two Channels Î 5.0 0Î in the Same Package Î OffChannel Leakage I Current (Figure 6) off 5 in = IL or IH ±00 ± 0.05 ±00 ± 000 na (Control) Channel to Channel or Any One Channel Î Capacitance, Switch I/O C I/O Switch Off 0 5 pf Î Capacitance, Feedthrough C I/O 0.47 pf (Switch Off) 2. Data labeled Typ is not to be used for design purposes, but is intended as an indication of the IC s potential performance. 3. For voltage drops across the switch ( switch ) > 600 m ( > 300 m at high temperature), excessive current may be drawn; i.e. the current out of the switch may contain both and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. (See first page of this data sheet.) 3
4 Î ELECTRICAL CHARACTERISTICS (Note 4) (C L = 50 pf, T A = 25 C unless otherwise noted.) Characteristic Symbol dc Min Typ (5) Max Unit Î Propagation Delay Times SS = 0 dc t Input to Output (R L = 0 k ) PLH, t PHL ns t PLH, t PHL = (0.7 ns/pf) C L ns t PLH, t PHL = (0.08 ns/pf) C L ns t PLH, t PHL = (0.06 ns/pf) C L ns Control to Output (R L = k ) (Figure 2) t PHZ ns Output to High Impedance Output 0 to High Impedance t PLZ ns Î High Impedance to Output t PZH ns High Impedance to Output 0 t PZL ns Second Harmonic Distortion = 5 dc ( in =.77 dc, RMS 0.0 dc, R L % = 0 k, f =.0 khz) Bandwidth (Switch ON) (Figure 3) SS = 5 dc (R L = k, 20 Log ( out / in ) = 3 db, C L = 50 pf, MHz in = 5 pp ) Feedthrough Attenuation (Switch OFF) SS = 5 dc ( in = 5 pp, R L = k, f in db =.0 MHz) (Figure 3) Channel Separation (Figure 4) SS = 5 dc ( in = 5 pp, R L = k, f in = 8.0 MHz) db (Switch A ON, Switch B OFF) Î Crosstalk, Control Input to Signal Output (Figure 5) = 5 dc (R = k, R L = 0 k, Control t TLH = t THL = 20 ns) m pp 4. The formulas given are for the typical characteristics only at 25 C. 5. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 4
5 ORDERING INFORMATION MC4066BCP MC4066BCPG MC4066BD MC4066BDG MC4066BDR2 MC4066BDR2G MC4066BDTR2 MC4066BDTR2G MC4066BF MC4066BFG MC4066BFEL Device Package Shipping PDIP4 PDIP4 (PbFree) SOIC4 SOIC4 (PbFree) SOIC4 SOIC4 (PbFree) TSSOP4* TSSOP4* SOEIAJ4 SOEIAJ4 (PbFree) SOEIAJ4 25 Units / Rail 55 Units / Rail 2500 / Tape & Reel 50 Units / Rail MC4066BFELG SOEIAJ4 (PbFree) 2000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. *This package is inherently PbFree. 5
6 TEST CIRCUITS out ON SWITCH C R L C L CONTROL SECTION OF IC SOURCE LOAD C out out 20 ns t PZH 0% t PZL 90% in x 90% DD 50% 0% tphz 90% in = t PLZ x = in = 0% x = Figure. Across Switch Figure 2. TurnOn Delay Time Test Circuit and Waveforms C = FOR BANDWIDTH TEST C = FOR FEEDTHROUGH TEST 2 2 in R L C L in out R L C L C R L C L Figure 3. Bandwidth and Feedthrough Attenuation Figure 4. Channel Separation OFF CHANNEL UNDER TEST k in R L 0 k out C L = 50 pf CONTROL SECTION OF IC A C = 5.0 TO SWING Figure 5. Crosstalk, Control to Output Figure 6. Off Channel Leakage 6
7 0 k KEITHLEY 60 DIGITAL MULTIMETER k RANGE XY PLOTTER Figure 7. Channel Resistance (R ON ) Test Circuit TYPICAL RESISTANCE CHARACTERISTICS R ON, ON" RESISTANCE (OHMS) T A = 25 C 25 C 55 C R ON, ON" RESISTANCE (OHMS) T A = 25 C 25 C 55 C in, INPUT OLTAGE (OLTS) Figure 8. = 7.5, = in, INPUT OLTAGE (OLTS) Figure 9. = 5.0, = 5.0 R ON, ON" RESISTANCE (OHMS) T A = 25 C 25 C 55 C R ON, ON" RESISTANCE (OHMS) T A = 25 C = in, INPUT OLTAGE (OLTS) Figure 0. = 2.5, = in, INPUT OLTAGE (OLTS) Figure. Comparison at 25 C, = 7
8 APPLICATIONS INFORMATION Figure A illustrates use of the Analog Switch. The 0to5 digital control signal is used to directly control a 5 peaktopeak analog signal. The digital control logic levels are determined by and. The voltage is the logic high voltage, the voltage is logic low. For the example, = + 5 = logic high at the control inputs; = GND = 0 = logic low. The maximum analog signal level is determined by and. The analog voltage must not swing higher than or lower than. The example shows a 5 peaktopeak signal which allows no margin at either peak. If voltage transients above and/or below are anticipated on the analog channels, external diodes (D x ) are recommended as shown in Figure B. These diodes should be small signal types able to absorb the maximum anticipated current surges during clipping. The absolute maximum potential difference between and is 8. Most parameters are specified up to 5 which is the recommended maximum difference between and pp ANALOG SIGNAL SWITCH IN SWITCH OUT 5 pp ANALOG SIGNAL GND EXTERNAL CMOS DIGITAL CIRCUITRY 0TO5 DIGITAL CONTROL SIGNALS MC4066B Figure A. Application Example D X D X SWITCH IN SWITCH OUT D X D X Figure B. External Germanium or Schottky Clipping Diodes 8
9 PACKAGE DIMENSIONS PDIP4 CASE ISSUE P B NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. T N SEATING PLANE A INCHES MILLIMETERS DIM MIN MAX MIN MAX A B F L C D C F G 0.00 BSC 2.54 BSC H J K K J L M 0 0 H G D 4 PL M N (0.005) M 9
10 PACKAGE DIMENSIONS SOIC4 CASE 75A03 ISSUE H T SEATING PLANE G A 4 8 D 4 PL 7 B K P 7 PL C 0.25 (0.00) M T B S A S 0.25 (0.00) M B M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES R X 45 F DIM MIN MAX MIN MAX A B C D M J F G.27 BSC BSC J K M P R SOLDERING FOOTPRINT* 4X X X PITCH DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 0
11 PACKAGE DIMENSIONS TSSOP4 CASE 948G0 ISSUE B 0.5 (0.006) T 0.5 (0.006) T L 0.0 (0.004) T SEATING PLANE U U S 2X L/2 PIN IDENT. S D C 4 4X K REF 0.0 (0.004) M T U S S N (0.00) M B U 7 A G H N J J F DETAIL E K K ÇÇÇ ÉÉÉ SECTION NN DETAIL E W NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE W. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G 0.65 BSC BSC H J J K K L 6.40 BSC BSC M SOLDERING FOOTPRINT* PITCH 4X X.26 DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
12 PACKAGE DIMENSIONS SOEIAJ4 CASE 9650 ISSUE A L E 4 8 Q E H E M 7 L Z DETAIL P D IEW P e A c b A 0.3 (0.005) M 0.0 (0.004) NOTES: М. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. М 2. CONTROLLING DIMENSION: MILLIMETER. М 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.5 (0.006) PER SIDE. М 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. М 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.08). MILLIMETERS INCHES DIM MIN MAX MIN MAX A A b c D E e.27 BSC BSC H E L E M Q Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC4066B/D
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