74HCT157. Quad 2 Input Data Selectors / Multiplexers. High Performance Silicon Gate CMOS
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1 74HCT57 Quad 2 Input Data Selectors / Multiplexers High Performance Silicon Gate CMOS The 74HCT57 is identical in pinout to the S57. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with STT outputs. This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the outputs in noninverted form. A high level on the Output Enable input sets all four Y outputs to a low level. Features Output Drive Capability: 0 STT oads TT/NMOS Compatible Input evels Outputs Directly Interface to CMOS, NMOS, and TT Operating Voltage Range: 4.5 to 5.5 V ow Input Current:.0 A High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A ESD Performance: HBM 2000 V; Machine Model 200 V Chip Complexity: 82 FETs or 20.5 Equivalent Gates These are Pb Free Devices 6 6 SOIC 6 D SUFFIX CASE 75B TSSOP 6 DT SUFFIX CASE 948F 6 MARKING DIAGRAMS HCT57G AWYWW 6 HCT 57 AYW 74HCT57 = Device Code A = Assembly ocation, W = Wafer ot Y = Year W, WW = Work Week G or = Pb Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Semiconductor Components Industries, C, 2007 March, 2007 Rev. Publication Order Number: 74HCT57/D
2 74HCT57 SEECT A0 B OUTPUT ENABE A3 Y0 4 3 B3 A 5 2 Y3 B Y A2 B2 GND 8 9 Y2 Figure. Pin Assignment NIBBE A INPUTS NIBBE B INPUTS A0 A A2 A3 B0 B B2 B3 SEECT OUTPUT ENABE Y0 Y Y2 Y3 DATA OUTPUTS PIN 6 = PIN 8 = GND FUNCTION TABE Figure 2. ogic Diagram Inputs Output Outputs Enable Select Y0 Y3 H X H A0 A3 B0 B3 X = don t care A0 A3, B0 B3 = the levels of the respective Data Word Inputs. ORDERING INFORMATION 74HCT57DR2G Device Package Shipping SOIC 6 (Pb Free) 2500 Units / Reel 74HCT57DTR2G TSSOP 6* 2500 Units / Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. *This package is inherently Pb Free. 2
3 74HCT57 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS Symbol Parameter Value Unit DC Supply Voltage (Referenced to GND) 0.5 to V V in DC Input Voltage (Referenced to GND) 0.5 to V V out DC Output Voltage (Referenced to GND) 0.5 to V I in DC Input Current, per Pin ±20 ma I out DC Output Current, per Pin ±25 ma I CC DC Supply Current, and GND Pins ±50 ma P D Power Dissipation in Still Air, SOIC Package TSSOP Package T stg Storage Temperature 65 to + 50 C T ead Temperature, mm from Case for 0 Seconds (SOIC or TSSOP Package) 260 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Derating SOIC Package: 7 mw/ C from 65 to 25 C TSSOP Package: 6. mw/ C from 65 to 25 C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High Speed CMOS Data Book (D29/D). RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit DC Supply Voltage (Referenced to GND) V V in, V out DC Input Voltage, Output Voltage (Referenced to GND) mw C 0 V T A Operating Temperature, All Package Types C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, V in and V out should be constrained to the range GND (V in or V out ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or ). Unused outputs must be left open. t r, t f Input Rise and Fall Time = V (Figure ) = 4.5 V = 6.0 V ns DC EECTRICA CHARACTERISTICS (Voltages Referenced to GND) Guaranteed imit Symbol Parameter Condition (V) 55 to 25 C 85 C 25 C Unit V IH Minimum High evel Input Voltage V out = 0.V I out 20 A V I Maximum ow evel Input Voltage V out = 0.V I out 20 A V OH V O Minimum High evel Output Voltage Maximum ow evel Output Voltage V in = V I I out 20 A V in = V I I out 4.0mA V in = V IH I out 20 A V in = V IH I out 4.0mA I in Maximum Input eakage Current V in = or GND 5.5 ±0. ±.0 ±.0 A I CC I CC Maximum Quiescent Supply Current (per Package) Additional Quiescent Supply Current V in = or GND I out = 0 A V in = 2.4V, Any One Input V in = or GND, Other Inputs I out = 0 A A 55 C 25 to 25 C Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High Speed CMOS Data Book (D29/D). 2. Total Supply Current = I CC + Σ I CC. V V V V ma 3
4 74HCT57 AC EECTRICA CHARACTERISTICS (C = 50 pf, Input t r = t f = 6.0 ns) Symbol t PH, Parameter Maximum Propagation Delay, Input A or B to Output Y (Figures and 4) (V) Guaranteed imit 55 to 25 C 85 C 25 C Unit ns t PH, t PH, t TH, t TH Maximum Propagation Delay, Select to Output Y (Figures 2 and 4) Maximum Propagation Delay, Output Enable to Output Y (Figures 3 and 4) Maximum Output Transition Time, Any Output (Figures and 4) ns ns ns C in Maximum Input Capacitance pf NOTE: For propagation delays with loads other than 50 pf, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High Speed CMOS Data Book (D29/D). 25 C, = 5.0 V C PD Power Dissipation Capacitance (Per Package)* 33 pf * Used to determine the no load dynamic power consumption: P D = C PD V 2 CC f + I CC. For load considerations, see Chapter 2 of the ON Semiconductor High Speed CMOS Data Book (D29/D). 4
5 74HCT57 PIN DESCRIPTIONS INPUTS A0, A, A2, A3 (Pins 2, 5,, 4) Nibble A inputs. The data present on these pins is transferred to the outputs when the Select input is at a low level and the Output Enable input is at a low level. The data is presented to the outputs in noninverted form. B0, B, B2, B3 (Pins 3, 6, 0, 3) Nibble B inputs. The data present on these pins is transferred to the outputs when the Select input is at a high level and the Output Enable input is at a low level. The data is presented to the outputs in noninverted form. OUTPUTS Y0, Y, Y2, Y3 (Pins 4, 7, 9, 2) Data outputs. The selected input Nibble is presented at these outputs when the Output Enable input is at a low level. The data present on these pins is in its noninverted form. For the Output Enable input at a high level, the outputs are at a low level. CONTRO INPUTS Select (Pin ) Nibble select. This input determines the data word to be transferred to the outputs. A low level on this input selects the A inputs and a high level selects the B inputs. Output Enable (Pin 5) Output Enable input. A low level on this input allows the selected input data to be presented at the outputs. A high level on this input sets all outputs to a low level. SWITCHING WAVEFORMS t r t f INPUT A OR B 0% t PH OUTPUT Y 0% GND SEECT OUTPUT Y t PH t r t f 0% 0% GND t TH t TH t TH t TH Figure 3. HCT57 Figure 4. Y versus Selected, Noninverted OUTPUT ENABE 0% t r t f GND OUTPUT Y 0% t PH t TH t TH Figure 5. HCT57 TEST POINT DEVICE UNDER TEST OUTPUT C * *Includes all probe and jig capacitance Figure 6. Test Circuit 5
6 74HCT57 EXPANDED OGIC DIAGRAM A0 B Y0 NIBBE OUTPUTS A B A2 B Y Y2 DATA OUTPUTS A3 B3 OUTPUT ENABE SEECT Y3 6
7 74HCT57 PACKAGE DIMENSIONS SOIC 6 CASE 75B 05 ISSUE K A B P 8 P 0.25 (0.00) M B S NOTES:. DIMENSIONING AND TOERANCING PER ANSI Y4.5M, CONTROING DIMENSION: MIIMETER. 3. DIMENSIONS A AND B DO NOT INCUDE MOD PROTRUSION. 4. MAXIMUM MOD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SHA BE 0.27 (0.005) TOTA IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIA CONDITION. T SEATING PANE G D 6 P K C M R X 45 J F MIIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G.27 BSC BSC J K M P R (0.00) M T B S A S SODERING FOOTPRINT* 8X X.2 6 6X PITCH 8 9 DIMENSIONS: MIIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D. 7
8 74HCT57 PACKAGE DIMENSIONS TSSOP 6 CASE 948F 0 ISSUE B 0.5 (0.006) T 0.5 (0.006) T 0.0 (0.004) T SEATING PANE U PIN IDENT. U D S S 2X /2 C 6X K REF 0.0 (0.004) M T U S V S A V G B U H J N N J F DETAI E DETAI E K K ÇÇÇ ÉÉÉ ÇÇÇ SECTION N N 0.25 (0.00) M W NOTES:. DIMENSIONING AND TOERANCING PER ANSI Y4.5M, CONTROING DIMENSION: MIIMETER. 3. DIMENSION A DOES NOT INCUDE MOD FASH. PROTRUSIONS OR GATE BURRS. MOD FASH OR GATE BURRS SHA NOT EXCEED 0.5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCUDE INTEREAD FASH OR PROTRUSION. INTEREAD FASH OR PROTRUSION SHA NOT EXCEED 0.25 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SHA BE 0.08 (0.003) TOTA IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIA CONDITION. 6. TERMINA NUMBERS ARE SHOWN FOR REFERENCE ONY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PANE W. MIIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G 0.65 BSC BSC H J J K K BSC BSC M SODERING FOOTPRINT* PITCH 6X X.26 DIMENSIONS: MIIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D. 8
9 74HCT57 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, C (SCIC). SCIC reserves the right to make changes without further notice to any products herein. SCIC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCIC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCIC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCIC does not convey any license under its patent rights nor the rights of others. SCIC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCIC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCIC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCIC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCIC was negligent regarding the design or manufacture of the part. SCIC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBICATION ORDERING INFORMATION ITERATURE FUFIMENT: iterature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order iterature: For additional information, please contact your local Sales Representative 74HCT57/D
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MMBZxxxALT1G Series, SZMMBZxxxALT1G Series. 24 and 40 Watt Peak Power Zener Transient Voltage Suppressors
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NTTFS5116PLTWG. Power MOSFET 60 V, 20 A, 52 m. Low R DS(on) Fast Switching These Devices are Pb Free and are RoHS Compliant
Power MOSFET 6 V, 2 A, 52 m Features Low R DS(on) Fast Switching These Devices are Pb Free and are RoHS Compliant Applications Load Switches DC Motor Control DC DC Conversion MAXIMUM RATINGS ( unless otherwise
NTTFS3A08PZTWG. Power MOSFET 20 V, 15 A, Single P Channel, 8FL
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MC14001B Series. B-Suffix Series CMOS Gates MC14001B, MC14011B, MC14023B, MC14025B, MC14071B, MC14073B, MC14081B, MC14082B
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MMBFU310LT1G. JFET Transistor. N Channel. These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant. Features.
MMBFULT1G JFET Transistor N Channel Features These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant 2 SOURCE MAXIMUM RATINGS Rating Symbol Value Unit Drain Source Voltage V DS 25 Vdc Gate
NSV2029M3T5G. PNP Silicon General Purpose Amplifier Transistor PNP GENERAL PURPOSE AMPLIFIER TRANSISTORS SURFACE MOUNT
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NLAS7213. High-Speed USB 2.0 (480 Mbps) DPST Switch
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This document, MC74HC4066/D has been canceled and replaced by MC74HC4066A/D LAN was sent 9/28/01
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NTR4502P, NVTR4502P. Power MOSFET. 30 V, 1.95 A, Single, P Channel, SOT 23
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NJX1675PDR2G. Complementary 30 V, 6.0 A, Transistor. 30 VOLTS, 6.0 AMPS COMPLEMENTARY TRANSISTOR EQUIVALENT R DS(on) 80 mω
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NTJD1155LT1G. Power MOSFET. 8 V, 1.3 A, High Side Load Switch with Level Shift, P Channel SC 88
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MMSZxxxET1 Series, SZMMSZxxxET1G Series. Zener Voltage Regulators. 500 mw SOD 123 Surface Mount
MMSZxxxET Series, SZMMSZxxxETG Series Zener Voltage Regulators 5 mw SOD 3 Surface Mount Three complete series of Zener diodes are offered in the convenient, surface mount plastic SOD 3 package. These devices
PIN CONNECTIONS MAXIMUM RATINGS (T J = 25 C unless otherwise noted) SC 75 (3 Leads) Parameter Symbol Value Unit Drain to Source Voltage V DSS 30 V
NTA7N, NVTA7N Small Signal MOSFET V, 4 ma, Single, N Channel, Gate ESD Protection, SC 7 Features Low Gate Charge for Fast Switching Small.6 x.6 mm Footprint ESD Protected Gate NV Prefix for Automotive
MJD6039, NJVMJD6039T4G. Darlington Power Transistors. DPAK For Surface Mount Applications SILICON POWER TRANSISTORS 4 AMPERES, 80 VOLTS, 20 WATTS
Darlington Power Transistors For Surface Mount Applications Designed for general purpose power and switching such as output or driver stages in applications such as switching regulators, convertors, and
MJD31, MJD31C (NPN), MJD32, MJD32C (PNP) Complementary Power Transistors. DPAK For Surface Mount Applications
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MURA105T3G MURA110T3G SURA8110T3G. Surface Mount Ultrafast Power Rectifiers ULTRAFAST RECTIFIERS 1 AMPERE, VOLTS
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MUN5211T1 Series. NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network NPN SILICON BIAS RESISTOR TRANSISTORS
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NLAS7222B, NLAS7222C. High-Speed USB 2.0 (480 Mbps) DPDT Switches
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MMBZ15VDLT3G MMBZ27VCLT1G. 40 Watt Peak Power Zener Transient Voltage Suppressors. SOT-23 Dual Common Cathode Zeners for ESD Protection
MMBZ5VDLT, MMBZ7VCLT Preferred s 40 Watt Peak Power Zener Transient Voltage Suppressors SOT- Dual Common Cathode Zeners for ESD Protection These dual monolithic silicon zener diodes are designed for applications
NTTFS5820NLTWG. Power MOSFET. 60 V, 37 A, 11.5 m. Low R DS(on) Low Capacitance Optimized Gate Charge These Devices are Pb Free and are RoHS Compliant
NTTFS582NL Power MOSFET 6 V, 37 A,.5 m Features Low R DS(on) Low Capacitance Optimized Gate Charge These Devices are Pb Free and are RoHS Compliant MAXIMUM RATINGS ( unless otherwise stated) Parameter
NUF8401MNT4G. 8-Channel EMI Filter with Integrated ESD Protection
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MMUN2111LT1 Series. Bias Resistor Transistors. PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
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NSTB1005DXV5T1, NSTB1005DXV5T5. Dual Common Base Collector Bias Resistor Transistors
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1N6373-1N6381 Series (ICTE-5 - ICTE-36) 1500 Watt Peak Power Mosorb Zener Transient Voltage Suppressors. Unidirectional*
N6373 - N638 Series (ICTE-5 - ICTE-36) 5 Watt Peak Power Mosorb Zener Transient Voltage Suppressors Unidirectional* Mosorb devices are designed to protect voltage sensitive components from high voltage,
MCR8DSM, MCR8DSN. Sensitive Gate Silicon Controlled Rectifiers. Reverse Blocking Thyristors. SCRs 8 AMPERES RMS VOLTS
Preferred Device Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed for high volume, low cost, industrial and consumer applications such as motor control; process control;
NTK3139P. Power MOSFET. 20 V, 780 ma, Single P Channel with ESD Protection, SOT 723
NTK9P Power MOSFET V, 78 ma, Single P Channel with ESD Protection, SOT 7 Features P channel Switch with Low R DS(on) % Smaller Footprint and 8% Thinner than SC 89 Low Threshold Levels Allowing.5 V R DS(on)
NDF10N60Z. N-Channel Power MOSFET 600 V, 0.75
NDFNZ N-Channel Power MOSFET V,.7 Features Low ON Resistance Low Gate Charge ESD Diode Protected Gate % Avalanche Tested % R g Tested These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant
MBRA320T3G Surface Mount Schottky Power Rectifier
Surface Mount Schottky Power Rectifier Power Surface Mount Package Employing the Schottky Barrier principle in a large area metal-to-silicon power diode. State of the art geometry features epitaxial construction
MMQA Quad Common Anode Series. SC-74 Quad Monolithic Common Anode. Transient Voltage Suppressors for ESD Protection
MMQA Quad Common Anode Series Preferred Devices SC-74 Quad Monolithic Common Anode Transient Voltage Suppressors for ESD Protection This quad monolithic silicon voltage suppressor is designed for applications
MMUN2211LT1 Series. NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network
MMUNLT Series Preferred Devices Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single
NSR0340V2T1/D. Schottky Barrier Diode 40 VOLT SCHOTTKY BARRIER DIODE
Schottky Barrier Diode Schottky barrier diodes are optimized for very low forward voltage drop and low leakage current and are used in a wide range of dc dc converter, clamping and protection applications
MUN5332DW1, NSBC143EPDXV6, NSBC143EPDP6. Complementary Bias Resistor Transistors R1 = 4.7 k, R2 = 4.7 k
MUN5DW, NSBCEPDXV6, NSBCEPDP6 Complementary Bias Resistor Transistors R =.7 k, R =.7 k NPN and PNP Transistors with Monolithic Bias Resistor Network () PIN CONNECTIONS () () This series of digital transistors
EMF5XV6T5G. Power Management, Dual Transistors. NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
Preferred Devices Power Management, Dual Transistors NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network Features Simplifies Circuit Design Reduces Board Space Reduces Component
BD809 (NPN), BD810 (PNP) Plastic High Power Silicon Transistor 10 AMPERE POWER TRANSISTORS 80 VOLTS 90 WATTS
BD89 (NPN), BD8 (PNP) Plastic High Power Silicon Transistor These devices are designed for use in high power audio amplifiers utilizing complementary or quasi complementary circuits. Features DC Current
MBRS360T3, MBRS360BT3G. Surface Mount Schottky Power Rectifier SCHOTTKY BARRIER RECTIFIERS 3.0 AMPERES, 60 VOLTS
Surface Mount Schottky Power Rectifier This device employs the Schottky Barrier principle in a large area metal to silicon power diode. State of the art geometry features epitaxial construction with oxide
MBRM110LT3G NRVBM110LT1G NRVBM110LT3G. Surface Mount Schottky Power Rectifier. POWERMITE Power Surface Mount Package
MBRM11LT1G, NRVBM11LT1G, NRVBM11LT3G Surface Mount Schottky Power Rectifier Power Surface Mount Package The Schottky employs the Schottky Barrier principle with a barrier metal and epitaxial construction
NSS40301MDR2G. 40 VOLTS 6.0 AMPS NPN LOW V CE(sat) TRANSISTOR EQUIVALENT R DS(on) 44 m
NSS3MDR2G Dual Matched V, 6. A, Low V CE(sat) NPN Transistor These transistors are part of the ON Semiconductor e 2 PowerEdge family of Low V CE(sat) transistors. They are assembled to create a pair of
NTR4101P, NTRV4101P. Trench Power MOSFET 20 V, Single P Channel, SOT 23
NTRP, NTRVP Trench Power MOSFET V, Single P Channel, SOT Features Leading V Trench for Low R DS(on). V Rated for Low Voltage Gate Drive SOT Surface Mount for Small Footprint NTRV Prefix for Automotive
MMBZ5V6ALT1 Series. 24 and 40 Watt Peak Power Zener Transient Voltage Suppressors. SOT 23 Dual Common Anode Zeners for ESD Protection
4 and 4 Watt Peak Power Zener Transient Voltage Suppressors Dual Common Anode Zeners for ESD Protection These dual monolithic silicon Zener diodes are designed for applications requiring transient overvoltage
NTHD4502NT1G. Power MOSFET. 30 V, 3.9 A, Dual N Channel ChipFET
NTHDN Power MOSFET V,.9 A, Dual N Channel ChipFET Features Planar Technology Device Offers Low R DS(on) and Fast Switching Speed Leadless ChipFET Package has % Smaller Footprint than TSOP. Ideal Device