SYSTEMATIC DESIGN OF SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTERS

Transcription

1 SYSTEMATIC DESIGN OF SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTERS

2 THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE Related Titles: ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor: Mohammed Ismail. Ohio State University OPERATIONAL AMPLIFIER SPEED AND ACCURACY IMPROVEMENT Ivanov and Filanovsky ISBN: STATIC AND DYNAMIC PERFORMANCE LIMITATIONS FOR HIGH SPEED D/A CONVERTERS van den Bosch, Steyaert and Sansen ISBN: DESIGN AND ANALYSIS OF HIGH EFFICIENCY LINE DRIVERS FOR Xdsl Piessens and Steyaert ISBN: LOW POWER ANALOG CMOS FOR CARDIAC PACEMAKERS Silveira and Flandre ISBN: X MIXED-SIGNAL LAYOUT GENERATION CONCEPTS Lin, van Roerrnund, Leenaerts ISBN: HIGH-FREQUENCY OSCILLATOR DESIGN FOR INTEGRATED TRANSCEIVERS Van der Tang, Kasperkovitz and van Roermund ISBN: CMOS INTEGRATION OF ANALOG CIRCUITS FOR HIGH DATA RATE TRANSMITTERS DeRanter and Steyaert ISBN: SYSTEMATIC DESIGN OF ANALOG IP BLOCKS Vandenbussche and Gielen ISBN: SYSTEMATIC DESIGN OF ANALOG IP BLOCKS Cheung & Luong ISBN: LOW-VOLTAGE CMOS LOG COMPANDING ANALOG DESIGN Serra-Graells, Rueda & Huertas ISBN: X CIRCUIT DESIGN FOR WIRELESS COMMUNICATIONS Pun, Franca & Leme ISBN: DESIGN OF LOW-PHASE CMOS FRACTIONAL-N SYNTHESIZERS DeMuer & Steyaert ISBN: MODULAR LOW-POWER, HIGH SPEED CMOS ANALOG-TO-DIGITAL CONVERTER FOR EMBEDDED SYSTEMS Lin, Kemna & Hosticka ISBN: DESIGN CRITERIA FOR LOW DISTORTION IN FEEDBACK OPAMP CIRCUITE Hemes & Saether ISBN: CIRCUIT TECHNIQUES FOR LOW-VOLTAGE AND HIGH-SPEED AID CONVERTERS Walteri ISBN: I DESIGN OF HIGH-PERFORMANCE CMOS VOLTAGE CONTROLLED OSCILLATORS Dai and Harjani ISBN: CMOS CIRCUIT DESIGN FOR RF SENSORS Gudnason and Bruun ISBN:

3 SYSTEMATIC DESIGN OF SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTERS by Ovidiu Bajdechi Broadcom Netherlands B. v., Bunnik, The Netherlands and Johan H. Huijsing Delft University of Technology, Delft, The Netherlands 'I SPRINGER SCIENCE+BUSINESS MEDIA, LLC

4 A C.I.P. Catalogue record for this book is available from the Library of Congress. Printed on acid-free paper ISBN ISBN (ebook) DOI / All Rights Reserved 2004 Springer Science+Business Media New York Originally published by Kluwer Academic Publishers in 2004 Softcover reprint ofthe hardcover Ist edition No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work.

5 TABLE OF CONTENTS Table of Contents List of Abbreviations and Symbols 1 Introduction 1.1 Analog-to-Digital Conversion. From Nyquist to Sigma-Delta Nyquist-rate ADCs Oversampled ADCs Noise Shaping ADCs. 1.2 Motivation Book Organization ix Architecture-Level Analysis of Sigma-Delta ADCs 2.1 Principle and Operation Linear Model. Transfer Functions Non-Linear Loop Transfer Performance Metrics Sigma-Delta ADCs with Discrete-Time Loop Filters Design of Loop Transfer Functions Single Loop Topologies Cascaded Topologies Sigma-Delta ADCs with Continuous-Time Loop Filters Equivalence Between Discrete-Time and Continuous-Time Loop Filters Effects of DAC Waveform Shape Single Loop Topologies Cascaded Topologies Discrete-Time Circuit Design Switched-Capacitor Integrators Topologies for Summing Integrators Effects of Circuit Non-idealities Clocking Signals Operational Amplifier Topologies SYSTEMATIC DESIGN OF ~~ ADCs V

6 3.1.5 Power Consumption Analysis 3.2 Switched-Capacitor Amplifiers 3.3 Quantizer The Dynamic Comparator Multibit Quantizers Multibit, SC Digital-to-Analog Converters 4 Continuous-Time Circuit Design 4.1 Active RC Integrator Topology Effects of Circuit Non-Idealities Operational Amplifier Topologies Power Consumption Analysis 4.2 Quantizer Digital-to-Analog Converters Return-to-Zero DACs Calibrated Multibit DACs. 5 Computer Aided Design of Sigma-Delta ADCs 5.1 Filter-Level Design Design of Stable Discrete-Time NTF Dynamic Range Estimation Mapping DT TF to CT TF 5.2 Architecture-Level Design Design Space Exploration Optimization of Loop Gains Performance Test Estimation of Power Consumption Yield Analysis and Optimization 5.3 Design Examples Audio Sigma-Delta ADC Delta-Sigma ADC for xdsl Applications Sigma-Delta ADC for Audio Applications The Electret Microphone System Design Project Specifications Switched-Capacitor vs. Continuous-Time Loop Filter Sigma-Delta ADC Design Topology NTF and STF Design High Input Impedance Continuous-Time Integrator Switched-Capacitor Integrators vi SYSTEMATIC DESIGN OF ~~ ADCs

7 6.3.5 Adder and Comparator Timing of Feedback Signals 6.4 Linearity Analysis Experimental Results Broadband, High Dynamic Range Sigma-Delta ADC Project Specifications CAD-Assisted Design Optimization Directing the Software Toward an Optimal Solution Loop Coefficients Power Dissipation for DT and CT Circuits Design of the 16-bit CT Integrator Integrator Topology Operational Amplifier Design of the 14-bit SC Integrator Integrator Topology Linearized Sampling Switch Capacitor Sizing Operational Amplifier Higher Order Integrators Integrator Topology Capacitors Sizing and Opamps Performance Feed-Forwards Adder and 31-Levels Quantizer CT Adder Quantizer Topology Calibration of Current-Mode CT DAC DAC Matching Requirements CT Current-Mode DAC Active Calibration Calibration DAC Transistor-Level Simulation Results. 180 Summary 185 References 190 Index 194 SYSTEMATIC DESIGN OF ~~ ADCs VII

8 List of Abbreviations and Symbols Abbreviations AjD ADC ADSL BER BW CAD CMC CMOS CMRR Codec CT DjA DAC DR DSL DSP DT ENOB FDD FDM FFT FOM JFET MOS NMOS NRZ NTF Opamp analog -to-digital analog-to-digital converter asymmetric digital subscriber line bit error rate bandwidth computer-aided design common-mode control complementary metal oxide semiconductor common-mode rejection ratio coder-decoder continuous-time digital-to-analog digital-to-analog converter dynamic range digital subscriber line digital signal processor discrete time effective number of bits frequency-division duplexing frequency-division multiplexing fast Fourier transform figure of merit junction field-effect transistor metal oxide semiconductor N-channel MOS transistor non-return to zero noise transfer function operational amplifier SYSTEMATIC DESIGN OF L:.6. ADCs IX

9 PAM PMOS POTS RC RTZ Rx OSR ~~ SIR SNDR SC STF TRD Tx UGB VII pulse amplitude modulation P-channel MOS transistor plain old telephone service resistor-capacitor return to zero receive oversampling ratio sigma-delta sample and hold signal-to-(noise plus distortion) ratio switched-capacitor signal transfer function total harmonic distortion transmit unity-gain bandwidth volt age-to-current x SYSTEMATIC DESIGN OF ~~ ADCs

10 Symbols ADC BITS C ~ Di E(z) I Ib Is Gm I gm HD3 H(s) H(z) I J k L LOOPS JL N s (J" Sn T Ts V Vds Vgs Vref VT W z opamp voltage gain at DC number of quantizer bits capacitance (large) variation input-referred integrator distortion quantization noise frequency signal bandwidth sampling frequency generic transconductance short-channel noise enhancement factor transistor (pair) transconductance third-order harmonic distortion continuous-time transfer function discrete-time transfer function current A Boltzmann's constant channel length for MOS transistors number of cascaded loops carrier mobility number of quantizer bits frequency order of I;~ loop input-referred integrator noise power noise power in-band quantization noise power resistance Laplace operator standard deviation spectral power density (of noise) temperature sampling period voltage drain-source voltage of a MOS transistor gate-source voltage of a MOS transistor reference voltage threshold voltage of a MOS transistor channel width for a MOS transistor z-domain frequency SYSTEMATIC DESIGN OF I;~ ADCs XI