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1 Politecnico di Torino ICT School Telecommunication Electronics C5 - Special A/D converters» Logarithmic conversion» Approximation, A and µ laws» Differential converters» Oversampling, noise shaping Logarithmic conversion Piecewise approximation A and µ laws Differential converters Sigma-delta converters Oversampling Noise shaping Lesson C5: special A/D converters Waveform encoding and model encoding Voice LPC References sect /10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 2
2 Radio systems: where are ADC/DAC? A/D and D/A conversion: where? Services V battery, TX power,.. Baseband chain A/D e D/A for voice signals Receiver chain: A/D conversion of I/Q components in the IF channel Transmitter chain D/A conversion of synthesized I/Q components Software Defined Radio architectures Most functions by digital/programmable circuits A/D or D/A conversion very close to antenna A/D and D/A converters for voice signal. 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 4
3 ADC and DAC system goals Voice signal conversion Improve cost/performance figure Cost factors» Complexity» Bit rate Performance parameters» Bandwidth» Precision Signals with known features Amplitude distribution Statistic parameters Model encoding Voice signal exponential amplitude distribution» more dense at lower levels wide dynamic range» SNRq low and variable with signal level Logarithmic analog to digital conversion constant SNRq over a wide signal dynamic range fewer bits for the same SNRq 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 6
4 Linear and nonlinear A/D conversion Linear quantization Linear A/D conversion all A D intervals have same amplitude» quantization error does not depend on signal level poor results with signals at low levels for most time (voice)» high quantization noise power, low signal power Nonlinear A/D conversion different A D intervals» quantization error changes with signal level» the nonlinear relation can be chosen to optimize SNRq for a specific signal type (PDF, amplitude distribution) for voice signals (exponential distribution)» logarithmic law A D intervals with constant width Constant quantization noise power SNRq varies with signal level (worse for low-level signals) D A 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 8
5 Nonlinear quantization Standard conversion A D intervals with variable width Quantization noise power related with signal level SNRq independent from signal level D The A/D conversion adds ε q noise to analog signal D = A + ε q A D is constant, therefore» constant absolute error on D» % error (SNRq) is related with signal level A A D A ε q 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 10
6 Logarithmic conversion Nominal SNRq Conversion of signal logarithm: D = log A + ε q sum of logs log of product» D = log A + ε q = log K A (ε q = log K)» multiplying error (1 - K)» constant % error, independent from signal level A Log quantization causes a constant relative error constant SNRq log SNRq A log D log A ε q lin Full scale Level 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 12
7 A and µ approximation A and µ approximation - graphs Audio signals are bipolar the log curve must be replicated in the III quadrant» symmetric curve from I quadrant Log 0 is undefined near 0 the log curve can be only approximated µ law» translate the positive and negative branches to get a continuous curve in (0,0) A law» replace the curves near 0 with a straight line (crossing 0,0) Translation (µ law) Replacement (A law) 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 14
8 SNRq near 0 SNRq with A and µ law A law: signals less than 1/A --> linear quantization SNRq depends from signal level (6 db/octave) µ law: almost linear quantization at low levels similar effect: SNRq drop SNRq µ law A law linear Level 1/A Full scale (S) Linear behavior Log behavior Overload 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 16
9 Log A/D approximation Piecewise approximation Obtaining calibrated continuous nonlinear behavior requires complex and expensive analog circuits Piecewise approximation The log curve is divided in linear segments due to log scale, the same ratio of input signal corresponds to the same shift in horizontal axis slope and starting point of each segment are sequenced as 2 powers (2, 4, 8, 16,.) linear coding inside each segment Compressed signal Continuous log law slope slope slope slope Input signal 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 18
10 Log PCM format Each sample is coded on 8 bit MSB (bit 7): sign bit 6, 5, 4: segment bit 3, 2, 1, 0: level within the segment Within each segment Piecewise approximation: SNRq quantization error ε q remains constant signal level changes signal power changes SNRq changes with unity slope From each segment to the next one (from S to 0) quantization error ε q is divided by 2 signal level is divided by 2 SNRq constant Near 0 same behavior as linear quantization constant ε q signal level changes 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 20
11 SNRq with A and µ approximation Log conversion techniques µ 255 law A (87.6) law Analog log circuit, followed by A/D poor precision and stability in the analog circuit high cost High resolution A/D conversion, followed by digital log encoding makes available both the linear and log conversion Intrinsic log A/D converter nonlinear law A/D or D/A conversion suitable for any type of nonlinear transfer function (DAC for DDS) 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 22
12 A/D logarithmic converter Logarithmic ADC A logarithmic A/D converter can use the D/A feedback technique: comparator-approximation logic - D/A loop the D/A must have exponential transfer function Sign bit inverts the reference voltage Vr Segment bits voltage Vs scaled with 2 N steps (1, 2, 4, 8, ) Level bits fed directly to a linear DAC using Vs as reference How to build an exponential D/A (bipolar): sign bit: inverts the D/A reference voltage segment bits: provide a voltage with 2 N steps» segment bits are decoded into linear code (3-8 decoder)» the 8 bit feed a linear 8-bit D/A» each segment generates outputs with a ratio 2 towards adjacent ones Vs level bits: fed directly to a linear D/A 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 24
13 Nonlinear DAC Nonlinear DAC block diagram Structure for nonlinear DAC and ADC with piecewise approximation Segment bit decoder Standard DAC + lookup table Decoded DAC uniform elements» To build starting point and slope of each segment Linear coding within each segment (level bits) Output adder» Shifts the segment starting point Technique used for DACs in DDS (sine generators) Sine conversion law (piecewise approximation) +Vr -Vr Piecewise nonlinear characteristic Da: segment bits Db: level bits Da DECODER/LOOKUP SEGMENT SLOPE DAC SEGMENT START DAC Db LEVEL DAC + VO 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 26
14 Logarithmic conversion Piecewise approximation A and µ laws Logarithmic converters Differential converters Sigma-delta converters Oversampling Noise shaping Lesson C5: special A/D converters Waveform encoding and model encoding Voice LPC Comparison quality/bit rate Tracking converter The tracking ADC is a differential converter The serial bit flow from the comparator output represents the sign of A - A (current value previous value) Up/down counter 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 28
15 Differential converters Quantization of difference between previous and current values Dynamic reduction 1-bit A/D conversion (comparator) Serial flow of uniform bits Delta converter Integrating differential converter L is a sequence of positive or negative pulses, with rate Fck = 1/Tck The recovered signal is S(L) On each pulse R changes of one step γ (posive or negative). CODER DECODER 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 30
16 Signal in the Delta converter Delta ADC dynamic L is a sequence of positive or negative pulses, with rate Fck = 1/Tck The recovered signal is S(L) On each pulse R changes of one step γ (posive or negative). Minimum signal (IDLE state) Peak level γ/2; idle noise Maximum tracked signal Slew rate γ/tck overload 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 32
17 A differential converter Does not require high precision devices but. Provides limited dynamic range» From idle noise and overload Characteristic of Delta ( ) ADC For a specific SNRq, generates a bit flow with high rate Operates in oversampling mode Oversampling Sampling at a rate far higher than the Nyquist limit Example: 3 khz audio signal (Nyquist = 6 ks/s)» 8 ks/s Nyquist sampling» 1 MS/s Oversampling Oversampling sends alias far away (1 MHz, 2MHz, ) Relaxed specifications on the anti-alias input filter Reduced noise power density Reduced inband noise power Requires good reconstruction filter Higher bit rate (more samples/s) Can be reduced with digital filtering Complexity: analog digital domain 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 34
18 Oversampling vs. Nyquist Oversampling vs. Nyquist filtering Nyquist X(ω) Main spectrum (baseband) First alias Second alias f Nyquist X(ω) Steep filter f 0 F S1 2F S1 0 F S1 2F S1 Quantization noise (0-Fs1 band) Oversampling X(ω) First alias 0 Quantization noise (0-Fs2 band) F S2 f Oversampling X(ω) 0 Different filters: same quantization noise power (after reconstruction filter) Smooth filter F S2 f 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 36
19 Oversampling vs. Nyquist noise Which is the actual limit? Nyquist X(ω) Steep filter f Actual Nyquist rule: A signal must be sampled at least twice the signal BANDWIDTH Oversampling X(ω) 0 F S1 2F S1 0 Steep filter Same filter: reduced quantization noise power (after reconstruction filter) Removed quantization noise F S2 f Example: a 1 GHz carrier, 100 khz BW signal can be safely sampled at Fs > 200 ks/s Spectrum is folded around K Fs/2 Less stringent specs for RF A/D converters Sampling rate related with bandwidth, not carrier Tight specs for the S/H sampling jitter related with carrier, not bandwidth 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 38
20 Filter for Nyquist sampling Reducing aliasing noise NYQUIST X(ω) Steep antialias filter, to limit aliasing noise 0 F S 2F FS /2 S Complex analog LP filter Spectrum segment folded to baseband (aliasing noise) A/D f Lower outband signal level More steep input filter Increase sampling rate Fs (oversampling) Moves alias spectra far from baseband Need for faster A/D converter Higher bit rate can be reduced by digital filtering Move complexity from the analog to the digital domain 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 40
21 Oversampling: more simple filter Filters with oversampling NYQUIST Complex analog LP filter X(ω) Complex, steep digital filter: - reduce noise - reduce bit rate (decimation) Alias is far away; antialias analog filter can be simple OVERSAMPLING A/D Simple analog filter ω A/D 0 2πF S2 Move complexity from the analog to the digital domain Complex digital filter Can reduce the bit rate (decimation) 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 42
22 converter input dynamic range Range of input signals correctly handled γ corresponds to the quantization step A D in a standard ADC Input dynamic range: Fck/πFs» Does not depend on γ To increase input dynamic range γ constant» possible only to change Fck γ variable (adaptive converters)» Minimum in idle condition (output sequence )» Maximum near overload (output sequences 000 or ) Remove dependency from signal frequency (ω)» Σ converters Two integrators in the loop Stability problems Integrator + predictor (pole/zero) Variable step γ, depending from Signal level (power estimation)» Syllabic adaptation Error sign sequences» Real-time adaptation Adaptive converters Adaptation circuits must use the line signal idle: alternated sequence at output overload: continuous streams 0000 or /10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 44
23 Adaptive converters Differential converter architectures The differential converter can operate on many bits The comparator is replaced by an ADC A DAC drives the integrator Power estimation DAC uses only line signal Power estimation Integrator 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 46
24 Digital differential converters Integration can occur in the digital domain Integrator becomes accumulator Σ converters The input dynamic range is limited by signal slew rate For wider dynamic: limit slew rate Integrator on input signal» Decrease amplitude as frequency goes up (integrator) constant slew rate 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 48
25 Σ converters The input dynamic range is limited by signal slew rate For wider dynamic: limit slew rate Integrator on input signal» Decrease amplitude as frequency goes up (integrator) To correctly rebuild the signal: derive the output Standard differential chain Sigma-Delta ADC and DAC Move integrators on adder input single integrator at the output Remove the integrator-derivator in DAC ADC DAC Keep antialias input and reconstruction output filters (not shown) 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 50
26 Quantization noise in Σ In the Σ ADC quantization noise εq is generated after integraton Noise is shifted towards high frequencies Noise shaping Noise power spectrum density is higher at high frequencies: Noise shaping Noise power spectrum density in baseband is reduced Y/N transfer function is highpass Further reduction to output noise power Or simpler reconstruction filter 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 52
27 Oversampling vs. Nyquist noise Complete Σ conversion chain Oversampling X(ω) 0 Noise shaping X(ω) 0 Reconstruction filter Shaped quantization noise Noise power is moved to HF, lower power density in baseband Flat quantization noise F S2 F S2 f f Anti aliasing filter» Oversampling allows simple filters ADC Σ order 1, 2, N» Produces a high speed, non-weighted bit stream Decimator» Changes the high speed bit rate in low rate words ---- Channell Interpolator» Recreates the high speed serial flow Σ DAC» Rebuilds analog signal Reconstruction filter 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 54
28 Bit rate reduction Numeric example A A filtered Σ D serial, High rate DECIMATOR Audio signal Fmax 3 khz Sampled 8 ks/s, 8 bit quantization» Which SNRq?» Which Fck to obtain the same SNRq with a differential converter? D parallel, Low rate INTERPOLATOR Σ A 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 56
29 Logarithmic conversion Piecewise approximation A and µ laws Logarithmic converters Differential converters Sigma-delta converters Oversampling Noise shaping Lesson C5: special A/D converters Waveform encoding and model encoding Voice LPC Comparison quality/bit rate Model encoding vs waveform encoding Waveform encoding: Sequence of number which represent the sequence of values generated by sampling the time varying signal. Example: sine tone» Values of the sine signal at sampling times. Model encoding: Define a source model Model parameters are derived from the signal The signal is rebuilt from parameters using the model Example: sine tone» Model: sine generator» Parameters: amplitude, frequency, and phase» Rebuilt using a properly set signal generator. 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 58
30 Waveform encoding Model and parameters Sequence of samples example: sine tone» Values of A sinωt for t = K Ts 10 V 1 Ts = 0,2 ms t (ms) Values: 8, -1, -10, -7, +2, +10, +5, -6, -10, -4,. 2 Peak value V Model: v(t) = V sen (ω t + θ) Parameters: Phase θ 1 Period T V = 10 V ω = 2πf = 2π/T = 5.2 krad/s θ = 0,3π = 0,9 rad 2 t [ms] 6 decimal digits 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 60
31 Which factors influence SNR? Waveform encoding Sampling rate Resolution of samples (bit number) Model encoding Model accuracy Correctness and resolution of parameters SNR for model encoding Example of model encoding LPC (Linear Predictive Coding) for voice signals Based on a vocal segment model (larinx) Signal is divided in frames (10-30 ms) For each frame:» voiced/unvoiced decision» evaluation periodicity step (pitch)» Evaluation of adapted filter coefficients Voiced: complex waveforms repeated» Pulse generator at pitch rate» Filter to generate the waveform Unvoiced: filtered noise» Noise generator + filter 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 62
32 Block diagram of LPC decoder Model encoding: performance PITCH PULSE GENERATOR VOICED FILTER PARAMETERS FILTER Standard criteria: speaker recognition (A) speech understanding (B) Waveform encoding speed (kbit/s) log PCM 64/32 Differential 32/16 Adaptive Differential (ADPCM) 4 (only B) NOISE GENERATOR UNVOICED Model encoding LPT (GSM phones) 9,6 Frequency slots vocoder 4,8 LPC 2,4 14/10/ TLCE - C DDC 14/10/ TLCE - C DDC 2009 DDC DDC 64
33 Lesson C5 final test Which are the benefits of logarithmic conversion? What happens for signals close to 0 in a log ADC? Which are the differences between A and µ log approximations? Which parameter controls the dynamic range of a differential ADC? Explain structure of delta-sigma ADC. Which are benefits and drawbacks of oversampling? Explain noise shaping. Which parameters influence S/N for model encoding? Describe features of waveform and model encoding techniques. 14/10/ TLCE - C DDC 2009 DDC 65
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