ANALOG TEST SIGNAL GENERATION USING PERIODIC ~Ll-ENCODED DATA STREAMS

Size: px
Start display at page:

Download "ANALOG TEST SIGNAL GENERATION USING PERIODIC ~Ll-ENCODED DATA STREAMS"

Transcription

1 ANALOG TEST SIGNAL GENERATION USING PERIODIC ~Ll-ENCODED DATA STREAMS

2 THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor: Mohammed Ismail. Ohio State University Related Titles: DESIGN, SIMULATION AND APPLICATIONS OF INDUCTORS AND TRANSFORMERS FOR Si RFIcs A.M. Niknejad, R.G. Meyer ISBN: DESIGN AND IMPLEMENTATION B.E. Jonsson ISBN: RESEARCH PERSPECTIVES ON DYNAMIC TRANSLINEAR AND LOG-DOMAIN CIRCUITS W.A. Serdijn, J. Mulder ISBN: CMOS DATA CONVERTERS FOIl COMMUNICATIONS M. Gustavsson, J. Wikner, N. Tan ISBN: X DESIGN AND ANALYSIS OF INTEGRATOR-BASED LOG -DOMAIN FILTER CIRCUITS G.W. Roberts, V. W. Leung ISBN: X VISION CHIP A. Moini ISBN: COMPACT LOW VOLTAGE AND HIGH SPEED CMOS, BiCMOS AND BIPOLAR OPERATIONAL AMPLIFIERS K-J. de Langen, J. Huijsing ISBN: X CONTINUOUS TIME DELTA SIGMA MODULATORS FOR HIGH SPEED AID CONVERTERS: Theory, Practice and Fundamental Performance Limits J.A. Cherry, W. M. Snelgrove ISBN: LEARNING ON SILICON: Adaptive VLSI Neural Systems G. Cauwenberghs, M.A. Bayoumi ISBN: ANALOG LAYOUT GENERATION FOR PERFORMANCE AND MANUFACTURABILITY K. Larnpaert, G. Gielen, W. Sansen ISBN: CMOS CURRENT AMPLIFIERS G. Palmisano, G. Palumbo, S. Pennisi ISBN: HIGHLY LINEAR INTEGRATED WIDEBAND AMPLIFIERS: Design and Analysis Techniques for Frequencies from Audio to RF H. Sjoland ISBN: DESIGN OF LOW VOLTAGE LOW POWER CMOS DELTA SIGMA AID CONVERTERS V. Peluso, M. Steyaert. W. Sansen ISBN:

3 ANALOG TEST SIGNAL GENERATION USING PERIODIC ~Ll-ENCODED DATA STREAMS by Benoit Dufort Philips Research and Gordon w. Roberts McGill University ~. " SPRINGER SCIENCE+BUSINESS MEDIA, LLC

4 Library of Congress Cataloging-in-Publication Data A C.I.P. Catalogue record for this book is available from the Library of Congress. ISBN DOI / ISBN (ebook) 2000 Springer Science+Business Media New York Originally published by Kluwer Academic Publishers, New York in 2000 Softcover reprint ofthe hardcover lst edition 2000 AH rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, mechanical, photo-copying, recording, or otherwise, without the prior written permis sion of the publisher, Springer Science+Business Media, LLC Printed on acid-free pa per.

5 Table of Contents Preface... xi Chapter 1: Introduction Test and Technology Evolution Design-for-Testability (DFT) Motivation for this Book Outline of Book... 5 Chapter 2: Mixed-Signal Testing Digital Testing Manufacturing Issues AnaloglMixed-Signal Testing The Changing Requirements of Mixed-Signal Test Evolution with Design and Production Life Cycle Evolution with Circuit Performance Built-In Self-Test Schemes CODEC and MODEM Circuits Transceiver Circuits Phase-Lock Loops Stimulus Generation Direct Digital Frequency Synthesis... 21

6 vi Table of Contents l:~ Oscillator Memory-Based l:~ Generators Parameter Extraction Code Density Testing Correlation Tests On-Chip Digital Sampling Oscilloscope Summary Chapter 3: Periodic l:~ Bit Stream Theory Periodic Signals and Frequency Domain Description Coherent Signals l:~ Modulation Quantization and Performance Metrics Oversampling Converters Noise Shaping Generating Periodic Bit Streams Input Signal Signal and Noise Transfer Function Bit Stream Length Selection Sequence Generation Practical Considerations Frequency Resolution Amplitude Range and Resolution Phase Resolution Noise Spreading Windowing Optimization of Periodic Bit Streams Varying the Phase ofthe Tone Varying the Tone Amplitude Performance Comparison of Optimized Bit Streams with Theoretical Prediction SFDR Signal-to-Noise Ratio Power Spectral Density Design Aids Maximum SFDR Maximum Amplitude Multi-Bit Streams Input Signal... 60

7 Table of Contents vii Quantizer Optimization Alternative Optimizations Optimization with Non-spectral Criteria Periodic :E~ Modulator: Limit Cycles Genetic Algorithm Optimization Summary Chapter 4: Analog Signal Generation Sinewave Generation Single-Tone Multi-Tone DC Generation Pulse Width Modulation (PWM) Pulse Density Modulation (PDM) or Noise-Shaped DC Signals DC Amplitude Resolution Arbitrary Band-Limited Pulse Generation Triangular Pulses Communication Pulses Distorted Pulses Digital Modulation Amplitude Shift Keying (ASK) Frequency Shift Keying (FSK) Phase Shift Keying (PSK) Multi-Bit Generation Dynamic Element Matching Periodic Dynamic Element Matching Generation Implementation Issues Silicon Area One-Bit DAC Analog Filtering No Filtering Filter in the Circuit Under Test Filter On-Chip Filter Off-chip Clock Jitter.: Summary... 95

8 viii Table of Contents Chapter 5: Integrated Circuit Prototypes Dual-Tone Multi-Frequency Generator Frequency Selection FPGA Implementation RAM-Based Generator Static RAM Address Generator Silicon Implementation RAM Generator Measured Results Shift-Register Based Generator Custom Dual-Phase Flip-flop Variable Aspect Ratio Silicon Implementation and Results Comparison with RAM-Based Generator High-Speed CMOS Generator Generator Design High-speed Clocking: CMOS Phase Locked Loop Bitstream Filtering Silicon Implementation Results Summary Chapter 6: Application to Arbitrary Waveform Generators Periodic L~ Multi-Bit Streams Increasing the Performance of A WGs In-Band Tone Test Out-Of-Band Tone Test Trade-off Between Resolution and Bandwidth Non-Ideal Behavior Clock Jitter DAC Static Non-linearities Dynamic Non-linearities Calibration Clock Jitter Static Calibration Pseudo-Dynamic Calibration Dynamic Calibration Future Arbitrary Waveform Generator

9 Table of Contents ix 6.6 Summary Chapter 7: Conclusions Summary The Periodic Bitstream Approach On-Chip Generator for Analog and Mixed-Signal BIST Application to Arbitrary Waveform Generators Future Work References Index

10 Preface The trend in the microelectronic field has been for denser and faster integrated circuits. Today we can integrate over 20 million transistors on a single chip, and this number is expected to double in the next year and a half. Until recently, most electronic systems consisted of one or many printed circuit boards, containing multiple integrated circuits (lcs) each. Recent advances in IC design methods and manufacturing technologies enable complete systems to be integrated on a single Ie. These so-called system chips offer advantages such as higher performance, lower power consumption, and smaller volume and weight, when compared to their traditional multi-chip equivalents. System chips typically contain mixed technologies, such as logic, memories of various types, and numerous analog building blocks. Many system chips are designed by embedding large reusable building blocks, commonly called cores. Design reuse offers to speed up the design and enables design expertise to be imported from third party vendors. Besides the obvious need for standards to guide their integration, the need for individual verification of each core is paramount for this approach to succeed, as the IC design community is now divided into core users and core providers. In traditional System-on-Board (SOB) design, the components that go from provider to the user are packaged ICs, which are designed, manufactured, and tested as stand alone components. The user of these components is then only concerned with manufacturing defects that appear in the component interconnections. In System-on Chip (SOC) design, the components are untested cores, where detailed knowledge of the design is not readily available. Hence, the core user becomes responsible for manufacturing and testing the entire system chip with little to go on. Rather, it appears as though the industry will move towards a position where the core provider will be expected to supply the test solution for its own core and pass on all test details

11 xii Analog Test Signal Generation Using Periodic U-Encoded Data Streams to the core user. In this way, the core user can verify that the core performs as expected. From a digital design perspective, the appropriate design and test methodologies, for the most part, will remain the same, regardless of whose responsibility it is to create the test. Scan chain techniques will continue to be used to move test information about a complex IC. In contrast, no simple method exists in which to move analog information around on an IC without serious degradation of its signal-to-noise ratio. Embedded analog cores with no external access will essentially be untestable. With the increase demand for digital 1/0 pins on new designs, adding additional test 110 pins for each analog core will probably not materialize. One can envision placing an analog-to-digital converter inside the analog core to convert the sensitive analog information into digital form whereby it can then be moved off-chip without loss of signal integrity through the digital test bus. However, adding untested analog circuitry to help test the analog core will only increase the measurement uncertainty to intolerable levels. Besides, trends in VLSI design suggest that the analog components do not benefit from technological scaling advancements in the same way that digital components' experience. Hence, adding analog test circuits will consume large silicon area and seriously impact manufacturing yields. With that said, it is believed that one can achieve similar results by utilizing existing circuitry already present in the analog core, or by adding simple digital components. This monograph describes what the authors believe to be a highly-effective analog signal generation technique that fits well with the above described design and test philosophy. In particular, this text will describe an analog signal generation technique involving periodic sigma-delta (~~) modulated bit streams. The circuits are well suited to monolithic implementation as they are area efficient and capable of producing a wide range of signal types such as DC, sinewave, multi-tone and data communication pulses. The designs consist of mostly all digital circuits usually in the form of memory, as they are insensitive to process variations and are easy to test with digital test methods. In some test situations, an analog reconstruction filter is necessary to eliminate signal images in the spectrum created by the digital bit stream. Fortunately, the cut-off frequencies of these filters do not have to be very precise on account of the oversampling nature of the ~~ modulated bit streams. Moreover, due to the programmable nature of the signal generator, the exact filter characteristics can be measured and compensated from any bit stream. The signal generation technique can also be extended to multi-bit data sequences where they can be used to increase the performance of existing arbitrary waveform generators commonly found in expensive mixed-signal testers. An outline of this text is as follows: Chapter 1 provides an introduction to this monograph by looking at how test and its requirements are evolving with the rapid change in CMOS technology. The need for Design-For-Test techniques for mixed-signal circuits and systems is also described in this chapter.

12 xiii Chapter 2 provides a discussion of mixed-signal integrated circuit testing. This chapter begins by describing the economic challenges that faces the analog and mixed-signal electronics industry from the perspective of test. It is also suggested in this chapter that unless process variation can be brought under very tight control a functional based test method in contrast to a structural based approach is essential to maintain good quality control. The chapter concludes by reviewing some B1ST circuits for mixed-signal devices. The theory of periodic 1:~-encoded signals is introduced in Chapter 3. Background 1:~ modulation theory is provided and is used to created one-bit data streams with desired signal characteristics. Optimization techniques to find the best bit streams are also described. Chapter 4 introduces several circuits and methods to generate periodic bitstream for single and multi-tone signal generation, as well as arbitrary band-limited pulses and digitally modulated signals. Also, silicon implementation issues will be described. The results of several experimental prototypes that were designed, fabricated and tested will be described in Chapter 5. Chapter 6 presents a technique to increase the performance of past and present day Arbitrary Waveform Generators (AWGs) through the use of periodic multi-bit 1:~-encoded data streams. Simulation and experimental results show that the technique is effective in reducing the noise floor of the desired analog signal in any narrow band without any hardware modification. Various calibration methods are described to reduce the effects of the AWG non-idealities, along with supporting experimental results. Three orders of magnitude in improvement have been observed with this technique. Finally, we conclude in Chapter 7 with a short summary and a brief look at possible future directions. The authors wish to gratefully acknowledge the support from the Canadian National Science and Engineering Research Council, MICRONET, a Canadian federal network of centres of excellence dealing with microelectronics devices, circuits and systems for ultra large-scale integration, and the Canadian Microelectronics Corporation. We would also like to extend our sincere appreciation to all the dedicated staff members and graduate students associated with the Microelectronics and Computer Systems (MACS) Laboratory at McGill University. In particular, we would like to thank system administrators Jacek Slaboszewicz, Ray Daoud and Andrew Staples for maintaining the computer infrastructure in our laboratory. We would also like to thank our administrative assistant Connie Greco for her unwavering support. The many and helpful discussions with past graduate students on helping the authors understand the issues behind the problem with mixed-signal test cannot be understated. Their contribution to this work was significant. They are: Michael Toner,

13 xiv Analog Test Signal Generation Using Periodic l:~-encoded Data Streams Albert Lu, Xavier Haurie, Benoit Veillette, Evan Hawrysh and Ara Hajjar. We also like to thank Katie Silverthorne for help with proofreading this textbook. Finally, Benoit Dufort would like to thank his loving wife, Annie Dufour, his father, Raynald, and sister, Isabelle, for their support and comprehension during this work. Gordon Roberts would like to extend a sincere thanks to Eileen O'Reilly and their two children, Brigid Maureen and Sean Gordon, for their continued support and encouragement on work that has taken family time away from them. Benoit Dufort Briarcliff Manor, New York, USA Gordon W. Roberts Montreal, Quebec, Canada

ANALOG CMOS FILTERS FOR VERY HIGH FREQUENCIES

ANALOG CMOS FILTERS FOR VERY HIGH FREQUENCIES ANALOG CMOS FILTERS FOR VERY HIGH FREQUENCIES THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor Mohammed Ismail Ohio State University

More information

DESIGN OF MULTI-BIT DELTA-SIGMA A/D CONVERTERS

DESIGN OF MULTI-BIT DELTA-SIGMA A/D CONVERTERS DESIGN OF MULTI-BIT DELTA-SIGMA A/D CONVERTERS DESIGN OF MULTI-BIT DELTA-SIGMA A/D CONVERTERS by Yves Geerts Alcatel Microelectronics, Belgium Michiel Steyaert KU Leuven, Belgium and Willy Sansen KU Leuven,

More information

INTEGRATED AUDIO AMPLIFIERS IN BCD TECHNOLOGY

INTEGRATED AUDIO AMPLIFIERS IN BCD TECHNOLOGY INTEGRATED AUDIO AMPLIFIERS IN BCD TECHNOLOGY INTEGRATED AUDIO AMPLIFIERS IN BCD TECHNOLOGY by Marco Berkhout MESA Research Institute, University of Twente, and Philips Semiconductors " ~ Springer Science+Business

More information

SYSTEMATIC DESIGN OF SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTERS

SYSTEMATIC DESIGN OF SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTERS SYSTEMATIC DESIGN OF SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTERS THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE Related Titles: ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor:

More information

Variation Tolerant On-Chip Interconnects

Variation Tolerant On-Chip Interconnects Variation Tolerant On-Chip Interconnects ANALOG CIRCUITS AND SIGNAL PROCESSING Series Editors: Mohammed Ismail. The Ohio State University Mohamad Sawan. École Polytechnique de Montréal For further volumes:

More information

ADVANCED DESIGN TECHNIQUES FOR RF POWER AMPLIFIERS

ADVANCED DESIGN TECHNIQUES FOR RF POWER AMPLIFIERS ADVANCED DESIGN TECHNIQUES FOR RF POWER AMPLIFIERS ANALOG CIRCUITS AND SIGNAL PROCESSING SERIES Consulting Editor: Mohammed Ismail. Ohio State University Related Titles: CMOS CASCADE SIGMA-DELTA MODULATORS

More information

HIGHLY LINEAR INTEGRATED WIDEBAND AMPLIFIERS. Design and Analysis Techniques for Frequencies from Audio to RF

HIGHLY LINEAR INTEGRATED WIDEBAND AMPLIFIERS. Design and Analysis Techniques for Frequencies from Audio to RF HIGHLY LINEAR INTEGRATED WIDEBAND AMPLIFIERS Design and Analysis Techniques for Frequencies from Audio to RF THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE ANALOG CIRCUITS AND SIGNAL

More information

ANALOG INTEGRATED CIRCUITS FOR COMMUNICATION Principles, Simulation and Design

ANALOG INTEGRATED CIRCUITS FOR COMMUNICATION Principles, Simulation and Design ANALOG INTEGRATED CIRCUITS FOR COMMUNICATION Principles, Simulation and Design ANALOG INTEGRATED CIRCUITS FOR COMMUNICATION Principles, Simulation and Design by Donald 0. Pederson University of California

More information

STATISTICAL MODELING FOR COMPUTER-AIDED DESIGN OF MOS VLSI CIRCUITS

STATISTICAL MODELING FOR COMPUTER-AIDED DESIGN OF MOS VLSI CIRCUITS STATISTICAL MODELING FOR COMPUTER-AIDED DESIGN OF MOS VLSI CIRCUITS THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor Related titles:

More information

Minimizing Spurious Tones in Digital Delta-Sigma Modulators

Minimizing Spurious Tones in Digital Delta-Sigma Modulators Minimizing Spurious Tones in Digital Delta-Sigma Modulators ANALOG CIRCUITS AND SIGNAL PROCESSING Series Editors: Mohammed Ismail Mohamad Sawan For other titles published in this series, go to http://www.springer.com/series/7381

More information

PASSIVE COMPONENTS FOR DENSE OPTICAL INTEGRATION

PASSIVE COMPONENTS FOR DENSE OPTICAL INTEGRATION PASSIVE COMPONENTS FOR DENSE OPTICAL INTEGRATION PASSIVE COMPONENTS FOR DENSE OPTICAL INTEGRA TION Christina Manolatou Massachusetts Institute oftechnology Hermann A. Haus Massachusetts Institute oftechnology

More information

TRANSISTOR CIRCUITS FOR SPACECRAFT POWER SYSTEM

TRANSISTOR CIRCUITS FOR SPACECRAFT POWER SYSTEM TRANSISTOR CIRCUITS FOR SPACECRAFT POWER SYSTEM Transistor Circuits for Spacecraft Power System KengC. Wu Lockheed Martin Naval Electronics & Surveillance Systems Moorestown, NJ, USA.., ~ SPRINGER SCIENCE+BUSINESS

More information

ANALOG CIRCUIT DESIGN

ANALOG CIRCUIT DESIGN ANALOG CIRCUIT DESIGN Analog Circuit Design High-Speed Analog-to-Digital Converters; Mixed-Signal Design; PLL's and Synthesizers Edited by Rudy J. van de Plassche Broadcom Netherlands B. V., Bunnik Johan

More information

DESIGN OF LOW-VOLTAGE, LOW-POWER OPERATIONAL AMPLIFIER CELLS

DESIGN OF LOW-VOLTAGE, LOW-POWER OPERATIONAL AMPLIFIER CELLS DESIGN OF LOW-VOLTAGE, LOW-POWER OPERATIONAL AMPLIFIER CELLS THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor Mohammed Ismail

More information

Analog Devices perpetual ebook license Artech House copyrighted material.

Analog Devices perpetual ebook license Artech House copyrighted material. Software-Defined Radio for Engineers For a listing of recent titles in the Artech House Mobile Communications, turn to the back of this book. Software-Defined Radio for Engineers Travis F. Collins Robin

More information

ANALOG CIRCUITS AND SIGNAL PROCESSING

ANALOG CIRCUITS AND SIGNAL PROCESSING ANALOG CIRCUITS AND SIGNAL PROCESSING Series Editors Mohammed Ismail, The Ohio State University Mohamad Sawan, École Polytechnique de Montréal For further volumes: http://www.springer.com/series/7381 Yongjian

More information

Parasitic-Aware Optimization of CMOS RF Circuits

Parasitic-Aware Optimization of CMOS RF Circuits Parasitic-Aware Optimization of CMOS RF Circuits Parasitic-Aware Optimization of CMOS RF Circuits by David J. Allstot Kiyong Choi Jinho Park University of Washington KLUWER ACADEMIC PUBLISHERS NEW YORK,

More information

In the previous chapters, efficient and new methods and. algorithms have been presented in analog fault diagnosis. Also a

In the previous chapters, efficient and new methods and. algorithms have been presented in analog fault diagnosis. Also a 118 CHAPTER 6 Mixed Signal Integrated Circuits Testing - A Study 6.0 Introduction In the previous chapters, efficient and new methods and algorithms have been presented in analog fault diagnosis. Also

More information

SpringerBriefs in Electrical and Computer Engineering

SpringerBriefs in Electrical and Computer Engineering SpringerBriefs in Electrical and Computer Engineering More information about this series at http://www.springer.com/series/10059 David Fouto Nuno Paulino Design of Low Power and Low Area Passive Sigma

More information

METHODOLOGY FOR THE DIGITAL CALIBRATION OF ANALOG CIRCUITS AND SYSTEMS

METHODOLOGY FOR THE DIGITAL CALIBRATION OF ANALOG CIRCUITS AND SYSTEMS METHODOLOGY FOR THE DIGITAL CALIBRATION OF ANALOG CIRCUITS AND SYSTEMS METHODOLOGY FOR THE DIGITAL CALIBRATION OF ANALOG CIRCUITS AND SYSTEMS with Case Studies by Marc Pastre Ecole Polytechnique Fédérale

More information

RF CMOS Power Amplifiers: Theory, Design and Implementation

RF CMOS Power Amplifiers: Theory, Design and Implementation RF CMOS Power Amplifiers: Theory, Design and Implementation THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor: Mohammed Ismail.

More information

AUTOMATIC MODULATION RECOGNITION OF COMMUNICATION SIGNALS

AUTOMATIC MODULATION RECOGNITION OF COMMUNICATION SIGNALS AUTOMATIC MODULATION RECOGNITION OF COMMUNICATION SIGNALS AUTOMATIC MODULATION RECOGNITION OF COMMUNICATION SIGNALS by Eisayed Eisayed Azzouz Department 01 Electronic & Electrical Engineering, Military

More information

Integrated Circuit Design for High-Speed Frequency Synthesis

Integrated Circuit Design for High-Speed Frequency Synthesis Integrated Circuit Design for High-Speed Frequency Synthesis John Rogers Calvin Plett Foster Dai ARTECH H O US E BOSTON LONDON artechhouse.com Preface XI CHAPTER 1 Introduction 1 1.1 Introduction to Frequency

More information

Modulation Based On-Chip Ramp Generator for ADC BIST

Modulation Based On-Chip Ramp Generator for ADC BIST Modulation Based On-Chip Ramp Generator for ADC BIST WAG YOG-SHEG, WAG JI-XIAG, LAI FEG-CHAG, YE YI-ZHEG Microelectronics Center Harbin Institute of Technology 92#, Xidazhi Street, Harbin, Heilongjiang,

More information

High-Linearity CMOS. RF Front-End Circuits

High-Linearity CMOS. RF Front-End Circuits High-Linearity CMOS RF Front-End Circuits Yongwang Ding Ramesh Harjani iigh-linearity CMOS tf Front-End Circuits - Springer Library of Congress Cataloging-in-Publication Data A C.I.P. Catalogue record

More information

On the Study of Improving Noise Shaping Techniques in Wide Bandwidth Sigma Delta Modulators

On the Study of Improving Noise Shaping Techniques in Wide Bandwidth Sigma Delta Modulators On the Study of Improving Noise Shaping Techniques in Wide Bandwidth Sigma Delta Modulators By Du Yun Master Degree in Electrical and Electronics Engineering 2013 Faculty of Science and Technology University

More information

Analog Circuits and Signal Processing. Series Editors Mohammed Ismail, Dublin, USA Mohamad Sawan, Montreal, Canada

Analog Circuits and Signal Processing. Series Editors Mohammed Ismail, Dublin, USA Mohamad Sawan, Montreal, Canada Analog Circuits and Signal Processing Series Editors Mohammed Ismail, Dublin, USA Mohamad Sawan, Montreal, Canada More information about this series at http://www.springer.com/series/7381 Marco Vigilante

More information

CMOS Test and Evaluation

CMOS Test and Evaluation CMOS Test and Evaluation Manjul Bhushan Mark B. Ketchen CMOS Test and Evaluation A Physical Perspective Manjul Bhushan OctEval Hopewell Junction, NY, USA Mark B. Ketchen OcteVue Hadley, MA, USA ISBN 978-1-4939-1348-0

More information

Datorstödd Elektronikkonstruktion

Datorstödd Elektronikkonstruktion Datorstödd Elektronikkonstruktion [Computer Aided Design of Electronics] Zebo Peng, Petru Eles and Gert Jervan Embedded Systems Laboratory IDA, Linköping University http://www.ida.liu.se/~tdts80/~tdts80

More information

SV2C 28 Gbps, 8 Lane SerDes Tester

SV2C 28 Gbps, 8 Lane SerDes Tester SV2C 28 Gbps, 8 Lane SerDes Tester Data Sheet SV2C Personalized SerDes Tester Data Sheet Revision: 1.0 2015-03-19 Revision Revision History Date 1.0 Document release. March 19, 2015 The information in

More information

Non-linear Control. Part III. Chapter 8

Non-linear Control. Part III. Chapter 8 Chapter 8 237 Part III Chapter 8 Non-linear Control The control methods investigated so far have all been based on linear feedback control. Recently, non-linear control techniques related to One Cycle

More information

LOW POWER DESIGN METHODOLOGIES

LOW POWER DESIGN METHODOLOGIES LOW POWER DESIGN METHODOLOGIES LOW POWER DESIGN METHODOLOGIES edited by Jan M. Rabaey University Califomia and Massoud Pedram University of Southem Califomia SPRINGER SCIENCE+BUSINESS MEDIA, LLC ISBN 978-1-46

More information

BANDPASS delta sigma ( ) modulators are used to digitize

BANDPASS delta sigma ( ) modulators are used to digitize 680 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 52, NO. 10, OCTOBER 2005 A Time-Delay Jitter-Insensitive Continuous-Time Bandpass 16 Modulator Architecture Anurag Pulincherry, Michael

More information

SELECTIVE LINEAR-PHASE SWITCHED-CAPACITOR AND DIGITAL FILTERS

SELECTIVE LINEAR-PHASE SWITCHED-CAPACITOR AND DIGITAL FILTERS SELECTIVE LINEAR-PHASE SWITCHED-CAPACITOR AND DIGITAL FILTERS THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE ANALOG CIRCUITS AND SIGNAL PROCESSING Related titles: Consulting Editor

More information

Analog-to-Digital Converter Performance Signoff with Analog FastSPICE Transient Noise at Qualcomm

Analog-to-Digital Converter Performance Signoff with Analog FastSPICE Transient Noise at Qualcomm Analog-to-Digital Converter Performance Signoff with Analog FastSPICE Transient Noise at Qualcomm 2009 Berkeley Design Automation, Inc. 2902 Stender Way, Santa Clara, CA USA 95054 www.berkeley-da.com Tel:

More information

ADVANCES in VLSI technology result in manufacturing

ADVANCES in VLSI technology result in manufacturing INTL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS, 2013, VOL. 59, NO. 1, PP. 99 104 Manuscript received January 8, 2013; revised March, 2013. DOI: 10.2478/eletel-2013-0012 Rapid Prototyping of Third-Order

More information

ANALOG INTERFACES FOR DIGITAL SIGNAL PROCESSING SYSTEMS

ANALOG INTERFACES FOR DIGITAL SIGNAL PROCESSING SYSTEMS ANALOG INTERFACES FOR DIGITAL SIGNAL PROCESSING SYSTEMS THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor Related titles: Mohammed

More information

ULTRA LOW POWER CAPACITIVE SENSOR INTERFACES

ULTRA LOW POWER CAPACITIVE SENSOR INTERFACES ULTRA LOW POWER CAPACITIVE SENSOR INTERFACES ANALOG CIRCUITS AND SIGNAL PROCESSING SERIES Consulting Editor: Mohammed Ismail. Ohio State University Titles in Series: ULTRA LOW POWER CAPACITIVE SENSOR INTERFACES

More information

Lecture 1, Introduction and Background

Lecture 1, Introduction and Background EE 338L CMOS Analog Integrated Circuit Design Lecture 1, Introduction and Background With the advances of VLSI (very large scale integration) technology, digital signal processing is proliferating and

More information

The Fundamentals of Mixed Signal Testing

The Fundamentals of Mixed Signal Testing The Fundamentals of Mixed Signal Testing Course Information The Fundamentals of Mixed Signal Testing course is designed to provide the foundation of knowledge that is required for testing modern mixed

More information

Data Converters. Springer FRANCO MALOBERTI. Pavia University, Italy

Data Converters. Springer FRANCO MALOBERTI. Pavia University, Italy Data Converters by FRANCO MALOBERTI Pavia University, Italy Springer Contents Dedicat ion Preface 1. BACKGROUND ELEMENTS 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 The Ideal Data Converter Sampling 1.2.1 Undersampling

More information

Section 1. Fundamentals of DDS Technology

Section 1. Fundamentals of DDS Technology Section 1. Fundamentals of DDS Technology Overview Direct digital synthesis (DDS) is a technique for using digital data processing blocks as a means to generate a frequency- and phase-tunable output signal

More information

ALL-DIGITAL FREQUENCY SYNTHESIZER IN DEEP-SUBMICRON CMOS

ALL-DIGITAL FREQUENCY SYNTHESIZER IN DEEP-SUBMICRON CMOS ALL-DIGITAL FREQUENCY SYNTHESIZER IN DEEP-SUBMICRON CMOS ROBERT BOGDAN STASZEWSKI Texas Instruments PORAS T. BALSARA University of Texas at Dallas WILEY- INTERSCIENCE A JOHN WILEY & SONS, INC., PUBLICATION

More information

Basic Concepts and Architectures

Basic Concepts and Architectures CMOS Sigma-Delta Converters From Basics to State-of of-the-art Basic Concepts and Architectures Rocío del Río, R Belén Pérez-Verdú and José M. de la Rosa {rocio,belen,jrosa}@imse.cnm.es KTH, Stockholm,

More information

Smart AD and DA Conversion

Smart AD and DA Conversion Smart AD and DA Conversion ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor: Mohammed Ismail. Ohio State University For other titles published in this series, go to www.springer.com/series/7381

More information

Improving The Testability Of Mixed-Signal Integrated Circuits

Improving The Testability Of Mixed-Signal Integrated Circuits Improving The Testability Of Mixed-Signal Integrated s Gordon W. Roberts Microelectronics and Computer Systems Laboratory, McGill University Montreal, CANADA H3A 2A7 Tel: 514-398-629 Fax: 514-398-447 http://www.macs.ee.mcgill.ca/~roberts/

More information

LOW-VOLTAGE CMOS OPERATIONAL AMPLIFIERS Theory, Design and Implementation

LOW-VOLTAGE CMOS OPERATIONAL AMPLIFIERS Theory, Design and Implementation LOW-VOLTAGE CMOS OPERATIONAL AMPLIFIERS Theory, Design and Implementation THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor Mohammed

More information

Fractional- N PLL with 90 Phase Shift Lock and Active Switched- Capacitor Loop Filter

Fractional- N PLL with 90 Phase Shift Lock and Active Switched- Capacitor Loop Filter J. Park, F. Maloberti: "Fractional-N PLL with 90 Phase Shift Lock and Active Switched-Capacitor Loop Filter"; Proc. of the IEEE Custom Integrated Circuits Conference, CICC 2005, San Josè, 21 September

More information

on the use of an original calibration scheme. The effectiveness of the calibration procedure is

on the use of an original calibration scheme. The effectiveness of the calibration procedure is Ref: BC.MEJ-IMST01.2 Analog Built-In Saw-Tooth Generator for ADC Histogram Test F. Azaïs, S. Bernard, Y. Bertrand and M. Renovell LIRMM - University of Montpellier 161, rue Ada - 34392 Montpellier Cedex

More information

Substrate Coupling in RF Analog/Mixed Signal IC Design: A Review

Substrate Coupling in RF Analog/Mixed Signal IC Design: A Review Substrate Coupling in RF Analog/Mixed Signal IC Design: A Review Ashish C Vora, Graduate Student, Rochester Institute of Technology, Rochester, NY, USA. Abstract : Digital switching noise coupled into

More information

A 3-10GHz Ultra-Wideband Pulser

A 3-10GHz Ultra-Wideband Pulser A 3-10GHz Ultra-Wideband Pulser Jan M. Rabaey Simone Gambini Davide Guermandi Electrical Engineering and Computer Sciences University of California at Berkeley Technical Report No. UCB/EECS-2006-136 http://www.eecs.berkeley.edu/pubs/techrpts/2006/eecs-2006-136.html

More information

CMOS Active Inductors and Transformers. Principle, Implementation, and Applications

CMOS Active Inductors and Transformers. Principle, Implementation, and Applications CMOS Active Inductors and Transformers Principle, Implementation, and Applications Fei Yuan CMOS Active Inductors and Transformers Principle, Implementation, and Applications Fei Yuan Department of Electrical

More information

K-Best Decoders for 5G+ Wireless Communication

K-Best Decoders for 5G+ Wireless Communication K-Best Decoders for 5G+ Wireless Communication Mehnaz Rahman Gwan S. Choi K-Best Decoders for 5G+ Wireless Communication Mehnaz Rahman Department of Electrical and Computer Engineering Texas A&M University

More information

acoustic imaging cameras, microscopes, phased arrays, and holographic systems

acoustic imaging cameras, microscopes, phased arrays, and holographic systems acoustic imaging cameras, microscopes, phased arrays, and holographic systems acoustic imaging cameras, microscopes, phased arrays, and holographic systems Edited by Glen Wade University of California

More information

A Level-Encoded Transition Signaling Protocol for High-Throughput Asynchronous Global Communication

A Level-Encoded Transition Signaling Protocol for High-Throughput Asynchronous Global Communication A Level-Encoded Transition Signaling Protocol for High-Throughput Asynchronous Global Communication Peggy B. McGee, Melinda Y. Agyekum, Moustafa M. Mohamed and Steven M. Nowick {pmcgee, melinda, mmohamed,

More information

Wavedancer A new ultra low power ISM band transceiver RFIC

Wavedancer A new ultra low power ISM band transceiver RFIC Wavedancer 400 - A new ultra low power ISM band transceiver RFIC R.W.S. Harrison, Dr. M. Hickson Roke Manor Research Ltd, Old Salisbury Lane, Romsey, Hampshire, SO51 0ZN. e-mail: roscoe.harrison@roke.co.uk

More information

The Sampling Theorem:

The Sampling Theorem: The Sampling Theorem: Aim: Experimental verification of the sampling theorem; sampling and message reconstruction (interpolation). Experimental Procedure: Taking Samples: In the first part of the experiment

More information

Application Note #5 Direct Digital Synthesis Impact on Function Generator Design

Application Note #5 Direct Digital Synthesis Impact on Function Generator Design Impact on Function Generator Design Introduction Function generators have been around for a long while. Over time, these instruments have accumulated a long list of features. Starting with just a few knobs

More information

Using an FPGA based system for IEEE 1641 waveform generation

Using an FPGA based system for IEEE 1641 waveform generation Using an FPGA based system for IEEE 1641 waveform generation Colin Baker EADS Test & Services (UK) Ltd 23 25 Cobham Road Wimborne, Dorset, UK colin.baker@eads-ts.com Ashley Hulme EADS Test Engineering

More information

Session 3. CMOS RF IC Design Principles

Session 3. CMOS RF IC Design Principles Session 3 CMOS RF IC Design Principles Session Delivered by: D. Varun 1 Session Topics Standards RF wireless communications Multi standard RF transceivers RF front end architectures Frequency down conversion

More information

High-Speed Interconnect Technology for Servers

High-Speed Interconnect Technology for Servers High-Speed Interconnect Technology for Servers Hiroyuki Adachi Jun Yamada Yasushi Mizutani We are developing high-speed interconnect technology for servers to meet customers needs for transmitting huge

More information

A VCO-based analog-to-digital converter with secondorder sigma-delta noise shaping

A VCO-based analog-to-digital converter with secondorder sigma-delta noise shaping A VCO-based analog-to-digital converter with secondorder sigma-delta noise shaping The MIT Faculty has made this article openly available. Please share how this access benefits you. Your story matters.

More information

HYBRID NEURAL NETWORK AND EXPERT SYSTEMS

HYBRID NEURAL NETWORK AND EXPERT SYSTEMS HYBRID NEURAL NETWORK AND EXPERT SYSTEMS HYBRID NEURAL NETWORK AND EXPERT SYSTEMS by Larry R. Medsker Department of Computer Science and Information Systems The American University... " Springer Science+Business

More information

Recent Advances in Analog, Mixed-Signal, and RF Testing

Recent Advances in Analog, Mixed-Signal, and RF Testing IPSJ Transactions on System LSI Design Methodology Vol. 3 19 46 (Feb. 2010) Invited Paper Recent Advances in Analog, Mixed-Signal, and RF Testing Kwang-Ting (Tim) Cheng 1 and Hsiu-Ming (Sherman) Chang

More information

On Chip Active Decoupling Capacitors for Supply Noise Reduction for Power Gating and Dynamic Dual Vdd Circuits in Digital VLSI

On Chip Active Decoupling Capacitors for Supply Noise Reduction for Power Gating and Dynamic Dual Vdd Circuits in Digital VLSI ELEN 689 606 Techniques for Layout Synthesis and Simulation in EDA Project Report On Chip Active Decoupling Capacitors for Supply Noise Reduction for Power Gating and Dynamic Dual Vdd Circuits in Digital

More information

Microelectronic Circuits

Microelectronic Circuits SECOND EDITION ISHBWHBI \ ' -' Microelectronic Circuits Adel S. Sedra University of Toronto Kenneth С Smith University of Toronto HOLT, RINEHART AND WINSTON HOLT, RINEHART AND WINSTON, INC. New York Chicago

More information

DAV Institute of Engineering & Technology Department of ECE. Course Outcomes

DAV Institute of Engineering & Technology Department of ECE. Course Outcomes DAV Institute of Engineering & Technology Department of ECE Course Outcomes Upon successful completion of this course, the student will intend to apply the various outcome as:: BTEC-301, Analog Devices

More information

Recent Advances in Power Encoding and GaN Switching Technologies for Digital Transmitters

Recent Advances in Power Encoding and GaN Switching Technologies for Digital Transmitters MITSUBISHI ELECTRIC RESEARCH LABORATORIES http://www.merl.com Recent Advances in Power Encoding and GaN Switching Technologies for Digital Transmitters Ma, R. TR2015-131 December 2015 Abstract Green and

More information

Time-interleaved Analog-to-Digital Converters

Time-interleaved Analog-to-Digital Converters Time-interleaved Analog-to-Digital Converters ANALOG CIRCUITS AND SIGNAL PROCESSING SERIES Consulting Editor: Mohammed Ismail. Ohio State University For other titles published in this series, go to www.springer.com/series/7381

More information

Comprehensive Ultrasound Research Platform

Comprehensive Ultrasound Research Platform Comprehensive Ultrasound Research Platform Functional Requirements List and Performance Specifications Emma Muir Sam Muir Jacob Sandlund David Smith Advisor: Dr. José Sánchez Date: November 9, 2010 Introduction

More information

EECS150 - Digital Design Lecture 28 Course Wrap Up. Recap 1

EECS150 - Digital Design Lecture 28 Course Wrap Up. Recap 1 EECS150 - Digital Design Lecture 28 Course Wrap Up Dec. 5, 2013 Prof. Ronald Fearing Electrical Engineering and Computer Sciences University of California, Berkeley (slides courtesy of Prof. John Wawrzynek)

More information

Digital Logic ircuits Circuits Fundamentals I Fundamentals I

Digital Logic ircuits Circuits Fundamentals I Fundamentals I Digital Logic Circuits Fundamentals I Fundamentals I 1 Digital and Analog Quantities Electronic circuits can be divided into two categories. Digital Electronics : deals with discrete values (= sampled

More information

Yet, many signal processing systems require both digital and analog circuits. To enable

Yet, many signal processing systems require both digital and analog circuits. To enable Introduction Field-Programmable Gate Arrays (FPGAs) have been a superb solution for rapid and reliable prototyping of digital logic systems at low cost for more than twenty years. Yet, many signal processing

More information

Policy-Based RTL Design

Policy-Based RTL Design Policy-Based RTL Design Bhanu Kapoor and Bernard Murphy bkapoor@atrenta.com Atrenta, Inc., 2001 Gateway Pl. 440W San Jose, CA 95110 Abstract achieving the desired goals. We present a new methodology to

More information

Mixed Signal Virtual Components COLINE, a case study

Mixed Signal Virtual Components COLINE, a case study Mixed Signal Virtual Components COLINE, a case study J.F. POLLET - DOLPHIN INTEGRATION Meylan - FRANCE http://www.dolphin.fr Overview of the presentation Introduction COLINE, an example of Mixed Signal

More information

Reinventing the Transmit Chain for Next-Generation Multimode Wireless Devices. By: Richard Harlan, Director of Technical Marketing, ParkerVision

Reinventing the Transmit Chain for Next-Generation Multimode Wireless Devices. By: Richard Harlan, Director of Technical Marketing, ParkerVision Reinventing the Transmit Chain for Next-Generation Multimode Wireless Devices By: Richard Harlan, Director of Technical Marketing, ParkerVision Upcoming generations of radio access standards are placing

More information

Downloaded from 1

Downloaded from  1 VII SEMESTER FINAL EXAMINATION-2004 Attempt ALL questions. Q. [1] How does Digital communication System differ from Analog systems? Draw functional block diagram of DCS and explain the significance of

More information

DIGITAL SIGNAL PROCESSING LABORATORY

DIGITAL SIGNAL PROCESSING LABORATORY DIGITAL SIGNAL PROCESSING LABORATORY SECOND EDITION В. Preetham Kumar CRC Press Taylor & Francis Group Boca Raton London New York CRC Press is an imprint of the Taylor & Francis Croup, an informa business

More information

NOWADAYS, multistage amplifiers are growing in demand

NOWADAYS, multistage amplifiers are growing in demand 1690 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 51, NO. 9, SEPTEMBER 2004 Advances in Active-Feedback Frequency Compensation With Power Optimization and Transient Improvement Hoi

More information

IQ CALIBRATION TECHNIQUES FOR CMOS RADIO TRANSCEIVERS

IQ CALIBRATION TECHNIQUES FOR CMOS RADIO TRANSCEIVERS IQ CALIBRATION TECHNIQUES FOR CMOS RADIO TRANSCEIVERS ANALOG CIRCUITS AND SIGNAL PROCESSING SERIES Consulting Editor: Mohammed Ismail. Ohio State University Related Titles: asasdas CMOS CURRENT-MODE CIRCUITS

More information

Single Chip FPGA Based Realization of Arbitrary Waveform Generator using Rademacher and Walsh Functions

Single Chip FPGA Based Realization of Arbitrary Waveform Generator using Rademacher and Walsh Functions IEEE ICET 26 2 nd International Conference on Emerging Technologies Peshawar, Pakistan 3-4 November 26 Single Chip FPGA Based Realization of Arbitrary Waveform Generator using Rademacher and Walsh Functions

More information

CHAPTER III THE FPGA IMPLEMENTATION OF PULSE WIDTH MODULATION

CHAPTER III THE FPGA IMPLEMENTATION OF PULSE WIDTH MODULATION 34 CHAPTER III THE FPGA IMPLEMENTATION OF PULSE WIDTH MODULATION 3.1 Introduction A number of PWM schemes are used to obtain variable voltage and frequency supply. The Pulse width of PWM pulsevaries with

More information

Phase-Locked Loop Engineering Handbook for Integrated Circuits

Phase-Locked Loop Engineering Handbook for Integrated Circuits Phase-Locked Loop Engineering Handbook for Integrated Circuits Stanley Goldman ARTECH H O U S E BOSTON LONDON artechhouse.com Preface Acknowledgments xiii xxi CHAPTER 1 Cetting Started with PLLs 1 1.1

More information

Real-time FPGA realization of an UWB transceiver physical layer

Real-time FPGA realization of an UWB transceiver physical layer University of Wollongong Research Online University of Wollongong Thesis Collection 1954-2016 University of Wollongong Thesis Collections 2005 Real-time FPGA realization of an UWB transceiver physical

More information

Digital Systems Design

Digital Systems Design Digital Systems Design Digital Systems Design and Test Dr. D. J. Jackson Lecture 1-1 Introduction Traditional digital design Manual process of designing and capturing circuits Schematic entry System-level

More information

DIGITAL INTEGRATED CIRCUITS A DESIGN PERSPECTIVE 2 N D E D I T I O N

DIGITAL INTEGRATED CIRCUITS A DESIGN PERSPECTIVE 2 N D E D I T I O N DIGITAL INTEGRATED CIRCUITS A DESIGN PERSPECTIVE 2 N D E D I T I O N Jan M. Rabaey, Anantha Chandrakasan, and Borivoje Nikolic CONTENTS PART I: THE FABRICS Chapter 1: Introduction (32 pages) 1.1 A Historical

More information

TUTORIAL 283 INL/DNL Measurements for High-Speed Analog-to- Digital Converters (ADCs)

TUTORIAL 283 INL/DNL Measurements for High-Speed Analog-to- Digital Converters (ADCs) Maxim > Design Support > Technical Documents > Tutorials > A/D and D/A Conversion/Sampling Circuits > APP 283 Maxim > Design Support > Technical Documents > Tutorials > High-Speed Signal Processing > APP

More information

Pipeline vs. Sigma Delta ADC for Communications Applications

Pipeline vs. Sigma Delta ADC for Communications Applications Pipeline vs. Sigma Delta ADC for Communications Applications Noel O Riordan, Mixed-Signal IP Group, S3 Semiconductors noel.oriordan@s3group.com Introduction The Analog-to-Digital Converter (ADC) is a key

More information

Optimized BPSK and QAM Techniques for OFDM Systems

Optimized BPSK and QAM Techniques for OFDM Systems I J C T A, 9(6), 2016, pp. 2759-2766 International Science Press ISSN: 0974-5572 Optimized BPSK and QAM Techniques for OFDM Systems Manikandan J.* and M. Manikandan** ABSTRACT A modulation is a process

More information

Issues and Challenges of Analog Circuit Testing in Mixed-Signal SOC

Issues and Challenges of Analog Circuit Testing in Mixed-Signal SOC VDEC D2T Symposium Dec. 11 2009 Issues and Challenges of Analog Circuit Testing in Mixed-Signal SOC Haruo Kobayashi Gunma University k_haruo@el.gunma-u.ac.jp 1 Contents 1. Introduction 2. Review of Analog

More information

APPLICATION NOTE 3942 Optimize the Buffer Amplifier/ADC Connection

APPLICATION NOTE 3942 Optimize the Buffer Amplifier/ADC Connection Maxim > Design Support > Technical Documents > Application Notes > Communications Circuits > APP 3942 Maxim > Design Support > Technical Documents > Application Notes > High-Speed Interconnect > APP 3942

More information

A Case Study of Nanoscale FPGA Programmable Switches with Low Power

A Case Study of Nanoscale FPGA Programmable Switches with Low Power A Case Study of Nanoscale FPGA Programmable Switches with Low Power V.Elamaran 1, Har Narayan Upadhyay 2 1 Assistant Professor, Department of ECE, School of EEE SASTRA University, Tamilnadu - 613401, India

More information

Design & Implementation of an Adaptive Delta Sigma Modulator

Design & Implementation of an Adaptive Delta Sigma Modulator Design & Implementation of an Adaptive Delta Sigma Modulator Shahrukh Athar MS CmpE 7 27-6-8 Project Supervisor: Dr Shahid Masud Presentation Outline Introduction Adaptive Modulator Design Simulation Implementation

More information

Digital AudioAmplifiers: Methods for High-Fidelity Fully Digital Class D Systems

Digital AudioAmplifiers: Methods for High-Fidelity Fully Digital Class D Systems Digital AudioAmplifiers: Methods for High-Fidelity Fully Digital Class D Systems P. T. Krein, Director Grainger Center for Electric Machinery and Electromechanics Dept. of Electrical and Computer Engineering

More information

Chapter 2 Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL

Chapter 2 Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL Chapter 2 Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL 2.1 Background High performance phase locked-loops (PLL) are widely used in wireless communication systems to provide

More information

LSI and Circuit Technologies for the SX-8 Supercomputer

LSI and Circuit Technologies for the SX-8 Supercomputer LSI and Circuit Technologies for the SX-8 Supercomputer By Jun INASAKA,* Toshio TANAHASHI,* Hideaki KOBAYASHI,* Toshihiro KATOH,* Mikihiro KAJITA* and Naoya NAKAYAMA This paper describes the LSI and circuit

More information

EC 1354-Principles of VLSI Design

EC 1354-Principles of VLSI Design EC 1354-Principles of VLSI Design UNIT I MOS TRANSISTOR THEORY AND PROCESS TECHNOLOGY PART-A 1. What are the four generations of integrated circuits? 2. Give the advantages of IC. 3. Give the variety of

More information

Design of Logic Systems

Design of Logic Systems Design of Logic Systems Design of Logic Systems Second edition D. Lewin Formerly Professor of Computer Science and Information Engineering, University of Sheffield D. Protheroe Lecturer in Electronic Engineering,

More information

A Review of Phase Locked Loop Design Using VLSI Technology for Wireless Communication.

A Review of Phase Locked Loop Design Using VLSI Technology for Wireless Communication. A Review of Phase Locked Loop Design Using VLSI Technology for Wireless Communication. PG student, M.E. (VLSI and Embedded system) G.H.Raisoni College of Engineering and Management, A nagar Abstract: The

More information

A 1.9GHz Single-Chip CMOS PHS Cellphone

A 1.9GHz Single-Chip CMOS PHS Cellphone A 1.9GHz Single-Chip CMOS PHS Cellphone IEEE JSSC, Vol. 41, No.12, December 2006 William Si, Srenik Mehta, Hirad Samavati, Manolis Terrovitis, Michael Mack, Keith Onodera, Steve Jen, Susan Luschas, Justin

More information