1 Ω Typical On Resistance, ±5 V, +12 V, +5 V, and +3.3 V, 4:1 Multiplexer ADG1604

Transcription

1 ata Sheet FEATURES 1 Ω typical on resistance.2 Ω on resistance flatness ±3.3 V to ±8 V dual-supply operation 3.3 V to 16 V single-supply operation No VL supply required 3 V logic-compatible inputs Rail-to-rail operation Continuous current per channel LFCSP: 54 ma TSSOP: 315 ma 14-lead TSSOP and 16-lead, 4 mm 4 mm LFCSP 1 Ω Typical On Resistance, ±5 V, +12 V, +5 V, and +3.3 V, 4:1 Multiplexer FUNCTIONAL BLOCK IAGRAM S1 S2 S3 S4 A 1 OF 4 ECOER A1 Figure 1. EN APPLICATIONS Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment ata acquisition systems Battery-powered systems Sample-and-hold systems Relay replacements GENERAL ESCRIPTION The is a complementary metal-oxide semiconductor (CMOS) analog multiplexer and switches one of four inputs to a common output,, as determined by the 3-bit binary address lines, A, A1, and EN. Logic on the EN pin disables the device. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. The ultralow on resistance of these switches make them ideal solutions for data acquisition and gain switching applications where low on resistance and distortion is critical. The on resistance profile is very flat over the full analog input range, ensuring excellent linearity and low distortion when switching audio signals. The CMOS construction ensures ultralow power dissipation, making the devices ideally suited for portable and batterypowered instruments. PROUCT HIGHLIGHTS Ω maximum on resistance over temperature. 2. Minimum distortion: TH + N =.7% V logic-compatible digital inputs: VINH = 2. V, VINL =.8 V. 4. No VL logic power supply required. 5. Ultralow power dissipation: <16 nw lead TSSOP and 16-lead, 4 mm 4 mm LFCSP. Rev. B ocument Feedback Information furnished by Analog evices is believed to be accurate and reliable. However, no responsibility is assumed by Analog evices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog evices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 916, Norwood, MA , U.S.A. Tel: Analog evices, Inc. All rights reserved. Technical Support

2 TABLE OF CONTENTS Features... 1 Applications... 1 Functional Block iagram... 1 General escription... 1 Product Highlights... 1 Revision History... 2 Specifications... 3 ±5 V ual Supply V Single Supply V Single Supply V Single Supply... 6 ata Sheet Continuous Current per Channel, S or...7 Absolute Maximum Ratings...8 ES Caution...8 Pin Configurations and Function escriptions...9 Typical Performance Characteristics... 1 Test Circuits Terminology Outline imensions Ordering Guide REVISION HISTORY 3/16 Rev. A to Rev. B Changed CP to CP Throughout Changes to Figure 2, Figure 3, and Table Updated Outline imensions Changes to Ordering Guide /9 Rev. to Rev. A Changes to On Resistance (RON) Parameter, On Resistance Match Between Channels ( RON) Parameter, and On Resistance Flatness (RFLATON) Parameter, Table /9 Revision : Initial Version Rev. B Page 2 of 2

3 ata Sheet SPECIFICATIONS ±5 V UAL SUPPLY V = +5 V ± 1%, VSS = 5 V ± 1%, GN = V, unless otherwise noted. Table 1. Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to VSS V On Resistance (RON) 1 Ω typ VS = ±4.5 V, IS = 1 ma; see Figure Ω max V = ±4.5 V, VSS = ±4.5 V On Resistance Match Between Channels ( RON).4 Ω typ VS = ±4.5 V, IS = 1 ma Ω max On Resistance Flatness (RFLAT(ON)).2 Ω typ VS = ±4.5 V, IS = 1 ma Ω max LEAKAGE CURRENTS V = +5.5 V, VSS = 5.5 V Source Off Leakage, IS (Off ) ±.1 na typ VS = ±4.5 V, V = 4.5 V; see Figure 23 ±.2 ±1 ±8 na max rain Off Leakage, I (Off ) ±.1 na typ VS = ±4.5V, V = 4.5 V; see Figure 23 ±.2 ±2 ±16 na max Channel On Leakage, I, IS (On) ±.2 na typ VS = V = ±4.5 V; see Figure 24 ±.4 ±2 ±16 na max IGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH.5 µa typ VIN = VGN or V ±.1 µa max igital Input Capacitance, CIN 8 pf typ YNAMIC CHARACTERISTICS 1 Transition Time, ttransition 15 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 2.5 V; see Figure 29 ton (EN) 116 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 2.5 V; see Figure 31 toff (EN) 186 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 2.5 V; see Figure 31 Break-Before-Make Time elay, t 5 ns typ RL = 3 Ω, CL = 35 pf 28.5 ns min VS1 = VS2 = 2.5 V; see Figure 3 Charge Injection 14 pc typ VS = V, RS = Ω, CL = 1 nf; see Figure 32 Off Isolation 7 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz; see Figure 25 Channel-to-Channel Crosstalk 7 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz; see Figure 27 Total Harmonic istortion + Noise (TH + N).7 % typ RL = 11 Ω, 5 V p-p, f = 2 Hz to 2 khz; see Figure 28 3 db Bandwidth 15 MHz typ RL = 5 Ω, CL = 5 pf; see Figure 26 CS (Off ) 63 pf typ VS = V, f = 1 MHz C (Off ) 27 pf typ VS = V, f = 1 MHz C, CS (On) 36 pf typ VS = V, f = 1 MHz POWER REQUIREMENTS V = +5.5 V, VSS = 5.5 V I.1 µa typ igital inputs = V or V 1. µa max V/VSS ±3.3/±8 V min/max 1 Guaranteed by design, not subject to production test. Rev. B Page 3 of 2

4 ata Sheet 12 V SINGLE SUPPLY V = 12 V ± 1%, VSS = V, GN = V, unless otherwise noted. Table 2. Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to V V On Resistance (RON).95 Ω typ VS = V to 1 V, IS = 1 ma; see Figure Ω max V = 1.8 V, VSS = V On Resistance Match Between Channels ( RON).3 Ω typ VS = 1 V, IS = 1 ma Ω max On Resistance Flatness (RFLAT(ON)).2 Ω typ VS = V to 1 V, IS = 1 ma Ω max LEAKAGE CURRENTS V = 13.2 V, VSS = V Source Off Leakage, IS (Off ) ±.1 na typ VS = 1 V/1 V, V = 1 V/1 V; see Figure 23 ±.2 ±1 ±8 na max rain Off Leakage, I (Off ) ±.1 na typ VS = 1 V/1 V, V = 1 V/1 V; see Figure 23 ±.2 ±2 ±16 na max Channel On Leakage, I, IS (On) ±.2 na typ VS = V = 1 V or 1 V; see Figure 24 ±.4 ±2 ±16 na max IGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH.1 µa typ VIN = VGN or V ±.1 µa max igital Input Capacitance, CIN 8 pf typ YNAMIC CHARACTERISTICS 1 Transition Time, ttransition 1 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 8 V; see Figure 29 ton (EN) 8 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 8 V; see Figure 31 toff (EN) 144 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 8 V; see Figure 31 Break-Before-Make Time elay, t 25 ns typ RL = 3 Ω, CL = 35 pf 18 ns min VS1 = VS2 = 8 V; see Figure 3 Charge Injection 125 pc typ VS = 6 V, RS = Ω, CL = 1 nf; see Figure 32 Off Isolation 7 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz; see Figure 25 Channel-to-Channel Crosstalk 7 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz; see Figure 27 Total Harmonic istortion + Noise.13 % typ RL = 11 Ω, 5 V p-p, f = 2 Hz to 2 khz; see Figure 28 3 db Bandwidth 19 MHz typ RL = 5 Ω, CL = 5 pf; see Figure 26 CS (Off ) 6 pf typ VS = 6 V, f = 1 MHz C (Off ) 27 pf typ VS = 6 V, f = 1 MHz C, CS (On) 35 pf typ VS = 6 V, f = 1 MHz POWER REQUIREMENTS V = 12 V I.1 µa typ igital inputs = V or V 1 µa max I 23 µa typ igital inputs = 5 V 36 µa max V 3.3/16 V min/max 1 Guaranteed by design, not subject to production test. Rev. B Page 4 of 2

5 ata Sheet 5 V SINGLE SUPPLY V = 5 V ± 1%, VSS = V, GN = V, unless otherwise noted. Table 3. Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to V V On Resistance (RON) 1.7 Ω typ VS = V to 4.5 V, IS = 1 ma; see Figure Ω max V = 4.5 V, VSS = V On Resistance Match Between Channels ( RON).5 Ω typ VS = V to 4.5 V, IS = 1 ma Ω max On Resistance Flatness (RFLAT(ON)).4 Ω typ VS = V to 4.5 V, IS = 1 ma Ω max LEAKAGE CURRENTS V = 5.5 V, VSS = V Source Off Leakage, IS (Off ) ±.5 na typ VS = 1 V/4.5 V, V = 4.5 V/1 V; see Figure 23 ±.2 ±1 ±8 na max rain Off Leakage, I (Off ) ±.5 na typ VS = 1 V/4.5 V, V = 4.5 V/1 V; see Figure 23 ±.2 ±2 ±16 na max Channel On Leakage, I, IS (On) ±.1 na typ VS = V = 1 V or 4.5 V; see Figure 24 ±.4 ±2 ±16 na max IGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH.1 µa typ VIN = VGN or V ±.1 µa max igital Input Capacitance, CIN 8 pf typ YNAMIC CHARACTERISTICS 1 Transition Time, ttransition 175 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 2.5 V; see Figure 29 ton (EN) 135 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 2.5 V; see Figure 31 toff (EN) 228 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 2.5 V; see Figure 31 Break-Before-Make Time elay, t 3 ns typ RL = 3 Ω, CL = 35 pf 21 ns min VS1 = VS2 = 2.5 V; see Figure 3 Charge Injection 7 pc typ VS = 2.5 V, RS = Ω, CL = 1 nf; see Figure 32 Off Isolation 7 db typ RL = 5 Ω, CL = 5 pf, f = 1 khz; see Figure 25 Channel-to-Channel Crosstalk 7 db typ RL = 5 Ω, CL = 5 pf, f = 1 khz; see Figure 27 Total Harmonic istortion + Noise.9 % typ RL = 11 Ω, f = 2 Hz to 2 khz, VS = 3.5 V p-p; see Figure 28 3 db Bandwidth 16 MHz typ RL = 5 Ω, CL = 5 pf; see Figure 26 CS (Off ) 7 pf typ VS = 2.5 V, f = 1 MHz C (Off ) 3 pf typ VS = 2.5 V, f = 1 MHz C, CS (On) 4 pf typ VS = 2.5 V, f = 1 MHz POWER REQUIREMENTS V = 5.5 V I.1 µa typ igital inputs = V or V 1 µa max V 3.3/16 V min/max 1 Guaranteed by design, not subject to production test. Rev. B Page 5 of 2

6 ata Sheet 3.3 V SINGLE SUPPLY V = 3.3 V, VSS = V, GN = V, unless otherwise noted. Table 4. Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to V V On Resistance (RON) Ω typ VS = V to V, IS = 1 ma, V = 3.3 V, VSS = V; see Figure 22 On Resistance Match Between Channels ( RON) Ω typ VS = V to V, IS = 1 ma On Resistance Flatness (RFLAT(ON)) Ω typ VS = V to V, IS = 1 ma LEAKAGE CURRENTS V = 3.6 V, VSS = V Source Off Leakage, IS (Off ) ±.2 na typ VS =.6 V/3 V, V = 3 V/.6 V; see Figure 23 ±.25 ±1 ±8 na max rain Off Leakage, I (Off ) ±.2 na typ VS =.6 V/3 V, V = 3 V/.6 V; see Figure 23 ±.25 ±2 ±16 na max Channel On Leakage, I, IS (On) ±.5 na typ VS = V =.6 V or 3 V; see Figure 24 ±.6 ±2 ±16 na max IGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH.1 µa typ VIN = VGN or V ±.1 µa max igital Input Capacitance, CIN 8 pf typ YNAMIC CHARACTERISTICS 1 Transition Time, ttransition 28 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 1.5 V; see Figure 29 ton (EN) 227 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 1.5 V; see Figure 31 toff (EN) 357 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 1.5 V; see Figure 31 Break-Before-Make Time elay, t 25 ns typ RL = 3 Ω, CL = 35 pf 2 ns min VS1 = VS2 = 1.5 V; see Figure 3 Charge Injection 6 pc typ VS = 1.5 V, RS = Ω, CL = 1 nf; see Figure 32 Off Isolation 7 db typ RL = 5 Ω, CL = 5 pf, f = 1 khz; see Figure 25 Channel-to-Channel Crosstalk 7 db typ RL = 5 Ω, CL = 5 pf, f = 1 khz; see Figure 27 Total Harmonic istortion + Noise.15 % typ RL = 11 Ω, f = 2 Hz to 2 khz, VS = 2 V p-p; see Figure 28 3 db Bandwidth 15 MHz typ RL = 5 Ω, CL = 5 pf; see Figure 26 CS (Off ) 76 pf typ VS = 1.5 V, f = 1 MHz C (Off ) 316 pf typ VS = 1.5 V, f = 1 MHz C, CS (On) 42 pf typ VS = 1.5 V, f = 1 MHz POWER REQUIREMENTS V = 3.6 V I.1 µa typ igital inputs = V or V µa max V 3.3/16 V min/max 1 Guaranteed by design, not subject to production test. Rev. B Page 6 of 2

7 ata Sheet CONTINUOUS CURRENT PER CHANNEL, S OR Table 5. Parameter 25 C 85 C 125 C Unit CONTINUOUS CURRENT, S OR V = +5 V, VSS = 5 V TSSOP (θja = 15.4 C/W) ma maximum LFCSP (θja = 48.7 C/W) ma maximum V = 12 V, VSS = V TSSOP (θja = 15.4 C/W) ma maximum LFCSP (θja = 48.7 C/W) ma maximum V = 5 V, VSS = V TSSOP (θja = 15.4 C/W) ma maximum LFCSP (θja = 48.7 C/W) ma maximum V = 3.3 V, VSS = V TSSOP (θja = 15.4 C/W) ma maximum LFCSP (θja = 48.7 C/W) ma maximum Rev. B Page 7 of 2

8 ata Sheet ABSOLUTE MAXIMUM RATINGS TA = 25 C, unless otherwise noted. Table 6. Parameter Rating V to VSS 18 V V to GN.3 V to +18 V VSS to GN +.3 V to 18 V Analog Inputs 1 VSS.3 V to V +.3 V or 3 ma, whichever occurs first igital Inputs 1 GN.3 V to V +.3 V or 3 ma, whichever occurs first Peak Current, S or 115 ma (pulsed at 1 ms, 1% duty-cycle maximum) Continuous Current, S or 2 ata + 15% Operating Temperature Range Industrial (Y Version) 4 C to +125 C Storage Temperature Range 65 C to +15 C Junction Temperature 15 C θja Thermal Impedance 16-Lead TSSOP, 2-Layer Board 15.4 C/W 16-Lead LFCSP, 4-Layer Board 48.7 C/W Reflow Soldering Peak 26 C Temperature, Pb free Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. ES CAUTION 1 Overvoltages at IN, S, or are clamped by internal diodes. Current should be limited to the maximum ratings given. 2 See Table 5. Rev. B Page 8 of 2

9 ata Sheet PIN CONFIGURATIONS AN FUNCTION ESCRIPTIONS A 1 14 A1 EN 2 13 GN 3 12 V S1 4 TOP VIEW 11 S3 S2 5 (Not to Scale) 1 S4 6 9 NIC NIC 7 8 NIC NOTES 1. NIC = NO INTERNAL CONNECTION. Figure Lead TSSOP Pin Configuration EN A A1 NIC 1 NIC 2 S1 3 TOP VIEW (Not to Scale) 12 GN 11 V 1 S3 S2 4 9 S4 NIC NIC NIC NOTES 1. NIC = NO INTERNAL CONNECTION. 2. TIE THE EXPOSE PA TO THE SUBSTRATE,. Figure Lead LFCSP Pin Configuration Table 7. Pin Function escriptions Pin No. 14-Lead TSSOP 16-Lead LFCSP Mnemonic escription 1 15 A Logic Control Input EN Active High igital Input. When this pin is low, the device is disabled and all switches are off. When this pin is high, the Ax logic inputs determine the on switch. 3 1 VSS Most Negative Power Supply Potential. 4 3 S1 Source Terminal. This pin can be an input or output. 5 4 S2 Source Terminal. This pin can be an input or output. 6 6 rain Terminal. This pin can be an input or output. 7, 8, 9 2, 5, 7, 8, 13 NIC No Internal Connection. 1 9 S4 Source Terminal. This pin can be an input or output S3 Source Terminal. This pin can be an input or output V Most Positive Power Supply Potential GN Ground ( V) Reference A1 Logic Control Input. N/A 1 EPA Exposed Pad. Tie the exposed pad to the substrate, VSS. 1 N/A means not applicable. Table 8. Truth Table EN A1 A S1 S2 S3 S4 X X Off Off Off Off 1 On Off Off Off 1 1 Off On Off Off 1 1 Off Off On Off Off Off Off On Rev. B Page 9 of 2

10 ata Sheet TYPICAL PERFORMANCE CHARACTERISTICS ON RESISTANCE (Ω) T A = 25 C V = +3.3V = 3.3V V = +5V = 5V V = +8V = 8V ON RESISTANCE (Ω) T A = +125 C T A = +85 C T A = +25 C T A = 4 C V = 12V = V V S OR V VOLTAGE (V) Figure 4. On Resistance as a Function of V (VS) for ual Supply V S OR V VOLTAGE (V) Figure 7. On Resistance as a Function of V (VS) for ifferent Temperatures, 12 V Single Supply ON RESISTANCE (Ω) T A = 25 C V = 3.3V = V V = 5V = V ON RESISTANCE (Ω) T A = +125 C T A = +85 C T A = +25 C T A = 4 C V = 5V = V 1. V = 12V = V V = 16V = V V S OR V VOLTAGE (V) Figure 5. On Resistance as a Function of V (VS) for Single Supply V S OR V VOLTAGE (V) Figure 8. On Resistance as a Function of V (VS) for ifferent Temperatures, 5 V Single Supply V = 3.3V = V ON RESISTANCE (Ω) T A = +125 C T A = +85 C V = +5V T A = +25 C = 5V T A = 4 C V S OR V VOLTAGE (V) Figure 6. On Resistance as a Function of V (VS) for ifferent Temperatures, ±5 V ual Supply ON RESISTANCE (Ω) T A = +125 C T A = +85 C T A = +25 C T A = 4 C V S OR V VOLTAGE (V) Figure 9. On Resistance as a Function of V (VS) for ifferent Temperatures, 3.3 V Single Supply Rev. B Page 1 of 2

11 ata Sheet 15 1 I, I S (ON) +, + I (OFF), LEAKAGE CURRENT (na) 5 I S (OFF) +, I S (OFF), + 5 I, I S (ON), I (OFF) +, TEMPERATURE ( C) Figure 1. Leakage Currents as a Function of Temperature, ±5 V ual Supply LEAKAGE CURRENT (na) 12 I, I S (OFF) +, I, I S (OFF), 6 I (OFF), + 4 I S (OFF) +, 2 I S (OFF), + 2 I (OFF) +, TEMPERATURE ( C) Figure 13. Leakage Currents as a Function of Temperature, 3.3 V Single Supply LEAKAGE CURRENT (na) TEMPERATURE ( C) I, I S (ON) +, + I (OFF), + I S (OFF) +, I, I S (ON), I S (OFF), + I (OFF) +, I (µa) I = +12V I SS = V I = +5V I SS = 5V 1 I = +5V I SS = V I = +3.3V I SS = V LOGIC (V) I PER CHANNEL T A = 25 C Figure 11. Leakage Currents as a Function of Temperature, 12 V Single Supply Figure 14. I vs. Logic Level 2 35 LEAKAGE CURRENT (na) 15 I, I S (OFF) +, + 1 I, I S (OFF), 5 I (OFF), + I S (OFF) +, I S (OFF), + I (OFF) +, TEMPERATURE ( C) Figure 12. Leakage Currents as a Function of Temperature, 5 V Single Supply CHARGE INJECTION (pc) V = +5V 5 = V V = +3.3V = V V S (V) V = +5V = 5V V = +12V = V Figure 15. Charge Injection vs. Source Voltage Rev. B Page 11 of 2

12 ata Sheet 45 4 V = +3.3V, = V 1 T A = 25 C V = +5V = 5V 35 TIME (ns) V = +5V, = V INSERTION LOSS (db) V = +5V, = 5V 1 V = +12V, = V TEMPERATURE ( C) k 1k 1k 1M 1M 1M FREQUENCY (Hz) Figure 16. ton/toff Times vs. Temperature Figure 19. On Response vs. Frequency OFF ISOLATION (db) k T A = 25 C V = +5V = 5V 1k 1k 1M 1M 1M 1G FREQUENCY (Hz) Figure 17. Off Isolation vs. Frequency ACPSRR (db) k T A = 25 C V = +5V = 5V 1k NO ECOUPLING CAPACITORS ECOUPLING CAPACITORS 1k 1M 1M FREQUENCY (Hz) Figure 2. ACPSRR vs. Frequency T A = 25 C V = +5V = 5V R L = 11Ω T A = 25 C V = +3.3V V S = 2V p-p CROSSTALK (db) TH + N (%) V = +12V V S = 5V p-p V = +5V V S = 3.5V p-p V = +5V = 5V V S = 5V p-p 12 1k 1k 1k 1M 1M 1M 1G FREQUENCY (Hz) k 1k FREQUENCY (Hz) 15k 2k Figure 18. Crosstalk vs. Frequency Figure 21. TH + N vs. Frequency Rev. B Page 12 of 2

13 ata Sheet TEST CIRCUITS.1µFV.1µF V NETWORK ANALYZER 5Ω Sx 5Ω V S Sx V GN R L 5Ω I S V S Figure 22. On Resistance OFF ISOLATION = 2 log V S Figure 25. Off Isolation µFV.1µF V Sx NETWORK ANALYZER 5Ω V S I S (OFF) A Sx I (OFF) A GN R L 5Ω V S Figure 23. Off Leakage V WITH SWITCH INSERTION LOSS = 2 log WITHOUT SWITCH Figure 26. Bandwidth µFV.1µF NETWORK ANALYZER R L 5Ω V S1 S2 R L 5Ω NIC Sx I (ON) A V S GN V NIC = NO INTERNAL CONNECTION Figure 24. On Leakage CHANNEL-TO-CHANNEL CROSSTALK = 2 log V S Figure 27. Channel-to-Channel Crosstalk Rev. B Page 13 of 2

14 ata Sheet.1µFV.1µF V IN IN V Sx GN R L 11Ω Figure 28. TH + Noise AUIO PRECISION R S V S V p-p V.1µF.1µF V IN 2.V V A1 S1 A S2 S3 S4 EN GN R L 3Ω V S1 V S4 C L 35pF ARESS RIVE (V IN ) 3V V 5% 5% 9% 9% t TRANSITION t TRANSITION Figure 29. Address to Output Switching Times V.1µF.1µF V IN 3Ω V A1 A S1 S2 S3 S4 V S1 ARESS RIVE (V IN ) 3V V 2.V EN GN R L 3Ω C L 35pF 8% 8% t BBM Figure 3. Break-Before-Make Time elay Rev. B Page 14 of 2

15 ata Sheet V.1µF.1µF V IN 3Ω V A1 S1 A S2 S3 S4 EN GN R L 3Ω V S C L 35pF ENABLE RIVE (V IN ) 3V V OUTPUT V 5% 5%.9.9 t ON (EN) t OFF (EN) Figure 31. Enable-to-Output Switching elay V Δ V Q INJ = C L Δ V S R S Sx ECOER C L 1nF V IN SW OFF SW ON SW OFF GN A1 A2 EN V IN SW OFF SW OFF Figure 32. Charge Injection Rev. B Page 15 of 2

16 TERMINOLOGY I The positive supply current. ISS The negative supply current. V (VS) The analog voltage on Terminal and Terminal S. RON The ohmic resistance between Terminal and Terminal S. RFLAT(ON) Flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range. IS (Off) The source leakage current with the switch off. I (Off) The drain leakage current with the switch off. I, IS (On) The channel leakage current with the switch on. VINL The maximum input voltage for Logic. VINH The minimum input voltage for Logic 1. IINL (IINH) The input current of the digital input. CS (Off) The off switch source capacitance, which is measured with reference to ground. C (Off) The off switch drain capacitance, which is measured with reference to ground. C, CS (On) The on switch capacitance, which is measured with reference to ground. CIN The digital input capacitance. ata Sheet ttransition The delay time between the 5% and 9% points of the digital input and switch on condition when switching from one address state to another. See Figure 29. ton (EN) The delay between applying the digital control input and the output switching on. See Figure 31. toff (EN) The delay between applying the digital control input and the output switching off. See Figure 31. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. See Figure 32. Off Isolation A measure of unwanted signal coupling through an off switch. See Figure 25. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. See Figure 27. Bandwidth The frequency at which the output is attenuated by 3 db. See Figure 26. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. Total Harmonic istortion + Noise (TH + N) The ratio of the harmonic amplitude plus noise of the signal to the fundamental. See Figure 28. AC Power Supply Rejection Ratio (ACPSRR) The ratio of the amplitude of signal on the output to the amplitude of the modulation. This is a measure of the ability of the device to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of.62 V p-p. Rev. B Page 16 of 2

17 ata Sheet OUTLINE IMENSIONS BSC 1 7 PIN BSC COPLANARITY MAX SEATING PLANE COMPLIANT TO JEEC STANARS MO-153-AB-1 Figure Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) imensions shown in millimeters A PIN 1 INICATOR SQ BSC PIN 1 INICATOR EXPOSE PA SQ SEATING PLANE TOP VIEW MAX.2 NOM COPLANARITY.8.2 REF BOTTOM VIEW COMPLIANT TO JEEC STANARS MO-22-WGGC. Figure Lead Lead Frame Chip Scale Package [LFCSP] 4 mm 4 mm Body and.75 mm Package Height (CP-16-26) imensions shown in millimeters FOR PROPER CONNECTION OF THE EXPOSE PA, REFER TO THE PIN CONFIGURATION AN FUNCTION ESCRIPTIONS SECTION OF THIS ATA SHEET. ORERING GUIE Model 1 Temperature Range Package escription Package Option BRUZ 4 C to +125 C 14-Lead Thin Shrink Small Outline Package [TSSOP] RU-14 BRUZ-REEL 4 C to +125 C 14-Lead Thin Shrink Small Outline Package [TSSOP] RU-14 BRUZ-REEL7 4 C to +125 C 14-Lead Thin Shrink Small Outline Package [TSSOP] RU-14 BCPZ-REEL 4 C to +125 C 16-Lead Lead Frame Chip Scale Package [LFCSP] CP BCPZ-REEL7 4 C to +125 C 16-Lead Lead Frame Chip Scale Package [LFCSP] CP Z = RoHS Compliant Part A Rev. B Page 17 of 2

18 ata Sheet NOTES Rev. B Page 18 of 2

19 ata Sheet NOTES Rev. B Page 19 of 2

20 ata Sheet NOTES Analog evices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners /16(B) Rev. B Page 2 of 2