CMOS Low Power Dual 2:1 Mux/Demux USB 2.0 (480 Mbps)/USB 1.1 (12 Mbps) ADG772

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1 CMOS Low Power ual : Mux/emux USB. (8 Mbps)/USB. ( Mbps) FEATURES USB. (8 Mbps) and USB. ( Mbps) signal switching compliant Tiny -lead.3 mm. mm mini LFCSP package and -lead 3 mm 3 mm LFCSP package.7 V to 3. V single-supply operation Typical power consumption: <. μw RoHS compliant APPLICATIONS USB. signal switching circuits Cellular phones PAs MP3 players Battery-powered systems Headphone switching Audio and video signal routing Communications systems GENERAL ESCRIPTION The is a low voltage CMOS device that contains two independently selectable single-pole, double throw (SPT) switches. It is designed as a general-purpose switch and can be used for routing both USB. and USB. signals. This device offers a data rate of Mbps, making the device suitable for high frequency data switching. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. The exhibits break-before-make switching action. The is available in a -lead LFCSP and a -lead mini LFCSP. These packages make the the ideal solution for space-constrained applications. FUNCTIONAL BLOCK IAGRAM SA SB IN IN SA SB SWITCHES SHOWN FOR A LOGIC INPUT Figure. PROUCT HIGHLIGHTS.. mm.3 mm mini LFCSP package.. USB. ( Mbps) and USB. (8 Mbps) compliant. 3. Single.7 V to 3. V operation...8 V logic compatible.. RoHS compliant. 9- Rev. C ocument Feedback Information furnished by Analog evices is believed to be accurate and reliable. However, no responsibility is assumed by Analog evices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog evices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9, Norwood, MA -9, U.S.A. Tel: Analog evices, Inc. All rights reserved. Technical Support

2 * Product Page Quick Links Last Content Update: 8/3/ Comparable Parts View a parametric search of comparable parts Evaluation Kits Evaluation Board ocumentation : CMOS Low Power ual : Mux/emux USB. (8 Mbps)/USB. ( Mbps) Tools and Simulations IBIS Model Reference Materials Product Selection Guide Switches and Multiplexers Product Selection Guide esign Resources Material eclaration PCN-PN Information Quality And Reliability Symbols and Footprints iscussions View all EngineerZone iscussions Sample and Buy Visit the product page to see pricing options Technical Support Submit a technical question or find your regional support number * This page was dynamically generated by Analog evices, Inc. and inserted into this data sheet. Note: ynamic changes to the content on this page does not constitute a change to the revision number of the product data sheet. This content may be frequently modified.

3 TABLE OF CONTENTS Features... Applications... Functional Block iagram... General escription... Product Highlights... Revision History... Specifications... 3 Absolute Maximum Ratings... ES Caution... Pin Configuration and Function escriptions... Truth Table... Typical Performance Characteristics... Test Circuits...9 Terminology... Outline imensions... Ordering Guide... REVISION HISTORY / Rev. B to Rev. C Changes to Figure 3... Updated Outline imensions... Changes to Ordering Guide... /3 Rev. A to Rev. B Added EPA Notation... Changes to Figure... 7 Updated Outline imensions... Changes to Ordering Guide... /8 Rev. to Rev. A Changes to Product Highlights... Changes to Input High Voltage, VINH, Parameter /7 Revision : Initial Version Rev. C Page of

4 Specifications V =.7 V to 3. V, GN = V, unless otherwise noted. Table. Parameter + C C to +8 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to V V On-Resistance (RON).7 Ω typ V =.7 V, VS = V to V, IS = ma; see Figure 8.8 Ω max On-Resistance Match. Ω typ V =.7 V, VS =. V, IS = ma Between Channels ( RON). Ω max On Resistance Flatness (RFLAT (ON)) 3.3 Ω typ V =.7 V, VS = V to V, IS = ma 3. Ω max LEAKAGE CURRENTS V = 3. V Source Off Leakage IS (Off ) ±. na typ VS =. V/3.3 V, V = 3.3 V/. V; see Figure Channel On Leakage I, IS (On) ±. na typ VS = V =. V or 3.3 V; see Figure 3 IGITAL INPUTS Input High Voltage, VINH.3 V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH. µa typ VIN = VINL or VINH ±. µa max VIN = VINL or VINH igital Input Capacitance, CIN pf typ YNAMIC CHARACTERISTICS ton 9 ns typ RL = Ω, CL = 3 pf. 3. ns max VS = V; see Figure toff ns typ RL = Ω, CL = 3 pf 9. ns max VS = V; see Figure Propagation elay ps typ RL = Ω, CL = 3 pf Propagation elay Skew, tskew ps typ RL = Ω, CL = 3 pf Break-Before-Make Time elay (tbbm) ns typ RL = Ω, CL = 3 pf 3..9 ns min VS = VS = V; see Figure Charge Injection. pc typ V =. V, RS = Ω, CL = nf; see Figure Off Isolation 73 db typ RL = Ω, CL = pf, f = MHz; see Figure 7 Channel-to-Channel Crosstalk 9 db typ SA to SA/SB to SB; RL = Ω, CL = pf, f = MHz; see Figure 8 8 db typ SA to SB/SA to SB; RL = Ω, CL = pf, f = MHz; see Figure 9 3 db Bandwidth 3 MHz typ RL = Ω, CL = pf; see Figure 3 ata Rate Mbps typ RL = Ω, CL = pf; see Figure 3 CS (Off ). pf typ C, CS (On).9 pf typ POWER REQUIREMENTS V = 3. V I. µa typ igital inputs = V or 3. V µa max Guaranteed by design, not subject to production test. Rev. C Page 3 of

5 ABSOLUTE MAXIMUM RATINGS TA = C, unless otherwise noted. Table. Parameter V to GN Analog Inputs, igital Inputs Peak Current, Pin SA, Pin SA, Pin, or Pin Continuous Current, Pin SA, Pin SA, Pin, or Pin Operating Temperature Industrial Range (B Version) Storage Temperature Range Junction Temperature C θja Thermal Impedance (-Layer Board) -Lead Mini LFCSP -Lead LFCSP Pb-Free Temperature, Soldering, IR Reflow Peak Temperature Time at Peak Temperature Rating.3 V to +. V.3 V to V +.3 V or ma, whichever occurs first ma (pulsed at ms, % duty cycle max) 3 ma C to +8 C C to + C 3. C/W C/W (+/ ) C sec to sec Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Only one absolute maximum rating can be applied at any one time. ES CAUTION Overvoltages at the IN, IN, SA, SA,, or pin are clamped by internal diodes. Current must be limited to the maximum ratings given. Rev. C Page of

6 IN IN V 9 SA GN SA PIN CONFIGURATION AN FUNCTION ESCRIPTIONS SA IN IN V SA GN SB NC 3 TOP VIEW (Not to Scale) 9 8 SBB 7 NC SB 3 TOP VIEW (Not to Scale) 8 7 SB Figure. -Lead Mini LFCSP Pin Configuration 9- NOTES. NC = NO CONNECT.. THE EXPOSE PA IS CONNECTE INTERNALLY. FOR INCREASE RELIABILITY OF THE SOLER JOINTS AN MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENE THAT THE PA BE SOLERE TO A GROUN REFERENCE. Figure 3. -Lead LFCSP Pin Configuration 9-3 Table 3. Pin Function escriptions Pin No. -Lead Mini LFCSP -Lead LFCSP Mnemonic escription SA Source Terminal. Can be an input or an output. rain Terminal. Can be an input or an output. 3 SB Source Terminal. Can be an input or an output. IN Logic Control Input. This pin controls Switch SA and Switch SB to. IN Login Control Input. This pin controls Switch SA and Switch SB to. V Most Positive Power Supply Potential. 7 8 SB Source Terminal. Can be an input or an output. 8 9 rain Terminal. Can be an input or an output. 9 SA Source Terminal. Can be an input or an output. GN Ground ( V) Reference. Not applicable 3, 7 NC No Connect. Not applicable 3 EPA Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to a ground reference. TRUTH TABLE Table. Logic (IN or IN) Switch A (SA or SA) Switch B (SB or SB) Off On On Off Rev. C Page of

7 TYPICAL PERFORMANCE CHARACTERISTICS ON RESISTANCE (Ω) 7 3 T A = C = 3.V = 3.3V = 3.V ON RESISTANCE (Ω) 7 3 T A = +8 C T A = C T A = + C = 3.3V V, (V) Figure. On Resistance vs. V, VS; V = 3.3 V ±.3 V V, (V) Figure 7. On Resistance vs. V, VS for ifferent Temperatures; V = 3.3 V T A = C =.3V 8 7 =.7V T A = +8 C ON RESISTANCE (Ω) =.V =.7V ON RESISTANCE (Ω) 3 T A = + C T A = C V, (V) Figure. On Resistance vs. V, VS; V =. V ±. V V, (V) Figure 8. On Resistance vs. V, VS for ifferent Temperatures; V =.7 V 9-3 T A = C =.V =.8V T A = C T A = + C ON RESISTANCE (Ω) =.8V =.9V ON RESISTANCE (Ω) T A = +8 C V, (V) Figure. On Resistance vs. V, VS; V =.8 V ±. V V, (V) Figure 9. On Resistance vs. V, VS for ifferent Temperatures; V =.8 V 9- Rev. C Page of

8 .. = 3.3V.. T A = C V CC = 3.3V CURRENT (na).8... I, I S (ON)++ I, I S (OFF)+ Q INJ (pc).. V CC =.8V V CC =.V I, I S (ON) I, I S (OFF) TEMPERATURE ( C) Figure. Leakage Current vs. Temperature; V = 3.3 V (V) Figure 3. Charge Injection vs. Source Voltage =.V t ON (.8V) CURRENT (na) I, I S (OFF)+ I, I S (ON)++ I, I S (ON) TIME (ns) 8 t OFF (.8V) t ON (3.3V) t ON (.7V) t OFF (.7V) t OFF (3.3V).. I, I S (OFF) TEMPERATURE ( C) TEMPERATURE ( C) 9-9 Figure. Leakage Current vs. Temperature; V =. V Figure. ton/toff Times vs. Temperature.8.7. =.8V T A = C = 3.3V,.V,.8V CURRENT (na)...3. I, I S (ON) I, I S (ON)++ INSERTION LOSS (db) 8.. I, I S (OFF)+ I, I S (OFF) TEMPERATURE ( C) FREQUENCY (MHz) 9- Figure. Leakage Current vs. Temperature; V =.8 V Figure. Bandwidth Rev. C Page 7 of

9 T A = C = 3.3V,.V,.8V ATTENUATION (db) FREQUENCY (MHz) 9- C 83mV Ω.ns/IV.GS/s ET ps/pt A C.V 9- Figure. Off Isolation vs. Frequency Figure 9. USB. Eye iagram T A = C = 3.3V,.V,.8V +mv 3 CROSSTALK (db) 7 SA to SB SA to SA +mv/ IV 8 9 FREQUENCY (MHz) 9-3 mv 37.37ns ps/iv 39.87ns 9- Figure 7. Crosstalk vs. Frequency Figure. USB. Eye iagram T A = C = 3.3V PSRR (db) 8 k k k M M M G FREQUENCY (MHz) Figure 8. PSRR vs. Frequency 9-7 Rev. C Page 8 of

10 TEST CIRCUITS I S V S R ON = V/I S Figure. On Resistance 9- I S (OFF) A S I (OFF) A NC V Figure. Off Leakage I (ON) S A Figure 3. On Leakage V 9-9-.µF SB SA V IN % % IN R L Ω C L 3pF 9% 9% GN t ON t OFF 9-7 Figure. Switching Times, ton, toff.µf SB SA V IN V 8% % % 8% IN R L Ω C L 3pF t BBM t BBM GN 9-8 Figure. Break-Before-Make Time elay, tbbm SWITCH ON SWITCH OFF IN SB SA nf NC V IN GN Q INJ = C L Figure. Charge Injection 9-9 Rev. C Page 9 of

11 .µf.µf NETWORK ANALYZER NETWORK ANALYZER NC SB SA Ω Ω SB SA Ω GN R L Ω GN R L Ω OFF ISOLATION = log 9- WITH SWITCH INSERTION LOSS = log WITHOUT SWITCH 9- Figure 7. Off Isolation Figure 9. Channel-to-Channel Crosstalk (SA to SB) NETWORK ANALYZER.µF Ω Ω SA SB SA SB NC NC Ω NETWORK ANALYZER R L Ω Ω SA SB R L Ω CHANNEL-TO-CHANNEL CROSSTALK = log 9-3 GN Figure 8. Channel-to-Channel Crosstalk (SA to SA) CHANNEL-TO-CHANNEL CROSSTALK = log Figure 3. Bandwidth 9- Rev. C Page of

12 TERMINOLOGY I Positive supply current. V,VS Analog voltage on Terminal and Terminal S. RON Ohmic resistance between Terminal and Terminal S. RFLAT (On) The difference between the maximum and minimum values of on resistance as measured on the switch. RON On resistance match between any two channels. IS (Off) Source leakage current with the switch off. I (Off) rain leakage current with the switch off. I, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic. VINH Minimum input voltage for Logic. IINL,IINH Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. C (Off) Off switch drain capacitance. Measured with reference to ground. C, CS (On) On switch capacitance. Measured with reference to ground. CIN igital input capacitance. ton elay time between the % and 9% points of the digital input and switch on condition. toff elay time between the % and 9% points of the digital input and switch off condition. tbbm On or off time measured between the 8% points of both switches when switching from one to another. Charge Injection Measure of the glitch impulse transferred from the digital input to the analog output during on/off switching. Off Isolation Measure of unwanted signal coupling through an off switch. Crosstalk Measure of unwanted signal that is coupled from one channel to another as a result of parasitic capacitance. 3 db Bandwidth Frequency at which the output is attenuated by 3 db. On Response Frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. TH + N Ratio of the harmonics amplitude plus noise of a signal to the fundamental. TSKEW The measure of the variation in propagation delay between each channel. Rev. C Page of

13 OUTLINE IMENSIONS. IA TYP....3 TOP VIEW.. BSC. MAX. NOM BOTTOM VIEW PIN IENTIFIER.3.3. PIN INICATOR SEATING PLANE SEATING PLANE. BSC Figure 3. -Lead Mini Lead Frame Chip Scale Package [LFCSP].3 mm. mm Body and. mm Package Height (CP--) imensions shown in millimeters SQ.9 TOP VIEW. BSC MAX. NOM COPLANARITY.8. REF EXPOSE PA BOTTOM VIEW COMPLIANT TO JEEC STANARS MO--WEE. Figure 3. -Lead Lead Frame Chip Scale Package [LFCSP] 3 mm 3 mm Body and.7 mm Package Height (CP--) imensions shown in millimeters A PIN INICATOR..3 SQ.. MIN FOR PROPER CONNECTION OF THE EXPOSE PA, REFER TO THE PIN CONFIGURATION AN FUNCTION ESCRIPTIONS SECTION OF THIS ATA SHEET. ORERING GUIE Model Temperature Range Package escription Package Option Branding BCPZ-REEL C to +8 C -Lead Lead Frame Chip Scale Package [LFCSP] CP-- SP BCPZ-REEL7 C to +8 C -Lead Mini Lead Frame Chip Scale Package [LFCSP] CP-- B EVAL-EBZ C to +8 C Evaluation Board 88-A Z = RoHS Compliant Part. 7 Analog evices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 9--/(C) Rev. C Page of

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